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annotate components/fchg @ 547:c3f2f79dc5b8

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l1_rf12.c compiled-in default RF band tables: a round of cleanup * Uncalibrated default g_magic values changed from old Clara RF numbers (yes, Clara, not even Leonardo) to the approximately correct value for our current hw; * Uncalibrated default Rx and Tx channel calibration tables providing neutral correction values: fixed bogus ARFCNs from blind copy-n-paste between different bands; * Restored #if (ORDER2_TX_TEMP_CAL==1) in the Tx temperature compensation tables; * Fully rewrote the big comment before these rf_XXX structures to reflect the current situation. This change is part of the larger transition in FreeCalypso from reverse to forward engineering, from reconstruction of lost original bits to ongoing forward development and maintenance.
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 17 Nov 2018 19:57:34 +0000
parents 1c711302732a
children
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1 # Building FCHG SWE - an original FreeCalypso addition
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2
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3 CFLAGS="-mn -mt -o -x -mw -me -pw2"
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4 CPPFLAGS="-DTOOL_CHOICE=0 -D_TMS470"
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6 # Includes
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8 CPPFLAGS="$CPPFLAGS -I$SRC/cs/os/nucleus"
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9 CPPFLAGS="$CPPFLAGS -I.."
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10 CPPFLAGS="$CPPFLAGS -I../config"
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11 CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/inc"
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12 CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/frame/cust_os"
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13 CPPFLAGS="$CPPFLAGS -I$SRC/cs/system"
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14 CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera"
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15 CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera/rv"
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16 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core"
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17 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/abb"
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18 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/armio"
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19 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/clkm"
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20 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/conf"
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21 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dma"
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22 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dsp_dwnld"
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23 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/inth"
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24 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/memif"
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25 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/rhea"
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26 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/security"
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27 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/spi"
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28 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/timer"
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29 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/uart"
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30 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/ulpd"
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31 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app"
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32 CPPFLAGS="$CPPFLAGS -I$SRC/cs/services"
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33
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34 # Source modules
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36 SRCDIR=$SRC/cs/drivers/drv_app/fchg
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be011556e71f FCHG: API implementation started
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38 cfile_plain $SRCDIR/fchg_api.c
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6ab14029931c FCHG: default battery table implemented
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39 cfile_plain $SRCDIR/fchg_default_batt.c
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40 cfile_plain $SRCDIR/fchg_env.c
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ab47ade99fa9 FCHG: reading of charging config from FFS implemented
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41 cfile_plain $SRCDIR/fchg_ffs_init.c
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1c711302732a FCHG: complete enough to attempt linking into fw build
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42 cfile_plain $SRCDIR/fchg_messages.c
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8166b0afcf8c FCHG: main ADC process implemented
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43 cfile_plain $SRCDIR/fchg_process.c
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0df0668f8bea FCHG: task core function implemented
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44 cfile_plain $SRCDIR/fchg_task.c