annotate src/cs/layer1/tm_include/l1tm_signa.h @ 547:c3f2f79dc5b8

l1_rf12.c compiled-in default RF band tables: a round of cleanup * Uncalibrated default g_magic values changed from old Clara RF numbers (yes, Clara, not even Leonardo) to the approximately correct value for our current hw; * Uncalibrated default Rx and Tx channel calibration tables providing neutral correction values: fixed bogus ARFCNs from blind copy-n-paste between different bands; * Restored #if (ORDER2_TX_TEMP_CAL==1) in the Tx temperature compensation tables; * Fully rewrote the big comment before these rf_XXX structures to reflect the current situation. This change is part of the larger transition in FreeCalypso from reverse to forward engineering, from reconstruction of lost original bits to ongoing forward development and maintenance.
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 17 Nov 2018 19:57:34 +0000
parents 945cf7f506b2
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
1 /************* Revision Controle System Header *************
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
2 * GSM Layer 1 software
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
3 * L1TM_SIGNA.H
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
4 *
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
5 * Filename l1tm_signa.h
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
6 * Copyright 2003 (C) Texas Instruments
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
7 *
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
8 ************* Revision Controle System Header *************/
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
9
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
10 #define P_TMODE ( P_L1C + 3 ) // keep compatibility with GPRS code
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
11
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
12
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
13 //TestMode
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
14 #define TMODE_RXLEV_REQ ( ( P_TMODE << 8 ) | 1 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
15 #define TMODE_RXLEV_IND ( ( P_TMODE << 8 ) | 2 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
16 #define TMODE_STOP_RXLEV_CON ( ( P_TMODE << 8 ) | 3 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
17 #define TMODE_FB0_REQ ( ( P_TMODE << 8 ) | 4 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
18 #define TMODE_FB1_REQ ( ( P_TMODE << 8 ) | 5 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
19 #define TMODE_SB_REQ ( ( P_TMODE << 8 ) | 6 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
20 #define TMODE_FB_CON ( ( P_TMODE << 8 ) | 7 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
21 #define TMODE_SB_CON ( ( P_TMODE << 8 ) | 8 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
22 #define TMODE_BCCHS_CON ( ( P_TMODE << 8 ) | 9 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
23 #define TMODE_RA_START ( ( P_TMODE << 8 ) | 10 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
24 #define TMODE_RA_DONE ( ( P_TMODE << 8 ) | 11 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
25 #define TMODE_SCELL_NBCCH_REQ ( ( P_TMODE << 8 ) | 12 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
26 #define TMODE_STOP_SCELL_BCCH_REQ ( ( P_TMODE << 8 ) | 13 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
27 #define TMODE_NEW_SCELL_REQ ( ( P_TMODE << 8 ) | 14 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
28 #define TMODE_TCH_REQ ( ( P_TMODE << 8 ) | 15 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
29 #define TMODE_IMMED_ASSIGN_REQ ( ( P_TMODE << 8 ) | 16 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
30 #define TMODE_IMMED_ASSIGN_CON ( ( P_TMODE << 8 ) | 17 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
31 #define TMODE_STOP_RX_TX ( ( P_TMODE << 8 ) | 18 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
32 #define TMODE_SACCH_INFO ( ( P_TMODE << 8 ) | 19 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
33 #define TESTMODE_PRIM ( ( P_TMODE << 8 ) | 20 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
34 #define TMODE_FB_SB_REQ ( ( P_TMODE << 8 ) | 21 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
35 #define TMODE_NETWORK_SYNC_IND ( ( P_TMODE << 8 ) | 22 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
36 #define TMODE_TCH_INFO ( ( P_TMODE << 8 ) | 23 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
37 #if L1_GPRS
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
38 #define TMODE_PDTCH_ASSIGN_REQ ( ( P_TMODE << 8 ) | 24 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
39 #define TMODE_PDTCH_INFO ( ( P_TMODE << 8 ) | 25 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
40 #endif
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
41
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
42 // #define TMODE_RXLEV_REQ ( ( P_TMODE << 8 ) | 24 )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
43 // #define TMODE_RXLEV_IND ( ( P_TMODE << 8 ) | 25 )