FreeCalypso > hg > fc-magnetite
annotate src/cs/layer1/tm_include/l1tm_varex.h @ 547:c3f2f79dc5b8
l1_rf12.c compiled-in default RF band tables: a round of cleanup
* Uncalibrated default g_magic values changed from old Clara RF numbers
(yes, Clara, not even Leonardo) to the approximately correct value
for our current hw;
* Uncalibrated default Rx and Tx channel calibration tables providing
neutral correction values: fixed bogus ARFCNs from blind copy-n-paste
between different bands;
* Restored #if (ORDER2_TX_TEMP_CAL==1) in the Tx temperature compensation
tables;
* Fully rewrote the big comment before these rf_XXX structures to reflect
the current situation.
This change is part of the larger transition in FreeCalypso from reverse
to forward engineering, from reconstruction of lost original bits to
ongoing forward development and maintenance.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sat, 17 Nov 2018 19:57:34 +0000 |
parents | 945cf7f506b2 |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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1 /************* Revision Controle System Header ************* |
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Mychaela Falconia <falcon@freecalypso.org>
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2 * GSM Layer 1 software |
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Mychaela Falconia <falcon@freecalypso.org>
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3 * L1TM_VAREX.H |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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4 * |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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5 * Filename l1tm_varex.h |
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Mychaela Falconia <falcon@freecalypso.org>
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6 * Copyright 2003 (C) Texas Instruments |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
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7 * |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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8 ************* Revision Controle System Header *************/ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
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9 |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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10 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
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11 #ifdef L1TM_ASYNC_C //Defined in l1_tmode.c |
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12 #define TMVAR |
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Mychaela Falconia <falcon@freecalypso.org>
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13 #else |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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14 #define TMVAR extern |
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Mychaela Falconia <falcon@freecalypso.org>
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15 #endif |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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16 |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
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17 TMVAR T_L1TM_GLOBAL l1tm; |
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18 |