FreeCalypso > hg > fc-magnetite
annotate cdg-hybrid/cdginc/p_uart.h @ 638:cab2f315827e
FFS dev.c: added Spansion PL032J to the "generic" table
With the discovery of first GTM900 and then Tango, it now appears that
Openmoko was not the only manuf after all who kept TI's TCS211 firmware
largely intact (as opposed to changing it beyond all recognition like
Compal, Chi-Mei and BenQ did), thus we are now getting new "alien" targets
on which we reuse the original manuf's FFS with IMEI and RF calibration
tables as if it were native. On these targets we use the original
device table for FFS, even though we previously thought that it would
never apply to any target other than dsample, leonardo and gtamodem.
We have previously added Samsung K5L33xxCAM (a new kind of multi-ID device)
to the generic table to support its use in Huawei GTM900-B modules; now
we got news that some slightly older GTM900-B specimen used S71PL032J
instead, so we are now adding PL032J as well.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 30 Jan 2020 17:45:48 +0000 |
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212
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1 /* |
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2 +--------------------------------------------------------------------------+ |
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3 | PROJECT : PROTOCOL STACK | |
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4 | FILE : p_uart.h | |
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5 | SOURCE : "sap\uart.pdf" | |
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6 | LastModified : "2002-03-11" | |
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7 | IdAndVersion : "8441.117.99.014" | |
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8 | SrcFileTime : "Thu Nov 29 09:56:02 2007" | |
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9 | Generated by CCDGEN_2.5.5A on Fri Oct 14 21:41:52 2016 | |
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10 | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! | |
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11 +--------------------------------------------------------------------------+ |
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12 */ |
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13 |
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14 /* PRAGMAS |
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15 * PREFIX : NONE |
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16 * COMPATIBILITY_DEFINES : NO (require PREFIX) |
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17 * ALWAYS_ENUM_IN_VAL_FILE: NO |
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18 * ENABLE_GROUP: NO |
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19 * CAPITALIZE_TYPENAME: NO |
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20 */ |
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21 |
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22 |
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23 #ifndef P_UART_H |
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24 #define P_UART_H |
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25 |
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26 |
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27 #define CDG_ENTER__P_UART_H |
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28 |
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29 #define CDG_ENTER__FILENAME _P_UART_H |
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30 #define CDG_ENTER__P_UART_H__FILE_TYPE CDGINC |
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31 #define CDG_ENTER__P_UART_H__LAST_MODIFIED _2002_03_11 |
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32 #define CDG_ENTER__P_UART_H__ID_AND_VERSION _8441_117_99_014 |
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33 |
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34 #define CDG_ENTER__P_UART_H__SRC_FILE_TIME _Thu_Nov_29_09_56_02_2007 |
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35 |
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36 #include "CDG_ENTER.h" |
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37 |
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38 #undef CDG_ENTER__P_UART_H |
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39 |
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40 #undef CDG_ENTER__FILENAME |
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41 |
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42 |
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43 #include "p_uart.val" |
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44 |
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45 #ifndef __T_comPar__ |
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46 #define __T_comPar__ |
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47 /* |
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48 * Parameters of serial link |
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49 * CCDGEN:WriteStruct_Count==3109 |
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50 */ |
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51 typedef struct |
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52 { |
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53 U8 speed; /*< 0: 1> baud rate */ |
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54 U8 bpc; /*< 1: 1> bits per character */ |
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55 U8 nsb; /*< 2: 1> stop bits */ |
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56 U8 parity; /*< 3: 1> parity of serial link */ |
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57 U8 flow_rx; /*< 4: 1> flow control mode RX */ |
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58 U8 flow_tx; /*< 5: 1> flow control mode TX */ |
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59 U8 xon_valid; /*< 6: 1> indicator whether xon is valid */ |
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60 U8 xon; /*< 7: 1> XOn character for XON/XOFF flow control */ |
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61 U8 xoff_valid; /*< 8: 1> indicator whether xoff is valid */ |
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62 U8 xoff; /*< 9: 1> XOff character for XON/XOFF flow control */ |
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63 U8 esc_valid; /*< 10: 1> indicator whether esc_char and esc_gp are valid */ |
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64 U8 esc_char; /*< 11: 1> escape character */ |
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65 U16 esc_gp; /*< 12: 2> guard period */ |
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66 U8 _align0; /*< 14: 1> alignment */ |
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67 U8 _align1; /*< 15: 1> alignment */ |
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68 } T_comPar; |
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69 #endif |
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70 |
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71 |
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72 /* |
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73 * End of substructure section, begin of primitive definition section |
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74 */ |
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75 |
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76 #ifndef __T_UART_PARAMETERS_REQ__ |
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77 #define __T_UART_PARAMETERS_REQ__ |
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78 /* |
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79 * |
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80 * CCDGEN:WriteStruct_Count==3110 |
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81 */ |
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82 typedef struct |
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83 { |
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84 U8 device; /*< 0: 1> device number */ |
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85 U8 _align0; /*< 1: 1> alignment */ |
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86 U8 _align1; /*< 2: 1> alignment */ |
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87 U8 _align2; /*< 3: 1> alignment */ |
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88 T_comPar comPar; /*< 4: 16> Parameters of serial link */ |
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89 } T_UART_PARAMETERS_REQ; |
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90 #endif |
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91 |
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92 #ifndef __T_UART_PARAMETERS_CNF__ |
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93 #define __T_UART_PARAMETERS_CNF__ |
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94 /* |
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95 * |
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96 * CCDGEN:WriteStruct_Count==3111 |
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97 */ |
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98 typedef struct |
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99 { |
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100 U8 device; /*< 0: 1> device number */ |
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101 U8 _align0; /*< 1: 1> alignment */ |
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102 U8 _align1; /*< 2: 1> alignment */ |
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103 U8 _align2; /*< 3: 1> alignment */ |
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104 } T_UART_PARAMETERS_CNF; |
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105 #endif |
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106 |
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107 #ifndef __T_UART_PARAMETERS_IND__ |
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108 #define __T_UART_PARAMETERS_IND__ |
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109 /* |
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110 * |
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111 * CCDGEN:WriteStruct_Count==3112 |
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112 */ |
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113 typedef struct |
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114 { |
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115 U8 uart_instances; /*< 0: 1> number of UART instances */ |
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116 U8 _align0; /*< 1: 1> alignment */ |
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117 U8 _align1; /*< 2: 1> alignment */ |
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118 U8 _align2; /*< 3: 1> alignment */ |
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119 } T_UART_PARAMETERS_IND; |
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120 #endif |
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121 |
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122 #ifndef __T_UART_DTI_REQ__ |
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123 #define __T_UART_DTI_REQ__ |
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124 /* |
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125 * |
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126 * CCDGEN:WriteStruct_Count==3113 |
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127 */ |
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128 typedef struct |
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129 { |
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130 U8 dti_conn; /*< 0: 1> DTI connect */ |
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131 U8 device; /*< 1: 1> device number */ |
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132 U8 dlci; /*< 2: 1> data link connection identifier */ |
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133 U8 direction; /*< 3: 1> direction of the DTI link */ |
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134 U32 link_id; /*< 4: 4> identifier of DTI connection */ |
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135 U32 entity_name; /*< 8: 4> communication entity name */ |
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136 } T_UART_DTI_REQ; |
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137 #endif |
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138 |
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139 #ifndef __T_UART_DTI_CNF__ |
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140 #define __T_UART_DTI_CNF__ |
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141 /* |
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142 * |
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143 * CCDGEN:WriteStruct_Count==3114 |
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144 */ |
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145 typedef struct |
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146 { |
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147 U8 dti_conn; /*< 0: 1> DTI connect */ |
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148 U8 device; /*< 1: 1> device number */ |
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149 U8 dlci; /*< 2: 1> data link connection identifier */ |
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150 U8 _align0; /*< 3: 1> alignment */ |
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151 } T_UART_DTI_CNF; |
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152 #endif |
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153 |
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154 #ifndef __T_UART_DTI_IND__ |
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155 #define __T_UART_DTI_IND__ |
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156 /* |
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157 * |
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158 * CCDGEN:WriteStruct_Count==3115 |
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159 */ |
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160 typedef struct |
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161 { |
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162 U8 dti_conn; /*< 0: 1> DTI connect */ |
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163 U8 device; /*< 1: 1> device number */ |
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164 U8 dlci; /*< 2: 1> data link connection identifier */ |
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165 U8 _align0; /*< 3: 1> alignment */ |
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166 } T_UART_DTI_IND; |
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167 #endif |
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168 |
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169 #ifndef __T_UART_DISABLE_REQ__ |
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170 #define __T_UART_DISABLE_REQ__ |
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171 /* |
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172 * |
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173 * CCDGEN:WriteStruct_Count==3116 |
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174 */ |
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175 typedef struct |
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176 { |
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177 U8 device; /*< 0: 1> device number */ |
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178 U8 _align0; /*< 1: 1> alignment */ |
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179 U8 _align1; /*< 2: 1> alignment */ |
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180 U8 _align2; /*< 3: 1> alignment */ |
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181 } T_UART_DISABLE_REQ; |
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182 #endif |
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183 |
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184 #ifndef __T_UART_DISABLE_CNF__ |
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185 #define __T_UART_DISABLE_CNF__ |
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186 /* |
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187 * |
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188 * CCDGEN:WriteStruct_Count==3117 |
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189 */ |
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190 typedef struct |
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191 { |
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192 U8 device; /*< 0: 1> device number */ |
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193 U8 _align0; /*< 1: 1> alignment */ |
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194 U8 _align1; /*< 2: 1> alignment */ |
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195 U8 _align2; /*< 3: 1> alignment */ |
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196 } T_UART_DISABLE_CNF; |
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197 #endif |
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198 |
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199 #ifndef __T_UART_RING_REQ__ |
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200 #define __T_UART_RING_REQ__ |
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201 /* |
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202 * |
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203 * CCDGEN:WriteStruct_Count==3118 |
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204 */ |
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205 typedef struct |
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206 { |
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207 U8 device; /*< 0: 1> device number */ |
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208 U8 dlci; /*< 1: 1> data link connection identifier */ |
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209 U8 line_state; /*< 2: 1> state of line */ |
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210 U8 _align0; /*< 3: 1> alignment */ |
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211 } T_UART_RING_REQ; |
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212 #endif |
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213 |
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214 #ifndef __T_UART_RING_CNF__ |
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215 #define __T_UART_RING_CNF__ |
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216 /* |
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217 * |
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218 * CCDGEN:WriteStruct_Count==3119 |
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219 */ |
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220 typedef struct |
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221 { |
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222 U8 device; /*< 0: 1> device number */ |
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223 U8 dlci; /*< 1: 1> data link connection identifier */ |
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224 U8 _align0; /*< 2: 1> alignment */ |
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225 U8 _align1; /*< 3: 1> alignment */ |
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226 } T_UART_RING_CNF; |
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227 #endif |
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228 |
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229 #ifndef __T_UART_DCD_REQ__ |
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230 #define __T_UART_DCD_REQ__ |
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231 /* |
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232 * |
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233 * CCDGEN:WriteStruct_Count==3120 |
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234 */ |
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235 typedef struct |
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236 { |
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237 U8 device; /*< 0: 1> device number */ |
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238 U8 dlci; /*< 1: 1> data link connection identifier */ |
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239 U8 line_state; /*< 2: 1> state of line */ |
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240 U8 _align0; /*< 3: 1> alignment */ |
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241 } T_UART_DCD_REQ; |
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242 #endif |
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243 |
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244 #ifndef __T_UART_DCD_CNF__ |
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245 #define __T_UART_DCD_CNF__ |
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246 /* |
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247 * |
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248 * CCDGEN:WriteStruct_Count==3121 |
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249 */ |
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250 typedef struct |
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251 { |
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252 U8 device; /*< 0: 1> device number */ |
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253 U8 dlci; /*< 1: 1> data link connection identifier */ |
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254 U8 _align0; /*< 2: 1> alignment */ |
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255 U8 _align1; /*< 3: 1> alignment */ |
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256 } T_UART_DCD_CNF; |
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257 #endif |
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258 |
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259 #ifndef __T_UART_ESCAPE_REQ__ |
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260 #define __T_UART_ESCAPE_REQ__ |
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261 /* |
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262 * |
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263 * CCDGEN:WriteStruct_Count==3122 |
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264 */ |
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265 typedef struct |
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266 { |
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267 U8 device; /*< 0: 1> device number */ |
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268 U8 dlci; /*< 1: 1> data link connection identifier */ |
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269 U8 detection; /*< 2: 1> escape sequence detection */ |
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270 U8 _align0; /*< 3: 1> alignment */ |
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271 } T_UART_ESCAPE_REQ; |
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272 #endif |
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273 |
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274 #ifndef __T_UART_ESCAPE_CNF__ |
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275 #define __T_UART_ESCAPE_CNF__ |
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276 /* |
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277 * |
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278 * CCDGEN:WriteStruct_Count==3123 |
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279 */ |
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280 typedef struct |
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281 { |
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282 U8 device; /*< 0: 1> device number */ |
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283 U8 dlci; /*< 1: 1> data link connection identifier */ |
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284 U8 _align0; /*< 2: 1> alignment */ |
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285 U8 _align1; /*< 3: 1> alignment */ |
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286 } T_UART_ESCAPE_CNF; |
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287 #endif |
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288 |
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289 #ifndef __T_UART_DETECTED_IND__ |
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290 #define __T_UART_DETECTED_IND__ |
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291 /* |
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292 * |
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293 * CCDGEN:WriteStruct_Count==3124 |
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294 */ |
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295 typedef struct |
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296 { |
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297 U8 device; /*< 0: 1> device number */ |
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298 U8 dlci; /*< 1: 1> data link connection identifier */ |
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299 U8 cause; /*< 2: 1> cause of indication */ |
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300 U8 _align0; /*< 3: 1> alignment */ |
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301 } T_UART_DETECTED_IND; |
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302 #endif |
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303 |
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304 #ifndef __T_UART_ERROR_IND__ |
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305 #define __T_UART_ERROR_IND__ |
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306 /* |
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307 * |
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308 * CCDGEN:WriteStruct_Count==3125 |
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309 */ |
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310 typedef struct |
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311 { |
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312 U8 device; /*< 0: 1> device number */ |
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313 U8 dlci; /*< 1: 1> data link connection identifier */ |
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314 U8 error; /*< 2: 1> error code */ |
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315 U8 _align0; /*< 3: 1> alignment */ |
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316 } T_UART_ERROR_IND; |
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317 #endif |
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318 |
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319 #ifndef __T_UART_MUX_START_REQ__ |
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320 #define __T_UART_MUX_START_REQ__ |
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321 /* |
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322 * |
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323 * CCDGEN:WriteStruct_Count==3126 |
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324 */ |
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325 typedef struct |
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326 { |
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327 U8 device; /*< 0: 1> device number */ |
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328 U8 mode; /*< 1: 1> transparency mechanism */ |
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329 U8 frame_type; /*< 2: 1> type of frame */ |
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330 U8 _align0; /*< 3: 1> alignment */ |
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331 U16 n1; /*< 4: 2> maximum frame size */ |
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332 U8 t1; /*< 6: 1> acknowledgement timer */ |
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333 U8 n2; /*< 7: 1> maximum numer of retransmissions */ |
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334 U8 t2; /*< 8: 1> response timer for the multiplexer control channel */ |
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335 U8 t3; /*< 9: 1> wake up response timer */ |
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336 U8 _align1; /*< 10: 1> alignment */ |
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337 U8 _align2; /*< 11: 1> alignment */ |
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338 } T_UART_MUX_START_REQ; |
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339 #endif |
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340 |
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341 #ifndef __T_UART_MUX_START_CNF__ |
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342 #define __T_UART_MUX_START_CNF__ |
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343 /* |
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344 * |
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345 * CCDGEN:WriteStruct_Count==3127 |
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346 */ |
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347 typedef struct |
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348 { |
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349 U8 device; /*< 0: 1> device number */ |
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350 U8 _align0; /*< 1: 1> alignment */ |
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351 U8 _align1; /*< 2: 1> alignment */ |
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352 U8 _align2; /*< 3: 1> alignment */ |
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353 } T_UART_MUX_START_CNF; |
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354 #endif |
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355 |
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356 #ifndef __T_UART_MUX_DLC_ESTABLISH_IND__ |
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357 #define __T_UART_MUX_DLC_ESTABLISH_IND__ |
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358 /* |
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359 * |
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360 * CCDGEN:WriteStruct_Count==3128 |
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361 */ |
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362 typedef struct |
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363 { |
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364 U8 device; /*< 0: 1> device number */ |
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365 U8 dlci; /*< 1: 1> data link connection identifier */ |
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366 U8 convergence; /*< 2: 1> convergence layer */ |
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367 U8 _align0; /*< 3: 1> alignment */ |
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368 U16 n1; /*< 4: 2> maximum frame size */ |
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369 U8 service; /*< 6: 1> service on DLC */ |
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370 U8 _align1; /*< 7: 1> alignment */ |
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371 } T_UART_MUX_DLC_ESTABLISH_IND; |
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372 #endif |
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373 |
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374 #ifndef __T_UART_MUX_DLC_ESTABLISH_RES__ |
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375 #define __T_UART_MUX_DLC_ESTABLISH_RES__ |
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376 /* |
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377 * |
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378 * CCDGEN:WriteStruct_Count==3129 |
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379 */ |
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380 typedef struct |
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381 { |
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382 U8 device; /*< 0: 1> device number */ |
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383 U8 dlci; /*< 1: 1> data link connection identifier */ |
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384 U16 n1; /*< 2: 2> maximum frame size */ |
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385 } T_UART_MUX_DLC_ESTABLISH_RES; |
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386 #endif |
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387 |
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388 #ifndef __T_UART_MUX_DLC_RELEASE_REQ__ |
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389 #define __T_UART_MUX_DLC_RELEASE_REQ__ |
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390 /* |
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391 * |
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392 * CCDGEN:WriteStruct_Count==3130 |
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393 */ |
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394 typedef struct |
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395 { |
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396 U8 device; /*< 0: 1> device number */ |
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397 U8 dlci; /*< 1: 1> data link connection identifier */ |
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398 U8 _align0; /*< 2: 1> alignment */ |
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399 U8 _align1; /*< 3: 1> alignment */ |
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400 } T_UART_MUX_DLC_RELEASE_REQ; |
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401 #endif |
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402 |
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403 #ifndef __T_UART_MUX_DLC_RELEASE_IND__ |
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404 #define __T_UART_MUX_DLC_RELEASE_IND__ |
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405 /* |
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406 * |
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407 * CCDGEN:WriteStruct_Count==3131 |
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408 */ |
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409 typedef struct |
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410 { |
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411 U8 device; /*< 0: 1> device number */ |
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412 U8 dlci; /*< 1: 1> data link connection identifier */ |
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413 U8 _align0; /*< 2: 1> alignment */ |
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414 U8 _align1; /*< 3: 1> alignment */ |
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415 } T_UART_MUX_DLC_RELEASE_IND; |
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416 #endif |
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417 |
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418 #ifndef __T_UART_MUX_SLEEP_REQ__ |
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419 #define __T_UART_MUX_SLEEP_REQ__ |
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420 /* |
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421 * |
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422 * CCDGEN:WriteStruct_Count==3132 |
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423 */ |
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424 typedef struct |
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425 { |
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426 U8 device; /*< 0: 1> device number */ |
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427 U8 _align0; /*< 1: 1> alignment */ |
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428 U8 _align1; /*< 2: 1> alignment */ |
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429 U8 _align2; /*< 3: 1> alignment */ |
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430 } T_UART_MUX_SLEEP_REQ; |
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431 #endif |
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432 |
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433 #ifndef __T_UART_MUX_SLEEP_IND__ |
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434 #define __T_UART_MUX_SLEEP_IND__ |
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435 /* |
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436 * |
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437 * CCDGEN:WriteStruct_Count==3133 |
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438 */ |
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439 typedef struct |
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440 { |
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441 U8 device; /*< 0: 1> device number */ |
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442 U8 _align0; /*< 1: 1> alignment */ |
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443 U8 _align1; /*< 2: 1> alignment */ |
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444 U8 _align2; /*< 3: 1> alignment */ |
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445 } T_UART_MUX_SLEEP_IND; |
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446 #endif |
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447 |
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448 #ifndef __T_UART_MUX_WAKEUP_REQ__ |
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449 #define __T_UART_MUX_WAKEUP_REQ__ |
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450 /* |
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451 * |
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452 * CCDGEN:WriteStruct_Count==3134 |
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453 */ |
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454 typedef struct |
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455 { |
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456 U8 device; /*< 0: 1> device number */ |
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457 U8 _align0; /*< 1: 1> alignment */ |
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458 U8 _align1; /*< 2: 1> alignment */ |
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459 U8 _align2; /*< 3: 1> alignment */ |
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460 } T_UART_MUX_WAKEUP_REQ; |
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461 #endif |
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462 |
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463 #ifndef __T_UART_MUX_WAKEUP_IND__ |
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464 #define __T_UART_MUX_WAKEUP_IND__ |
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465 /* |
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466 * |
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467 * CCDGEN:WriteStruct_Count==3135 |
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468 */ |
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469 typedef struct |
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470 { |
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471 U8 device; /*< 0: 1> device number */ |
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472 U8 _align0; /*< 1: 1> alignment */ |
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473 U8 _align1; /*< 2: 1> alignment */ |
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474 U8 _align2; /*< 3: 1> alignment */ |
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475 } T_UART_MUX_WAKEUP_IND; |
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476 #endif |
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477 |
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478 #ifndef __T_UART_MUX_CLOSE_REQ__ |
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479 #define __T_UART_MUX_CLOSE_REQ__ |
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480 /* |
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481 * |
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482 * CCDGEN:WriteStruct_Count==3136 |
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483 */ |
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484 typedef struct |
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485 { |
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486 U8 device; /*< 0: 1> device number */ |
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487 U8 _align0; /*< 1: 1> alignment */ |
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488 U8 _align1; /*< 2: 1> alignment */ |
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489 U8 _align2; /*< 3: 1> alignment */ |
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490 } T_UART_MUX_CLOSE_REQ; |
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491 #endif |
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492 |
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493 #ifndef __T_UART_MUX_CLOSE_IND__ |
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494 #define __T_UART_MUX_CLOSE_IND__ |
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495 /* |
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496 * |
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497 * CCDGEN:WriteStruct_Count==3137 |
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498 */ |
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499 typedef struct |
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500 { |
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501 U8 device; /*< 0: 1> device number */ |
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502 U8 _align0; /*< 1: 1> alignment */ |
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503 U8 _align1; /*< 2: 1> alignment */ |
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504 U8 _align2; /*< 3: 1> alignment */ |
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505 } T_UART_MUX_CLOSE_IND; |
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506 #endif |
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507 |
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508 #ifndef __T_UART_DRIVER_SENT_IND__ |
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509 #define __T_UART_DRIVER_SENT_IND__ |
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510 /* |
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511 * |
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512 * CCDGEN:WriteStruct_Count==3138 |
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513 */ |
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514 typedef struct |
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515 { |
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516 U32 devId; /*< 0: 4> device ID */ |
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517 } T_UART_DRIVER_SENT_IND; |
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518 #endif |
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519 |
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520 #ifndef __T_UART_DRIVER_RECEIVED_IND__ |
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521 #define __T_UART_DRIVER_RECEIVED_IND__ |
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522 /* |
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523 * |
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524 * CCDGEN:WriteStruct_Count==3139 |
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525 */ |
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526 typedef struct |
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527 { |
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528 U32 devId; /*< 0: 4> device ID */ |
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529 } T_UART_DRIVER_RECEIVED_IND; |
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530 #endif |
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531 |
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532 #ifndef __T_UART_DRIVER_FLUSHED_IND__ |
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533 #define __T_UART_DRIVER_FLUSHED_IND__ |
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534 /* |
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535 * |
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536 * CCDGEN:WriteStruct_Count==3140 |
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537 */ |
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538 typedef struct |
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539 { |
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540 U32 devId; /*< 0: 4> device ID */ |
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541 } T_UART_DRIVER_FLUSHED_IND; |
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542 #endif |
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543 |
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544 #ifndef __T_UART_DRIVER_CONNECT_IND__ |
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545 #define __T_UART_DRIVER_CONNECT_IND__ |
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546 /* |
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547 * |
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548 * CCDGEN:WriteStruct_Count==3141 |
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549 */ |
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550 typedef struct |
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551 { |
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552 U32 devId; /*< 0: 4> device ID */ |
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553 } T_UART_DRIVER_CONNECT_IND; |
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554 #endif |
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555 |
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556 #ifndef __T_UART_DRIVER_DISCONNECT_IND__ |
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557 #define __T_UART_DRIVER_DISCONNECT_IND__ |
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558 /* |
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559 * |
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560 * CCDGEN:WriteStruct_Count==3142 |
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561 */ |
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562 typedef struct |
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563 { |
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564 U32 devId; /*< 0: 4> device ID */ |
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565 } T_UART_DRIVER_DISCONNECT_IND; |
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566 #endif |
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567 |
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568 #ifndef __T_UART_DRIVER_CLEAR_IND__ |
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569 #define __T_UART_DRIVER_CLEAR_IND__ |
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570 /* |
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571 * |
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572 * CCDGEN:WriteStruct_Count==3143 |
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573 */ |
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574 typedef struct |
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575 { |
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576 U32 devId; /*< 0: 4> device ID */ |
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577 } T_UART_DRIVER_CLEAR_IND; |
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578 #endif |
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579 |
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580 |
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581 #include "CDG_LEAVE.h" |
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582 |
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583 |
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584 #endif |