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annotate src/g23m-aci/uart/uart_drxp.c @ 294:cd37d228dae0

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src/gpf2/{misc,tst}: import from TCS211 semi-src with CRLF line endings and directory name capitalization cleaned up
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 21 Oct 2017 01:12:15 +0000
parents 53929b40109c
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
162
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
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1 /*
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2 +-----------------------------------------------------------------------------
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3 | Project :
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4 | Modul :
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5 +-----------------------------------------------------------------------------
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6 | Copyright 2002 Texas Instruments Berlin, AG
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7 | All rights reserved.
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8 |
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9 | This file is confidential and a trade secret of Texas
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10 | Instruments Berlin, AG
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11 | The receipt of or possession of this file does not convey
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12 | any rights to reproduce or disclose its contents or to
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13 | manufacture, use, or sell anything it may describe, in
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14 | whole, or in part, without the specific written consent of
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15 | Texas Instruments Berlin, AG.
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16 +-----------------------------------------------------------------------------
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17 | Purpose : This modul is part of the entity UART and implements all
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18 | functions to handles the incoming primitives as described in
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19 | the SDL-documentation (DRX-statemachine)
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20 +-----------------------------------------------------------------------------
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21 */
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22
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23 #ifndef UART_DRXP_C
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24 #define UART_DRXP_C
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25 #endif /* !UART_DRXP_C */
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26
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27 #define ENTITY_UART
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28
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29 /*==== INCLUDES =============================================================*/
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30
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31 #ifdef WIN32
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32 #include "nucleus.h"
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33 #endif /* WIN32 */
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34 #include "typedefs.h" /* to get Condat data types */
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35 #include "vsi.h" /* to get a lot of macros */
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36 #include "macdef.h" /* to get a lot of macros */
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37 #include "custom.h"
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38 #include "gsm.h" /* to get a lot of macros */
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39 #include "cnf_uart.h" /* to get cnf-definitions */
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40 #include "mon_uart.h" /* to get mon-definitions */
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41 #include "prim.h" /* to get the definitions of used SAP and directions */
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42 #include "dti.h" /* to get dti lib */
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43 #include "pei.h" /* to get PEI interface */
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44 #ifdef FF_MULTI_PORT
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45 #include "gsi.h" /* to get definitions of serial driver */
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46 #else /* FF_MULTI_PORT */
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47 #ifdef _TARGET_
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48 #include "uart/serialswitch.h"
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49 #include "uart/traceswitch.h"
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50 #else /* _TARGET_ */
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51 #include "serial_dat.h" /* to get definitions of serial driver */
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52 #endif /* _TARGET_ */
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53 #endif /* FF_MULTI_PORT */
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54 #include "uart.h" /* to get the global entity definitions */
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55
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56 #include "uart_kers.h" /* to get signal definitions for service KER */
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57 #ifdef FF_MULTI_PORT
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58 #include "uart_ptxs.h" /* to get signal definitions for service TX */
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59 #else /* FF_MULTI_PORT */
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60 #include "uart_txs.h" /* to get signal definitions for service TX */
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61 #endif /* FF_MULTI_PORT */
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62 #include "uart_drxf.h" /* to get function definitions for service DRX */
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63
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64 #ifdef _SIMULATION_
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65 #include <stdio.h> /* to get sprintf */
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66 #endif /* _SIMULATION_ */
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67
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68 /*==== CONST ================================================================*/
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69
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70 /*==== LOCAL VARS ===========================================================*/
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71
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72 /*==== PRIVATE FUNCTIONS ====================================================*/
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73
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74 /*==== PUBLIC FUNCTIONS =====================================================*/
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75
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76
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77
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78 /*
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79 +------------------------------------------------------------------------------
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80 | Function : sig_dti_drx_data_received_ind
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81 +------------------------------------------------------------------------------
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82 | Description : Handles the DTILIB callback call DTI_REASON_DATA_RECEIVED
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83 | This signal means that data has been received on a dti
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84 | connection.
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85 |
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86 | Parameter : dti_data2_ind
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87 |
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88 +------------------------------------------------------------------------------
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89 */
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90 GLOBAL void sig_dti_drx_data_received_ind(T_DTI2_DATA_IND *dti_data2_ind)
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91 {
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92 T_desc2* temp_desc1;
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93 T_desc2* temp_desc2;
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94
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95 TRACE_FUNCTION( "drx_dti_data_req" );
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96
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97 #ifdef UART_RANGE_CHECK
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98 if(dti_data2_ind EQ NULL)
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99 {
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100 TRACE_EVENT("ERROR: dti_data2_ind is NULL");
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101 }
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102 else if((*((ULONG*)((UBYTE*)dti_data2_ind - sizeof(T_PRIM_HEADER) - 8))) NEQ 0)
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103 {
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104 TRACE_EVENT_P1("ERROR: dti_data2_ind=%08x is not allocated",
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105 dti_data2_ind);
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106 }
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107 else
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108 {
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109 T_desc2* range_desc;
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110 USHORT range_sum;
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111 if((dti_data2_ind->parameters.st_lines.st_flow NEQ DTI_FLOW_ON) &&
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112 (dti_data2_ind->parameters.st_lines.st_flow NEQ DTI_FLOW_OFF))
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113 {
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114 TRACE_EVENT_P1("ERROR: st_flow=%d is invalid",
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115 dti_data2_ind->parameters.st_lines.st_flow);
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116 }
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117 if((dti_data2_ind->parameters.st_lines.st_line_sa NEQ DTI_SA_ON) &&
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
118 (dti_data2_ind->parameters.st_lines.st_line_sa NEQ DTI_SA_OFF))
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
119 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
120 TRACE_EVENT_P1("ERROR: st_line_sa=%d is invalid",
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
121 dti_data2_ind->parameters.st_lines.st_line_sa);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
122 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
123 if((dti_data2_ind->parameters.st_lines.st_line_sb NEQ DTI_SB_ON) &&
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
124 (dti_data2_ind->parameters.st_lines.st_line_sb NEQ DTI_SB_OFF))
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
125 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
126 TRACE_EVENT_P1("ERROR: st_line_sb=%d is invalid",
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
127 dti_data2_ind->parameters.st_lines.st_line_sb);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
128 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
129 range_desc = (T_desc2*)(dti_data2_ind->desc_list2.first);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
130 range_sum = 0;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
131 while((range_desc) &&
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
132 ((*((ULONG*)((UBYTE*)range_desc - 8))) EQ 0))
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134 range_sum += range_desc->len;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135 range_desc = (T_desc2*)(range_desc->next);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
136 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137 if(range_desc)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
138 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
139 TRACE_EVENT_P1("ERROR: data descriptor (%08x) not allocated",
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140 range_desc);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 else if(range_sum NEQ dti_data_req->desc_list2.list_len)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144 TRACE_EVENT_P2("ERROR: datalength=%d NEQ list_len=%d",
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145 range_sum,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146 dti_data2_ind->desc_list2.list_len);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
148 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
149 #endif /* UART_RANGE_CHECK */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
150
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
151 switch( GET_STATE( UART_SERVICE_DRX ) )
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
152 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
153 case DRX_READY:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
154 SET_STATE( UART_SERVICE_DRX, DRX_NOT_READY );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
155 dti_stop(
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
156 uart_hDTI,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
157 uart_data->device,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
158 UART_DTI_UP_INTERFACE,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
159 uart_data->drx->dlc_instance
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
160 );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
161 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
162 * store data descriptor
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
163 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
164 temp_desc1 = (T_desc2*)(dti_data2_ind->desc_list2.first);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
165 while((temp_desc1) &&
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
166 (temp_desc1->len EQ 0))
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
167 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
168 temp_desc2 = (T_desc2*)temp_desc1->next;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
169 MFREE(temp_desc1);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
170 temp_desc1 = temp_desc2;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
171 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
172 uart_data->drx->received_data = temp_desc1;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
173 uart_data->drx->read_pos = 0;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
174
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
175 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
176 * inform kernel about line states
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
177 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
178 sig_drx_ker_line_states_ind(uart_data->drx->dlc_instance,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
179 dti_data2_ind->parameters.st_lines.st_flow,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
180 dti_data2_ind->parameters.st_lines.st_line_sa,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
181 dti_data2_ind->parameters.st_lines.st_line_sb,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
182 dti_data2_ind->parameters.st_lines.st_break_len);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
184 * check if service can send data to peer
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
185 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
186 if(uart_data->drx->data_flow EQ UART_FLOW_ENABLED)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
188 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
189 * yes, now if there is data to send, do it
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
190 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191 if(uart_data->drx->received_data)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193 sig_drx_tx_data_available_ind( uart_data->drx->dlc_instance,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194 uart_data->drx->received_data,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
195 uart_data->drx->read_pos );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
196 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197 else
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
198 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
200 * no data to send, do positive flow control towards upper layer
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
202 SET_STATE( UART_SERVICE_DRX, DRX_READY );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203 dti_start(
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204 uart_hDTI,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205 uart_data->device,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206 UART_DTI_UP_INTERFACE,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207 uart_data->drx->dlc_instance
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208 );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
211 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
212
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
213 default:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
214 TRACE_ERROR( "DTI_DATA2_IND unexpected" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
215 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
216 * since the descriptor will not be sent, free it
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
218 MFREE_DESC2( dti_data2_ind->desc_list2.first );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
219 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
220 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
221
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
222 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
223 * free primitive (freeing of descriptors has been done before if necessary)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
225 PFREE( dti_data2_ind );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
226 } /* sig_dti_drx_data_received_ind() */