FreeCalypso > hg > fc-magnetite
annotate src/cs/layer1/p_include/l1p_deft.h @ 561:dc1e0a1c100f
sleep logic change: allow big sleep when UART or SIM is blocking deep sleep
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sun, 06 Jan 2019 21:12:51 +0000 |
parents | 945cf7f506b2 |
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rev | line source |
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1 /************* Revision Controle System Header ************* |
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2 * GSM Layer 1 software |
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3 * L1P_DEFTY.H |
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4 * |
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5 * Filename l1p_deft.h |
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6 * Copyright 2003 (C) Texas Instruments |
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7 * |
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8 ************* Revision Controle System Header *************/ |
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9 |
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10 typedef struct |
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11 { |
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12 WORD32 rand; |
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13 UWORD16 channel_request_data; |
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14 UWORD8 bs_prach_blks; |
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15 UWORD8 prach_alloc; |
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16 UWORD32 fn_to_report; |
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17 } |
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18 T_PRACH_INFO; |
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19 |
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20 typedef union |
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21 { |
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22 UWORD16 prach_data[12]; |
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23 UWORD8 cs1_data[24]; |
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24 } |
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25 T_CHAN_REQ_DATA; |
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26 |
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27 typedef struct |
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28 { |
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29 UWORD8 pol_resp_type; |
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30 T_CHAN_REQ_DATA chan_req; |
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31 UWORD32 fn; |
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32 UWORD8 timing_advance; |
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33 UWORD32 fn_to_report; |
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34 } |
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35 T_POLL_INFO; |
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36 |
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37 |
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38 typedef struct |
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39 { |
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40 UWORD8 data_array[23]; |
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41 UWORD8 tn; |
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42 UWORD8 dl_tn_to_restore; |
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43 UWORD8 activity; |
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44 } |
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45 T_SINGLE_BLOCK; |
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46 |
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47 |
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48 typedef struct |
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49 { |
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50 UWORD32 SignalCode; |
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51 UWORD8 assignment_id; |
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52 UWORD8 synchro_tn; |
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53 UWORD8 allocated_tbf; |
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54 UWORD8 dl_tbf_synchro_timeslot; |
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55 UWORD8 ul_tbf_synchro_timeslot; |
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56 UWORD8 transfer_synchro_timeslot; |
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57 |
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58 UWORD8 assignment_command; |
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59 UWORD8 multislot_class; |
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60 T_PACKET_TA packet_ta; |
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61 T_DL_POWER_CTL dl_pwr_ctl; |
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62 UWORD8 tsc; |
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63 T_PACKET_FREQ_PARAM freq_param; |
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64 UWORD8 mac_mode; |
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65 T_TBF_STI tbf_sti; |
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66 |
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67 T_UL_RESSOURCE_ALLOC *ul_tbf_alloc; |
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68 T_DL_RESSOURCE_ALLOC dl_tbf_alloc; |
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69 |
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70 BOOL interf_meas_enable; |
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71 UWORD8 ts_override; |
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72 BOOL pc_meas_chan; |
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73 } |
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74 T_TRANSFER_SET; |
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75 |
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76 |
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77 typedef struct |
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78 { |
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79 UWORD8 ta_update_cmd; |
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80 UWORD8 assignment_id; |
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81 UWORD16 radio_freq; |
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82 UWORD8 activity; |
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83 BOOL request_dl; |
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84 T_PACKET_TA packet_ta; |
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85 } |
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86 T_PTCCH_PARAM; |
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87 |
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88 typedef struct |
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89 { |
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90 UWORD8 tbf_release_cmd; |
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91 UWORD8 released_tbf; |
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92 } |
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93 T_TBF_RELEASE_PARAM; |
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94 |
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95 typedef struct |
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96 { |
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97 UWORD8 pdch_release_cmd; |
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98 UWORD8 timeslot_available; |
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99 UWORD8 assignment_id; |
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100 } |
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101 T_PDCH_RELEASE_PARAM; |
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102 |
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103 typedef struct |
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104 { |
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105 UWORD8 assignment_id; |
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106 UWORD8 txpwr[8]; |
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107 BOOL crc_error; |
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108 WORD8 bcch_level; |
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109 UWORD16 radio_freq_tbl[4]; |
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110 WORD8 burst_level[4]; |
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111 } |
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112 T_DL_PWR_CTRL; |
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113 |
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114 typedef struct |
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115 { |
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116 UWORD8 psi_param_update_cmd; |
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117 UWORD8 Scell_pb; |
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118 UWORD8 access_burst_type; |
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119 } |
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120 T_PSI_PARAM_UPDATE; |
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121 |
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122 typedef struct |
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123 { |
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124 BOOL semaphore; |
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125 |
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126 T_TRANSFER_SET *aset; |
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127 T_TRANSFER_SET *fset[2]; |
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128 T_TRANSFER_SET set[3]; |
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129 |
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130 T_UL_RESSOURCE_ALLOC ul_tbf_alloc[3]; |
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131 |
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132 T_SINGLE_BLOCK single_block; |
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133 |
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134 T_PTCCH_PARAM ptcch; |
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135 T_TBF_RELEASE_PARAM tbf_release_param; |
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136 T_PDCH_RELEASE_PARAM pdch_release_param; |
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137 T_MPHP_REPEAT_UL_FIXED_ALLOC_REQ repeat_alloc; |
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138 T_PSI_PARAM_UPDATE psi_param; |
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139 |
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140 T_DL_PWR_CTRL dl_pwr_ctrl; |
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141 } |
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142 T_TRANSFER_PARAM; |
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143 |
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144 /***************************************************************************************/ |
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145 /* L1S packet global variable structure... */ |
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146 /***************************************************************************************/ |
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147 |
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148 typedef struct |
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149 { |
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150 BOOL new_set; |
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151 UWORD8 assignment_id; |
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152 UWORD8 allocated_tbf; |
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153 UWORD8 dl_tfi; |
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154 UWORD8 ul_tfi; |
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155 T_DL_POWER_CTL dl_pwr_ctl; |
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156 BOOL pc_meas_chan; |
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157 UWORD16 radio_freq_for_lna; |
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158 } T_READ_PARAM; |
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159 |
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160 typedef struct |
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161 { |
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162 UWORD8 ILmin_beacon; |
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163 UWORD8 ILmin_others[8]; |
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164 |
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165 // No power control AGC algorithm variables |
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166 UWORD32 fn_select; |
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167 BOOL phase; |
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168 |
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169 // Downlink power control mode B variables |
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170 UWORD8 last_PR_good; |
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171 |
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172 // TBF Parameters used during the PDTCH read phase |
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173 T_READ_PARAM read_param; |
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174 |
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175 // Flag used to know if the pc_meas_chan measurement has been controlled |
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176 BOOL pc_meas_chan_ctrl; |
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177 } |
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178 T_L1PS_GLOBAL; |
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179 |
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180 /***********************************************************/ |
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181 /* L1PA global variable structure... */ |
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182 /***********************************************************/ |
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183 typedef struct |
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184 { |
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185 // State for L1A state machines... |
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186 //----------------------------------------- |
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187 UWORD8 state[NBR_L1PA_PROCESSES]; |
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188 |
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189 // Measurement tasks management... |
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190 //----------------------------------------- |
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191 UWORD32 l1pa_en_meas[NBR_L1PA_PROCESSES]; |
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192 } |
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193 T_L1PA_GLOBAL; |
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194 |
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195 |
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196 /*************************************************************/ |
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197 /* Packet Idle mode tasks information... */ |
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198 /*************************************************************/ |
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199 /* must be filled according to Packet Idle parameters... */ |
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200 /* ... */ |
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201 /*************************************************************/ |
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202 // Packet Idle Parameter description |
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203 typedef struct |
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204 { |
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205 UWORD16 radio_freq; |
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206 UWORD16 radio_freq_d; |
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207 UWORD16 radio_freq_dd; |
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208 } |
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209 T_P_IDLE_PARAM; |
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210 |
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211 // Packet Paging description |
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212 typedef struct |
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213 { |
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214 // -------- Packet Paging description -------------- |
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215 UWORD8 bs_pag_blks_res; // BS_PAG_BLKS_RES parameter (cf. S921 specification) |
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216 UWORD8 bs_pbcch_blks; // BS_PBCCH_BLKS parameter (cf. S921 specification) |
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217 T_PACKET_CHANNEL_DESC packet_chn_desc; // Packet Channel Description: arfcn/Hopping description + TN + TSC |
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218 T_MOBILE_ALLOCATION frequency_list; // Mobile allocation description |
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219 UWORD8 nb_ppch_per_mf52;// Number of Packet PCCH per MF52 |
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220 UWORD16 first_pg_grp; // First Paging Group index |
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221 UWORD16 pg_blks_avail; // Number of Paging blocks available per MF52 |
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222 UWORD16 pg_offset; // (IMSI mo 1000) div (KC*N) (Note N = 1 for PCCCH) |
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223 UWORD16 split_pg_value; // Min(pg_blks_avail, split_pg_cycle) |
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224 |
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225 //-- |
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226 BOOL epg_computation; // Packet Paging STATE used in Extended Paging scheduling |
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227 UWORD16 pnp_period; // Paging Period = (52*64)/split_pg_value |
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228 WORD16 time_to_pnp; // Time to next PPCH block position. |
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229 } |
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230 T_PCCCH_PARAM; |
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231 |
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232 typedef struct |
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233 { |
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234 BOOL change_synchro; |
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235 BOOL control_offset; |
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236 BOOL read_all_psi; |
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237 |
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238 UWORD8 nbr_psi; |
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239 UWORD8 bs_pbcch_blks; |
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240 UWORD8 psi1_repeat_period; |
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241 UWORD8 relative_position_array[20]; // Array for Relative position |
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242 UWORD16 offset_array[20]; // Array of offset computed from relative position |
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243 T_PACKET_CHANNEL_DESC packet_chn_desc; // Packet Channel Description: arfcn/Hopping description + TN + TSC |
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244 T_MOBILE_ALLOCATION frequency_list; // Mobile allocation description |
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245 UWORD8 rel_pos_to_report; // Relative Position of the PBCCH block read and to |
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246 // to report to L3. |
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247 UWORD16 pbcch_period; // PBCCH period = MFL52 * psi1_repaet_period; |
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248 UWORD8 tn_pbcch; // Time slot number relative for DSP point of view. |
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249 } |
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250 T_PBCCHS_PARAM; |
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251 |
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252 typedef struct |
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253 { |
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254 BOOL change_synchro; |
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255 |
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256 UWORD8 pb; |
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257 UWORD8 bs_pbcch_blks; |
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258 UWORD8 psi1_repeat_period; |
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259 UWORD8 relative_position; // for Relative position |
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260 UWORD16 offset; // offset computed from relative position |
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261 T_PACKET_CHANNEL_DESC packet_chn_desc; // Packet Channel Description: arfcn/Hopping description + TN + TSC |
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262 T_MOBILE_ALLOCATION frequency_list; // Mobile allocation description |
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263 UWORD16 pbcch_period; // PBCCH period = MFL52 * psi1_repaet_period; |
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264 UWORD16 bcch_carrier; // beacon of the neighbor cell (used by the DSP) |
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265 WORD32 fn_offset; |
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266 WORD32 time_alignmt; |
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267 } |
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268 T_PBCCHN_PARAM; |
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269 |
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270 typedef struct |
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271 { |
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272 BOOL dsp_r_page_switch_req; // If true, the dsp_r_page must be toggled in the interference measurement read |
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273 UWORD8 multislot_class; // Mobile multislot class |
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274 UWORD8 meas_bitmap; // Timeslots on which the interference measurements are done |
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275 UWORD8 position; // Position on which measurements must be done (search or ptcch frame) |
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276 UWORD8 idle_tn_rx; // Timeslot bitmap in packet idle with PCCCH on the frame before |
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277 UWORD8 idle_tn_no_rx; // Timeslot bitmap in packet idle without PCCCH on the frame before |
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278 UWORD16 radio_freq; // Radio freq. processed by l1s_hopping_algo() |
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279 T_PACKET_FREQ_PARAM packet_intm_freq_param; // Frequency parameters |
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280 } |
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281 T_ITMEAS_PARAM; |
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282 |
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283 typedef struct |
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284 { |
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285 UWORD32 fn; // Absolute FN reported during the last measurement session |
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286 UWORD8 rxlev[8]; // Buffer used to save the parameters reported to L3 |
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287 UWORD8 meas_bitmap; // Interf meas bitmap. |
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288 UWORD8 id; // Id. |
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289 } T_L1A_INT_MEAS_PARAM; |
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290 |
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291 typedef struct |
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292 { |
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293 UWORD8 lna; // Input level result |
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294 UWORD8 il; // LNA parameter |
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295 } |
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296 T_IL_LNA; |
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297 |
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298 typedef struct |
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299 { |
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300 UWORD8 next_to_ctrl; // Carrier for next power measurement result. |
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301 UWORD8 next_to_read; // Next carrier to measure. |
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302 |
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303 UWORD8 pnp_ctrl; // Specify to l1s_meas_manager() that a PPCH burst has been ctrl. |
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304 |
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305 UWORD8 ms_ctrl; |
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306 UWORD8 ms_ctrl_d; |
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307 UWORD8 ms_ctrl_dd; |
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308 |
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309 T_IL_LNA used_il_lna[NB_MEAS_MAX_GPRS]; |
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310 T_IL_LNA used_il_lna_d[NB_MEAS_MAX_GPRS]; |
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311 T_IL_LNA used_il_lna_dd[NB_MEAS_MAX_GPRS]; |
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312 } |
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313 T_CR_FREQ_LIST; |
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314 |
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315 typedef struct |
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316 { |
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317 UWORD8 nb_carrier; |
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318 UWORD16 freq_list[32+1]; |
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319 UWORD8 list_id; |
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320 } T_CRES_LIST_PARAM; |
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321 |
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322 typedef struct |
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323 { |
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324 T_CRES_LIST_PARAM *alist; |
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325 T_CRES_LIST_PARAM *flist; |
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326 T_CRES_LIST_PARAM list[2]; |
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327 } T_CRES_FREQ_LIST; |
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328 |
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329 typedef struct |
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330 { |
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331 UWORD8 tcr_next_to_ctrl; |
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332 UWORD8 tcr_next_to_read; |
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333 UWORD8 last_stored_tcr_to_read; |
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334 |
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335 UWORD8 ms_ctrl; |
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336 UWORD8 ms_ctrl_d; |
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337 UWORD8 ms_ctrl_dd; |
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338 |
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339 BOOL first_pass_flag; |
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340 |
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341 T_IL_LNA used_il_lna; |
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342 T_IL_LNA used_il_lna_d; |
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343 T_IL_LNA used_il_lna_dd; |
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344 |
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345 BOOL new_list_present; |
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346 |
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347 WORD8 beacon_meas; |
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348 |
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349 WORD8 fn_report; |
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350 UWORD8 cres_meas_report; |
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351 |
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352 } T_TCR_LIST_SET; |
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353 |
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354 /***************************************************************************************/ |
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355 /* L1A <-> L1S communication structure dedicated to packet mode */ |
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356 /***************************************************************************************/ |
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357 typedef struct |
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358 { |
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359 // Packet Idle Parameters |
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360 |
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361 // PCCCH parameters |
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362 T_PCCCH_PARAM pccch; |
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363 |
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364 //-- |
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365 T_P_IDLE_PARAM p_idle_param; // Packet Idle Parameters description |
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366 |
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367 // Packet Access Parameters |
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368 T_PRACH_INFO pra_info; |
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369 |
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370 // Packet Access Parameters |
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371 T_POLL_INFO poll_info; |
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372 |
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373 // Packet Transfer Parameters |
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374 T_TRANSFER_PARAM transfer; |
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375 |
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376 // Serving Cell PBCCH parameters |
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377 T_PBCCHS_PARAM pbcchs; |
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378 |
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379 // Neigbour Cell PBCCH parameters |
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380 T_PBCCHN_PARAM pbcchn; |
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381 |
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382 // Interference measurement parameters |
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383 T_ITMEAS_PARAM itmeas; |
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384 |
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385 // Measurement tasks management... |
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386 //----------------------------------------- |
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387 UWORD32 meas_param; // Synchro semaphore bit register for packet measurement tasks. |
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388 UWORD32 l1ps_en_meas; // Enable packet Meas task bit register. |
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389 |
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390 // Access burst type |
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391 //------------------ |
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392 UWORD8 access_burst_type; |
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393 |
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394 // Frequency list Parameters used in Cell Reselection measurements |
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395 // --------------------------------------------------------------- |
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396 T_CR_FREQ_LIST cr_freq_list; |
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397 |
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398 // Parameters used in Packet Transfer Neighbour measurement task |
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399 // ------------------------------------------------------------- |
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400 T_TCR_LIST_SET tcr_freq_list; |
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401 |
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402 // Cell Reselection list, used both in Packet Idle and Packet Transfer |
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403 // ------------------------------------------------------------------- |
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404 T_CRES_FREQ_LIST cres_freq_list; |
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405 |
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406 } T_L1PA_L1PS_COM; |
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407 |
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408 |
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409 /***************************************************************************************/ |
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410 /* API (MCU <-> DSP) communication structures */ |
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411 /***************************************************************************************/ |
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412 |
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413 typedef struct |
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414 { |
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415 // GPRS Extension............... |
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416 API d_task_d_gprs; // (map?) Task, burst per burst (part of header) |
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417 API d_task_u_gprs; // (map?) Task, burst per burst (part of header) |
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418 API d_task_pm_gprs; // (map?) Task, burst per burst (part of header) |
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419 API d_burst_nb_gprs; // (map?) burst identifier. (part of header) |
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420 API a_ctrl_abb_gprs[8]; // (map?) Analog baseband control, burst per burst. |
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421 API a_ctrl_power_gprs[8]; // (map?) Power control value, burst per burst. |
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422 } |
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423 T_DB_MCU_TO_DSP_GPRS; |
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424 |
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425 typedef struct |
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426 { |
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427 // GPRS Extension............... |
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428 API d_task_d_gprs; // (map?) Task, burst per burst (part of header) |
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429 API d_task_u_gprs; // (map?) Task, burst per burst (part of header) |
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430 API d_task_pm_gprs; // (map?) Task, burst per burst (part of header) |
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431 API d_burst_nb_gprs; // (map?) burst identifier. (part of header) |
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432 |
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433 API a_burst_toa_gprs[8]; // (map?) Time of arrival, burst per burst |
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434 API a_burst_pm_gprs[8]; // (map?) Receive Power Level, burst per burst |
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435 API a_burst_angle_gprs[8];// (map?) Angle deviation, burst per burst |
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436 API a_burst_snr_gprs[8]; // (map?) Signal to noise ratio, burst per burst |
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437 } |
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438 T_DB_DSP_TO_MCU_GPRS; |
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439 |
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440 #if (DSP == 34) || (DSP == 35) || (DSP == 36) |
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441 typedef struct |
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442 { |
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443 // GEA module |
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444 API d_gea_mode; |
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445 API a_gea_kc[4]; |
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446 |
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447 API d_hole1_ndb_gprs[8]; |
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parents:
diff
changeset
|
448 API d_a5mode_ovly; |
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parents:
diff
changeset
|
449 |
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parents:
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changeset
|
450 API d_sched_mode_gprs; |
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parents:
diff
changeset
|
451 |
945cf7f506b2
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parents:
diff
changeset
|
452 API d_hole2_ndb_gprs[5]; |
945cf7f506b2
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parents:
diff
changeset
|
453 |
945cf7f506b2
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parents:
diff
changeset
|
454 API d_usf_updated_gprs; |
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parents:
diff
changeset
|
455 API d_win_start_gprs; |
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parents:
diff
changeset
|
456 API d_usf_vote_enable; |
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parents:
diff
changeset
|
457 API d_bbctrl_gprs; |
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parents:
diff
changeset
|
458 |
945cf7f506b2
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parents:
diff
changeset
|
459 API d_hole3_ndb_gprs[2]; |
945cf7f506b2
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parents:
diff
changeset
|
460 |
945cf7f506b2
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parents:
diff
changeset
|
461 // (map?) BTS physical timeslot mapping. |
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parents:
diff
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|
462 API a_ctrl_ched_gprs[8]; // (map?) Ched configuration, burst per burst |
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parents:
diff
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|
463 API a_ul_buffer_gprs[8]; // (map?) UL burst / UL buffer mapping, burst per burst. (part of header) |
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parents:
diff
changeset
|
464 API a_usf_gprs[8]; |
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parents:
diff
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|
465 API a_interf_meas_gprs[8]; |
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parents:
diff
changeset
|
466 |
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parents:
diff
changeset
|
467 API a_ptcchu_gprs[4]; |
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parents:
diff
changeset
|
468 |
945cf7f506b2
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parents:
diff
changeset
|
469 API a_dd_md_gprs[16]; |
945cf7f506b2
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parents:
diff
changeset
|
470 |
945cf7f506b2
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parents:
diff
changeset
|
471 API a_du_gprs[4][29]; |
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parents:
diff
changeset
|
472 API a_pu_gprs[4][15]; |
945cf7f506b2
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parents:
diff
changeset
|
473 |
945cf7f506b2
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parents:
diff
changeset
|
474 API d_rlcmac_rx_no_gprs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff
changeset
|
475 |
945cf7f506b2
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parents:
diff
changeset
|
476 API a_dd_gprs[8][31]; |
945cf7f506b2
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parents:
diff
changeset
|
477 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff
changeset
|
478 API a_ramp_gprs[8][16]; |
945cf7f506b2
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parents:
diff
changeset
|
479 |
945cf7f506b2
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parents:
diff
changeset
|
480 } |
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parents:
diff
changeset
|
481 T_NDB_MCU_DSP_GPRS; |
945cf7f506b2
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parents:
diff
changeset
|
482 |
945cf7f506b2
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parents:
diff
changeset
|
483 #elif (DSP == 33) |
945cf7f506b2
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parents:
diff
changeset
|
484 typedef struct |
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parents:
diff
changeset
|
485 { |
945cf7f506b2
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parents:
diff
changeset
|
486 // GEA module |
945cf7f506b2
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parents:
diff
changeset
|
487 API d_gea_mode; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff
changeset
|
488 API a_gea_kc[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
489 |
945cf7f506b2
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parents:
diff
changeset
|
490 API d_hole1_ndb_gprs[8]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff
changeset
|
491 API d_a5mode_ovly; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
492 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
493 API d_sched_mode_gprs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
494 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
495 API d_hole2_ndb_gprs[5]; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
496 |
945cf7f506b2
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parents:
diff
changeset
|
497 API d_usf_updated_gprs; |
945cf7f506b2
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parents:
diff
changeset
|
498 API d_win_start_gprs; |
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parents:
diff
changeset
|
499 API d_usf_vote_enable; |
945cf7f506b2
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parents:
diff
changeset
|
500 API d_bbctrl_gprs; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
501 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
502 API d_hole3_ndb_gprs[2]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
503 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff
changeset
|
504 // (map?) BTS physical timeslot mapping. |
945cf7f506b2
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parents:
diff
changeset
|
505 API a_ctrl_ched_gprs[8]; // (map?) Ched configuration, burst per burst |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
506 API a_ul_buffer_gprs[8]; // (map?) UL burst / UL buffer mapping, burst per burst. (part of header) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
507 API a_usf_gprs[8]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff
changeset
|
508 API a_interf_meas_gprs[8]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
509 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
510 API a_ptcchu_gprs[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
511 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
512 API a_dd_md_gprs[16]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
513 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
514 API a_du_gprs[4][29]; |
945cf7f506b2
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parents:
diff
changeset
|
515 API a_pu_gprs[4][15]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
516 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
517 API d_rlcmac_rx_no_gprs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
518 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
519 API a_dd_gprs[8][31]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
520 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
521 API a_ramp_gprs[8][16]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
522 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
523 } |
945cf7f506b2
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parents:
diff
changeset
|
524 T_NDB_MCU_DSP_GPRS; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
525 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
526 #else |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
527 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
528 typedef struct |
945cf7f506b2
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parents:
diff
changeset
|
529 { |
945cf7f506b2
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parents:
diff
changeset
|
530 // GPRS Extension............... |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
531 API a_ramp_gprs[8][16]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
532 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
533 #if (CODE_VERSION != SIMULATION) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
534 API a_hole1_gprs[22]; // hole for a_du_1 and d_a5_mode |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
535 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
536 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
537 API d_ptcchu_ctrl_abb_gprs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
538 API d_ptcchu_ctrl_power_gprs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
539 API d_ptcchd_burst_nb_gprs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
540 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
541 #if (CODE_VERSION != SIMULATION) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
542 API a_hole2_gprs[184]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
543 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
544 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
545 API d_usf_updated_gprs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
546 API d_win_start_gprs; // (map?) BTS physical timeslot mapping. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
547 API a_ctrl_ched_gprs[8]; // (map?) Ched configuration, burst per burst |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
548 API a_ul_buffer_gprs[8]; // (map?) UL burst / UL buffer mapping, burst per burst. (part of header) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
549 API a_usf_gprs[8]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
550 API a_interf_meas_gprs[8]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
551 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
552 API d_background_enable; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
553 API d_background_abort; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
554 API d_background_state; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
555 API d_max_background; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
556 API a_background_tasks[16]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
557 API a_back_task_io[10]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
558 |
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559 #if (CODE_VERSION != SIMULATION) |
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560 API a_hole3_gprs[19]; |
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561 #endif |
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562 API d_gea_mode; |
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563 |
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564 API a_gea_kc[4]; |
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565 |
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566 API d_sched_mode_gprs; |
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567 |
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568 #if (CODE_VERSION != SIMULATION) |
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569 API a_hole4_gprs[384]; |
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570 #endif |
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571 |
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572 API a_du_gprs[4][29]; |
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573 API d_rlcmac_rx_no_gprs; |
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574 API a_dd_gprs[4][31]; |
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575 API a_pu_gprs[4][15]; |
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576 |
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577 #if (CODE_VERSION != SIMULATION) |
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578 API a_hole5_gprs[112]; |
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579 #endif |
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580 |
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581 API a_ptcchu_gprs[4]; |
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582 API a_dd_md_gprs[16]; |
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583 } |
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584 T_NDB_MCU_DSP_GPRS; |
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585 #endif |
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586 |
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587 #if (DSP == 34) || (DSP == 35) || (DSP == 36) |
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588 typedef struct |
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589 { |
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590 // GPRS Extension............... |
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591 API_SIGNED d_overlay_rlcmac_cfg_gprs; |
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592 API_SIGNED d_mac_threshold; |
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593 API_SIGNED d_sd_threshold; |
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594 API_SIGNED d_nb_max_iteration; |
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595 } |
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596 T_PARAM_MCU_DSP_GPRS; |
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597 #elif (DSP == 33) |
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598 typedef struct |
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599 { |
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600 // GPRS Extension............... |
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601 API_SIGNED d_overlay_rlcmac_cfg_gprs; |
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602 API_SIGNED d_mac_threshold; |
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603 API_SIGNED d_sd_threshold; |
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604 API_SIGNED d_nb_max_iteration; |
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605 } |
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606 T_PARAM_MCU_DSP_GPRS; |
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607 #else |
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608 typedef struct |
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609 { |
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610 // GPRS Extension............... |
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611 API_SIGNED d_overlay_rlcmac_cfg_gprs; |
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612 API_SIGNED d_lat_mcu_bridge; |
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613 API_SIGNED d_lat_pll2div; |
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614 API_SIGNED d_lat_mcu_hom2sam; |
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615 API_SIGNED d_gprs_install_address; |
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616 API_SIGNED d_mac_threshold; |
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617 API_SIGNED d_sd_threshold; |
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618 API_SIGNED d_nb_max_iteration; |
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619 } |
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620 T_PARAM_MCU_DSP_GPRS; |
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621 #endif |
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622 |
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623 /***************************************************************************************/ |
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624 /* L1PS -> DSP communication structure... */ |
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625 /***************************************************************************************/ |
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626 typedef struct |
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627 { |
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628 T_DB_DSP_TO_MCU_GPRS *pdsp_db_r_ptr; // MCU<->DSP comm. read page (Double Buffered comm. memory). |
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629 T_DB_MCU_TO_DSP_GPRS *pdsp_db_w_ptr; // MCU<->DSP comm. write page (Double Buffered comm. memory). |
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630 T_NDB_MCU_DSP_GPRS *pdsp_ndb_ptr; // MCU<->DSP comm. read/write (Non Double Buffered comm. memory). |
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631 T_PARAM_MCU_DSP_GPRS *pdsp_param_ptr; // MCU<->DSP comm. read/write (Param comm. memory). |
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632 } |
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633 T_L1PS_DSP_COM; |
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634 |
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635 /***************************************************************************************/ |
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636 /* L1PS -> MAC-S communication structure... */ |
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637 /***************************************************************************************/ |
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638 |
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639 typedef struct |
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640 { |
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641 UWORD8 nb; // Number of error found |
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642 UWORD8 id[10]; // Error ID |
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643 } |
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644 T_MACS_STATUS; |
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645 |
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646 typedef struct |
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647 { |
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648 BOOL new_set; // Set to 1 if allocation parameters have changed, reset by MAC-S |
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649 UWORD8 rx_allocation; // Downlink resources relative to Layer 1 frames |
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650 UWORD8 tx_nb_allocation; // Uplink resources used to transmit normal bursts relative to Layer 1 frames |
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651 UWORD8 tx_prach_allocation; // Uplink resources used to transmit PRACH bursts relative to Layer 1 frames |
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652 UWORD8 pwr_allocation; // Measurement gap relative to Layer 1 frames |
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653 BOOL fix_alloc_exhaust_flag; // Set to 1 if the fixed allocation has just exhausted |
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654 BOOL rlc_downlink_call; |
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655 T_MACS_STATUS macs_status; |
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656 } |
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657 T_L1PS_MACS_COM; |
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658 |
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659 |
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660 |