FreeCalypso > hg > fc-magnetite

annotate cdg-hybrid/cdginc/p_dio.h @ 367:ec0440adb8f8

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configs/2092-pwr removed: use plain 2092 config with FCHG instead
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 01 Jan 2018 00:16:57 +0000
parents e7a67accfad9
children
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212
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1 /*
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2 +--------------------------------------------------------------------------+
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3 | PROJECT : PROTOCOL STACK |
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4 | FILE : p_dio.h |
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5 | SOURCE : "sap\dio.pdf" |
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6 | LastModified : "2004-03-19" |
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7 | IdAndVersion : "..." |
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8 | SrcFileTime : "Thu Nov 29 09:39:48 2007" |
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9 | Generated by CCDGEN_2.5.5A on Fri Oct 14 21:41:52 2016 |
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10 | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! |
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11 +--------------------------------------------------------------------------+
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12 */
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13
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14 /* PRAGMAS
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15 * PREFIX : NONE
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16 * COMPATIBILITY_DEFINES : NO (require PREFIX)
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17 * ALWAYS_ENUM_IN_VAL_FILE: NO
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18 * ENABLE_GROUP: NO
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19 * CAPITALIZE_TYPENAME: NO
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20 */
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21
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22
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23 #ifndef P_DIO_H
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24 #define P_DIO_H
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25
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26
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27 #define CDG_ENTER__P_DIO_H
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28
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29 #define CDG_ENTER__FILENAME _P_DIO_H
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30 #define CDG_ENTER__P_DIO_H__FILE_TYPE CDGINC
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31 #define CDG_ENTER__P_DIO_H__LAST_MODIFIED _2004_03_19
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32 #define CDG_ENTER__P_DIO_H__ID_AND_VERSION _
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33
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34 #define CDG_ENTER__P_DIO_H__SRC_FILE_TIME _Thu_Nov_29_09_39_48_2007
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35
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36 #include "CDG_ENTER.h"
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37
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38 #undef CDG_ENTER__P_DIO_H
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39
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40 #undef CDG_ENTER__FILENAME
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41
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42
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43 #include "p_dio.val"
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44
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45 #ifndef __T_DIO_DCB_SER__
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46 #define __T_DIO_DCB_SER__
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47 /*
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48 * Structured Element
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49 * CCDGEN:WriteStruct_Count==1225
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50 */
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51 typedef struct
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52 {
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53 U32 device_type; /*< 0: 4> device identifier with general capability information */
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54 U8 sleep_mode; /*< 4: 1> enter sleep mode is possible or not */
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55 U8 _align0; /*< 5: 1> alignment */
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56 U8 _align1; /*< 6: 1> alignment */
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57 U8 _align2; /*< 7: 1> alignment */
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58 U32 baudrate; /*< 8: 4> user set baudrate */
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59 U32 char_frame; /*< 12: 4> supported character framing */
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60 U32 flow_control; /*< 16: 4> supported modes of flow control */
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61 U8 xon; /*< 20: 1> set/reset XON for flow control */
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62 U8 xoff; /*< 21: 1> set/reset XOFF for flow control */
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63 U8 esc_char; /*< 22: 1> ASCII character which is used in an escape sequence */
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64 U8 _align3; /*< 23: 1> alignment */
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65 U16 guard_period; /*< 24: 2> duration value for escape sequence */
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66 U8 _align4; /*< 26: 1> alignment */
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67 U8 _align5; /*< 27: 1> alignment */
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68 } T_DIO_DCB_SER;
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69 #endif
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70
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71 #ifndef __T_DIO_DCB_SER_MUX__
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72 #define __T_DIO_DCB_SER_MUX__
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73 /*
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74 * Structured Element
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75 * CCDGEN:WriteStruct_Count==1226
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76 */
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77 typedef struct
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78 {
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79 U32 device_type; /*< 0: 4> device identifier with general capability information */
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80 U8 sleep_mode; /*< 4: 1> enter sleep mode is possible or not */
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81 U8 _align0; /*< 5: 1> alignment */
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82 U8 _align1; /*< 6: 1> alignment */
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83 U8 _align2; /*< 7: 1> alignment */
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84 U32 baudrate; /*< 8: 4> user set baudrate */
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85 U32 char_frame; /*< 12: 4> supported character framing */
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86 U32 flow_control; /*< 16: 4> supported modes of flow control */
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87 U8 xon; /*< 20: 1> set/reset XON for flow control */
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88 U8 xoff; /*< 21: 1> set/reset XOFF for flow control */
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89 U8 esc_char; /*< 22: 1> ASCII character which is used in an escape sequence */
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90 U8 _align3; /*< 23: 1> alignment */
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91 U16 guard_period; /*< 24: 2> duration value for escape sequence */
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92 U8 _align4; /*< 26: 1> alignment */
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93 U8 _align5; /*< 27: 1> alignment */
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94 U32 device_mode; /*< 28: 4> work mode of device */
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95 U32 mux_mode; /*< 32: 4> supported multiplexer modes */
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96 U16 n1; /*< 36: 2> max frame size of mux frame */
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97 U8 n2; /*< 38: 1> max number of retransmissions */
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98 U8 t1; /*< 39: 1> acknowledgement timer */
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99 U8 t2; /*< 40: 1> response timer */
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100 U8 t3; /*< 41: 1> wake up response timer */
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101 U8 k; /*< 42: 1> windows size */
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102 U8 _align6; /*< 43: 1> alignment */
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103 } T_DIO_DCB_SER_MUX;
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104 #endif
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105
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106 #ifndef __T_DIO_DCB_PKT__
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107 #define __T_DIO_DCB_PKT__
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108 /*
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109 * Structured Element
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110 * CCDGEN:WriteStruct_Count==1227
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111 */
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112 typedef struct
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113 {
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114 U32 device_type; /*< 0: 4> device identifier with general capability information */
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115 U8 sleep_mode; /*< 4: 1> enter sleep mode is possible or not */
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116 U8 _align0; /*< 5: 1> alignment */
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117 U8 _align1; /*< 6: 1> alignment */
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118 U8 _align2; /*< 7: 1> alignment */
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119 } T_DIO_DCB_PKT;
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120 #endif
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121
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122 #ifndef __T_DIO_CAP_SER__
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123 #define __T_DIO_CAP_SER__
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124 /*
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125 * serial device capabiliity structures
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126 * CCDGEN:WriteStruct_Count==1228
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127 */
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128 typedef struct
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129 {
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130 U32 device_type; /*< 0: 4> device identifier with general capability information */
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131 U32 device_flags; /*< 4: 4> driver features like power saving state */
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132 U16 mtu_control; /*< 8: 2> max length of copied control information bytes by the driver */
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133 U16 mtu_data; /*< 10: 2> max size of packet data which the driver can transfer */
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134 U32 driver_name; /*< 12: 4> pointer to driver name */
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135 U32 baudrate_auto; /*< 16: 4> automatically detected driver baudrates */
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136 U32 baudrate_fixed; /*< 20: 4> driver baudrates which cannot be detected automatically */
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137 U32 char_frame; /*< 24: 4> supported character framing */
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138 U32 flow_control; /*< 28: 4> supported modes of flow control */
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139 U32 ser_flags; /*< 32: 4> additional supported features of serial/mux devices */
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140 } T_DIO_CAP_SER;
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141 #endif
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142
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143 #ifndef __T_DIO_CAP_SER_MUX__
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144 #define __T_DIO_CAP_SER_MUX__
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145 /*
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146 * Structured Element
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147 * CCDGEN:WriteStruct_Count==1229
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148 */
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149 typedef struct
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150 {
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151 U32 device_type; /*< 0: 4> device identifier with general capability information */
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152 U32 device_flags; /*< 4: 4> driver features like power saving state */
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153 U16 mtu_control; /*< 8: 2> max length of copied control information bytes by the driver */
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154 U16 mtu_data; /*< 10: 2> max size of packet data which the driver can transfer */
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155 U32 driver_name; /*< 12: 4> pointer to driver name */
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156 U32 baudrate_auto; /*< 16: 4> automatically detected driver baudrates */
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157 U32 baudrate_fixed; /*< 20: 4> driver baudrates which cannot be detected automatically */
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158 U32 char_frame; /*< 24: 4> supported character framing */
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159 U32 flow_control; /*< 28: 4> supported modes of flow control */
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160 U32 ser_flags; /*< 32: 4> additional supported features of serial/mux devices */
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161 U32 mux_mode; /*< 36: 4> supported multiplexer modes */
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162 } T_DIO_CAP_SER_MUX;
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163 #endif
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164
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165 #ifndef __T_DIO_CAP_PKT__
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166 #define __T_DIO_CAP_PKT__
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167 /*
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168 * Structured Element
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169 * CCDGEN:WriteStruct_Count==1230
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170 */
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171 typedef struct
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172 {
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173 U32 device_type; /*< 0: 4> device identifier with general capability information */
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174 U32 device_flags; /*< 4: 4> driver features like power saving state */
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175 U16 mtu_control; /*< 8: 2> max length of copied control information bytes by the driver */
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176 U16 mtu_data; /*< 10: 2> max size of packet data which the driver can transfer */
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177 U32 driver_name; /*< 12: 4> pointer to driver name */
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178 } T_DIO_CAP_PKT;
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179 #endif
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180
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181 #ifndef __T_DIO_CAP__
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182 #define __T_DIO_CAP__
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183 /*
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184 * device capabiliity structures
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185 * CCDGEN:WriteStruct_Count==1231
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186 */
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187 typedef struct
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188 {
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189 U32 device_type; /*< 0: 4> device identifier with general capability information */
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190 U32 device_flags; /*< 4: 4> driver features like power saving state */
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191 U16 mtu_control; /*< 8: 2> max length of copied control information bytes by the driver */
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192 U16 mtu_data; /*< 10: 2> max size of packet data which the driver can transfer */
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193 U32 driver_name; /*< 12: 4> pointer to driver name */
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194 } T_DIO_CAP;
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195 #endif
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196
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197 #ifndef __T_DIO_DCB__
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198 #define __T_DIO_DCB__
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199 /*
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200 * all elements of driver configuration parameter
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201 * CCDGEN:WriteStruct_Count==1232
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202 */
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203 typedef struct
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204 {
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205 U32 device_type; /*< 0: 4> device identifier with general capability information */
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206 U8 sleep_mode; /*< 4: 1> enter sleep mode is possible or not */
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207 U8 _align0; /*< 5: 1> alignment */
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208 U8 _align1; /*< 6: 1> alignment */
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209 U8 _align2; /*< 7: 1> alignment */
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210 } T_DIO_DCB;
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211 #endif
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212
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213 #ifndef __T_dio_segment__
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214 #define __T_dio_segment__
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215 /*
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216 * Structured Element
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217 * CCDGEN:WriteStruct_Count==1233
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218 */
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219 typedef struct
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220 {
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221 U8 _align0; /*< 0: 1> alignment */
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222 U8 _align1; /*< 1: 1> alignment */
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223 U16 c_data; /*< 2: 2> counter */
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224 U8 *ptr_data; /*< 4: 4> pointer to pointer to the first byte of the data buffer segment */
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225 } T_dio_segment;
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226 #endif
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227
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228 #ifndef __T_dio_buffer__
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229 #define __T_dio_buffer__
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230 /*
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231 * data buffer
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232 * CCDGEN:WriteStruct_Count==1234
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233 */
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234 typedef struct
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235 {
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236 U16 length; /*< 0: 2> len of dio_ctrl */
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237 U8 _align0; /*< 2: 1> alignment */
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238 U8 c_dio_segment; /*< 3: 1> counter */
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239 T_dio_segment *ptr_dio_segment; /*< 4: 4> pointer to Structured Element */
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240 } T_dio_buffer;
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241 #endif
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242
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243 #ifndef __T_DIO_CTRL__
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244 #define __T_DIO_CTRL__
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245 /*
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246 * Structured Element
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247 * CCDGEN:WriteStruct_Count==1235
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248 */
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249 typedef struct
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250 {
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251 U16 control_type; /*< 0: 2> data types */
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252 U16 length; /*< 2: 2> len of dio_ctrl */
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253 } T_DIO_CTRL;
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254 #endif
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255
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256 #ifndef __T_DIO_CTRL_LINES__
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257 #define __T_DIO_CTRL_LINES__
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258 /*
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259 * Structured Element
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260 * CCDGEN:WriteStruct_Count==1236
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261 */
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262 typedef struct
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263 {
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264 U16 control_type; /*< 0: 2> data types */
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265 U16 length; /*< 2: 2> len of dio_ctrl */
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266 U32 state; /*< 4: 4> line states */
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267 } T_DIO_CTRL_LINES;
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268 #endif
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269
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270 #ifndef __T_DIO_CTRL_MUX__
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271 #define __T_DIO_CTRL_MUX__
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272 /*
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273 * Structured Element
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274 * CCDGEN:WriteStruct_Count==1237
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275 */
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276 typedef struct
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277 {
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278 U16 control_type; /*< 0: 2> data types */
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279 U16 length; /*< 2: 2> len of dio_ctrl */
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280 U32 state; /*< 4: 4> line states */
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281 } T_DIO_CTRL_MUX;
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282 #endif
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283
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284
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285 /*
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286 * End of substructure section, begin of primitive definition section
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287 */
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288
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289
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290 #include "CDG_LEAVE.h"
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291
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292
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293 #endif