FreeCalypso > hg > fc-magnetite
annotate cdg-hybrid/cdginc/p_mon.val @ 680:ee3ac8c617cb
armio.c: set GPIO2 output high initially
On TI-canonical platforms GPIO2 is DCD modem control output. In TI's
original code the AI_InitIOConfig() function called from Init_Target()
would configure GPIO2 as an output and set the initial output value to
low, but then the init code in uartfax.c called from Init_Serial_Flows()
would immediately change it to high, corresponding to DCD not asserted.
The result is a momentary asserted-state glitch on the DCD output.
The present change eliminates this glitch, setting DCD output to
not-asserted initially like it should be.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 25 Jun 2020 03:17:43 +0000 |
parents | e7a67accfad9 |
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rev | line source |
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212
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1 /* |
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2 +--------------------------------------------------------------------------+ |
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3 | PROJECT : PROTOCOL STACK | |
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4 | FILE : p_mon.val | |
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5 | SOURCE : "sap\mon.pdf" | |
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6 | LastModified : "2003-02-04" | |
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7 | IdAndVersion : "8304.129.96.103" | |
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8 | SrcFileTime : "Thu Nov 29 09:49:00 2007" | |
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9 | Generated by CCDGEN_2.5.5A on Fri Oct 14 21:41:52 2016 | |
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10 | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! | |
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11 +--------------------------------------------------------------------------+ |
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12 */ |
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13 |
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14 /* PRAGMAS |
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15 * PREFIX : NONE |
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16 * COMPATIBILITY_DEFINES : NO (require PREFIX) |
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17 * ALWAYS_ENUM_IN_VAL_FILE: NO |
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18 * ENABLE_GROUP: NO |
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19 * CAPITALIZE_TYPENAME: NO |
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20 */ |
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21 |
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22 |
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23 #ifndef P_MON_VAL |
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24 #define P_MON_VAL |
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25 |
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26 |
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27 #define CDG_ENTER__P_MON_VAL |
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28 |
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29 #define CDG_ENTER__FILENAME _P_MON_VAL |
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30 #define CDG_ENTER__P_MON_VAL__FILE_TYPE CDGINC |
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31 #define CDG_ENTER__P_MON_VAL__LAST_MODIFIED _2003_02_04 |
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32 #define CDG_ENTER__P_MON_VAL__ID_AND_VERSION _8304_129_96_103 |
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33 |
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34 #define CDG_ENTER__P_MON_VAL__SRC_FILE_TIME _Thu_Nov_29_09_49_00_2007 |
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35 |
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36 #include "CDG_ENTER.h" |
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37 |
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38 #undef CDG_ENTER__P_MON_VAL |
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39 |
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40 #undef CDG_ENTER__FILENAME |
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41 |
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42 |
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43 /* |
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44 * Value constants for VAL_arfcn |
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45 */ |
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46 #define VAL_ARFCN___FFFF (0xffff) /* not present */ |
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47 |
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48 /* |
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49 * Value constants for VAL_att_flag |
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50 */ |
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51 #define ATT_NOT_ALLOW (0x0) /* attach / detach not allowed */ |
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52 #define ATT_ALLOW (0x1) /* attach / detach allowed */ |
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53 |
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54 /* |
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55 * Value constants for VAL_conf_ccch |
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56 */ |
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57 #define CCCH_NOT_COMB_1_CHAN (0x0) /* CCCH not combined with SDCCH, 1 channel */ |
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58 #define CCCH_COMB_1_CHAN (0x1) /* CCCH combined with SDCCH, 1 channel */ |
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59 #define CCCH_NOT_COMB_2_CHAN (0x2) /* CCCH not combined with SDCCH, 2 channels */ |
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60 #define CCCH_NOT_COMB_3_CHAN (0x4) /* CCCH not combined with SDCCH, 3 channels */ |
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61 #define CCCH_NOT_COMB_4_CHAN (0x6) /* CCCH not combined with SDCCH, 4 channels */ |
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62 |
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63 /* |
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64 * Value constants for VAL_tn |
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65 */ |
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66 |
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67 /* |
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68 * Value constants for VAL_dlt |
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69 */ |
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70 |
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71 /* |
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72 * Value constants for VAL_pg |
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73 */ |
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74 |
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75 /* |
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76 * Value constants for VAL_bs_pa_mfrms |
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77 */ |
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78 #define VAL_BS_PA_MFRMS___0 (0x0) /* 2 Multiframe Periods */ |
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79 #define VAL_BS_PA_MFRMS___1 (0x1) /* 3 Multiframe Periods */ |
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80 #define VAL_BS_PA_MFRMS___2 (0x2) /* 4 Multiframe Periods */ |
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81 #define VAL_BS_PA_MFRMS___3 (0x3) /* 5 Multiframe Periods */ |
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82 #define VAL_BS_PA_MFRMS___4 (0x4) /* 6 Multiframe Periods */ |
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83 #define VAL_BS_PA_MFRMS___5 (0x5) /* 7 Multiframe Periods */ |
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84 #define VAL_BS_PA_MFRMS___6 (0x6) /* 8 Multiframe Periods */ |
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85 #define VAL_BS_PA_MFRMS___7 (0x7) /* 9 Multiframe Periods */ |
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86 |
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87 /* |
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88 * Value constants for VAL_power |
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89 */ |
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90 |
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91 /* |
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92 * Value constants for VAL_rx_lev |
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93 */ |
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94 |
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95 /* |
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96 * Value constants for VAL_rx_qual_full |
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97 */ |
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98 |
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99 /* |
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100 * Value constants for VAL_bsic |
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101 */ |
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102 #define VAL_BSIC___FF (0xff) /* not present */ |
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103 |
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104 /* |
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105 * Value constants for VAL_ch_type |
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106 */ |
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107 #define CH_TCH_F (0x1) /* TCH/F */ |
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108 #define CH_TCH_H_1 (0x2) /* TCH/H(1) */ |
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109 #define CH_TCH_H_2 (0x3) /* TCH/H(2) */ |
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110 #define CH_SDCCH_4_0 (0x4) /* SDCCH/4(0) */ |
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111 #define CH_SDCCH_4_1 (0x5) /* SDCCH/4(1) */ |
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112 #define CH_SDCCH_4_2 (0x6) /* SDCCH/4(2) */ |
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113 #define CH_SDCCH_4_3 (0x7) /* SDCCH/4(3) */ |
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114 #define CH_SDCCH_8_0 (0x8) /* SDCCH/8(0) */ |
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115 #define CH_SDCCH_8_1 (0x9) /* SDCCH/8(1) */ |
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116 #define CH_SDCCH_8_2 (0xa) /* SDCCH/8(2) */ |
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117 #define CH_SDCCH_8_3 (0xb) /* SDCCH/8(3) */ |
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118 #define CH_SDCCH_8_4 (0xc) /* SDCCH/8(4) */ |
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119 #define CH_SDCCH_8_5 (0xd) /* SDCCH/8(5) */ |
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120 #define CH_SDCCH_8_6 (0xe) /* SDCCH/8(6) */ |
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121 #define CH_SDCCH_8_7 (0xf) /* SDCCH/8(7) */ |
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122 |
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123 /* |
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124 * Value constants for VAL_ch_mode |
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125 */ |
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126 #define MODE_SIG_ONLY (0x0) /* signalling only */ |
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127 #define MODE_SPEECH_FULL (0x1) /* speech full rate */ |
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128 #define MODE_SPEECH_HALF (0x5) /* speech half rate */ |
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129 #define MODE_DATA_12 (0x3) /* data 12 kBits/s */ |
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130 #define MODE_DATA_6_FULL (0xb) /* data 6 kBits/s fullrate */ |
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131 #define MODE_DATA_6_HALF (0xf) /* data 6 kBits/s halfrate */ |
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132 #define MODE_DATA_3_6_FULL (0x13) /* data 3.6 kBits/s fullrate */ |
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133 #define MODE_DATA_3_6_HALF (0x17) /* data 3.6 kBits/s halfrate */ |
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134 #define MODE_ENHANCED_FULL (0x21) /* enhanced full rate */ |
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135 |
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136 /* |
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137 * Value constants for VAL_hop |
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138 */ |
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139 #define VAL_HOP___0 (0x0) /* no frequency hopping */ |
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140 #define VAL_HOP___1 (0x1) /* with frequency hopping */ |
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141 |
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142 /* |
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143 * user defined constants |
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144 */ |
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145 #define SIZE_MCC (0x3) |
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146 #define SIZE_MNC (0x3) |
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147 |
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148 #include "CDG_LEAVE.h" |
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149 |
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150 |
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151 #endif |