FreeCalypso > hg > fc-magnetite
annotate makefile-frags/ram-link-steps @ 597:f18b29e27be5
First attempt at MCSI voice path automatic switching
The function is implemented at the ACI level in both aci2 and aci3,
successfully avoids triggering the DSP bug on the first call,
but the shutdown of MCSI upon call completion is not working properly yet
in either version.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Wed, 27 Mar 2019 22:18:35 +0000 |
parents | 9432dd63626b |
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93
6475bde1b170
Building RAM fw images for the Pirelli: finishing touches
Mychaela Falconia <falcon@freecalypso.org>
parents:
90
diff
changeset
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1 ram: ramimage.srec |
6475bde1b170
Building RAM fw images for the Pirelli: finishing touches
Mychaela Falconia <falcon@freecalypso.org>
parents:
90
diff
changeset
|
2 |
90
7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3 link_ram.cmd: ${RAM_LINK_SCRIPT_SRC} Makefile lcfgen |
7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4 perl ../scripts/ti/make_cmd.pl lcfgen $@ 0 ${RAM_LINK_SCRIPT_SRC} \ |
7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5 ${SPECIAL_LINK_LIBS} |
7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
6 |
250
9432dd63626b
firmware ident and build date mechanism implemented at the build level
Mychaela Falconia <falcon@freecalypso.org>
parents:
93
diff
changeset
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7 ramimage.out: ${LIBS} build_date.obj str2ind.obj link_ram.cmd |
90
7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
8 ../toolwrap/vlnk470 -farcall -x -o $@ -m ramimage.map $^ |
7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
9 |
7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
10 ramimage.m0: ramimage.out |
7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
11 ../toolwrap/hex470 -m -memwidth 16 -romwidth 16 $< |
7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
12 |
93
6475bde1b170
Building RAM fw images for the Pirelli: finishing touches
Mychaela Falconia <falcon@freecalypso.org>
parents:
90
diff
changeset
|
13 ramimage.srec: ramimage.m0 |
6475bde1b170
Building RAM fw images for the Pirelli: finishing touches
Mychaela Falconia <falcon@freecalypso.org>
parents:
90
diff
changeset
|
14 ../helpers/srec4ram $< $@ |
6475bde1b170
Building RAM fw images for the Pirelli: finishing touches
Mychaela Falconia <falcon@freecalypso.org>
parents:
90
diff
changeset
|
15 |