FreeCalypso > hg > fc-magnetite

annotate src/g23m-gprs/cci/cci_hw_sim.c @ 451:fd1d9063ad40

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config mechanism: added ability to build D-Sample B&W UI configuration
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 13 Mar 2018 18:15:14 +0000
parents 219afcfc6250
children
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1 /*
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2 +-----------------------------------------------------------------------------
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3 | Project :
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4 | Modul : cci_hw_sim.c
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5 +-----------------------------------------------------------------------------
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6 | Copyright 2002 Texas Instruments Berlin, AG
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7 | All rights reserved.
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8 |
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9 | This file is confidential and a trade secret of Texas
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10 | Instruments Berlin, AG
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11 | The receipt of or possession of this file does not convey
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12 | any rights to reproduce or disclose its contents or to
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13 | manufacture, use, or sell anything it may describe, in
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14 | whole, or in part, without the specific written consent of
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15 | Texas Instruments Berlin, AG.
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16 +-----------------------------------------------------------------------------
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17 | Purpose : This module implements hardware simulation functions for
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18 | entity CCI.
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19 +-----------------------------------------------------------------------------
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20 */
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21
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23 #define CCI_HW_SIM_C
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25 #define ENTITY_LLC
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26
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27 /*==== INCLUDES =============================================================*/
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28 #include <string.h> /* to get memmove */
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29
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30 #include "typedefs.h" /* to get Condat data types */
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31 #include "vsi.h" /* to get a lot of macros */
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32 #include "macdef.h"
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33 #include "gprs.h"
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34 #include "gsm.h" /* to get a lot of macros */
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35 #include "cnf_llc.h" /* to get cnf-definitions */
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36 #include "mon_llc.h" /* to get mon-definitions */
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37 #include "prim.h" /* to get the definitions of used SAP and directions */
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38 #include "cci.h" /* to get the global entity definitions */
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39 #include "llc.h" /* to get the global entity definitions */
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40
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41 #include "cci_hw_sim.h"
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43 #include "llc_f.h" /* to get llc_build_crc24() */
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44
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45 /*==== CONST ================================================================*/
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46
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47 /*==== LOCAL VARS ===========================================================*/
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48
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49 /*==== PRIVATE FUNCTIONS ====================================================*/
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50
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51 /*==== PUBLIC FUNCTIONS =====================================================*/
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52
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53 #ifdef _GEA_SIMULATION_
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54
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55
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56 /*
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57 +------------------------------------------------------------------------------
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58 | Function : ciph_hw_sim_cipher
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59 +------------------------------------------------------------------------------
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60 | Description : This functionn simulates the hardware during ciphering process
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61 |
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62 | Parameters : void
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63 |
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64 +------------------------------------------------------------------------------
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65 */
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66 GLOBAL void ciph_hw_sim_cipher (U16 len)
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67 {
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68 /*
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69 * first move data one byte, if requested
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70 */
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71
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72 if( *cci_data->fbs.conf_ul_reg1 & INPUT_SHIFT )
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73 {
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74 memmove (cci_data->fbs.simulated_reg_buffer, /* dest */
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75 cci_data->fbs.simulated_reg_buffer+1, /* src */
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76 len);
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77 }
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78
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79 {
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80 #ifdef _SIM_CALC_FCS_
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81 ULONG fcs;
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82
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83 /*
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84 * Build FCS (function returns already inversed CRC), store result in fcs.
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85 */
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86 fcs = llc_build_crc24 (cci_data->fbs.simulated_reg_buffer,
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87 len);
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88 /*
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89 * Copy FCS to HW registers, taking byte ordering of FCS registers
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90 * into account, e.g.:
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91 * fcs reg1 reg2
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92 * xx 36 29 FC -> 29 FC xx 36
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93 */
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94 *cci_data->fbs.fcs_ul_reg1 = (USHORT) (fcs & 0x0000FFFFL);
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95 *cci_data->fbs.fcs_ul_reg2 = (USHORT)((fcs & 0x00FF0000L) >> 16);
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96 #else
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97 /*
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98 * Set FCS to all zeroes in simulation.
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99 */
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100 *cci_data->fbs.fcs_ul_reg1 = 0x0000;
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101 *cci_data->fbs.fcs_ul_reg2 = 0x0000;
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102 #endif /* _SIM_CALC_FCS_ */
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103 }
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104 /*
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105 * HW simulation: set status register to indicate finished work and emulate
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106 * timer afterwards.
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107 */
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108 *cci_data->fbs.status_reg &= NOT_WORKING;
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109
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110 } /* ciph_hw_sim_cipher */
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111
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112 /*
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113 +------------------------------------------------------------------------------
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114 | Function : ciph_hw_sim_decipher
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115 +------------------------------------------------------------------------------
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116 | Description : This functionn simulates the hardware during deciphering process
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diff changeset
117 |
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
118 | Parameters : void
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
119 |
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
120 +------------------------------------------------------------------------------
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
121 */
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
122 GLOBAL void ciph_hw_sim_decipher ( void )
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
123 {
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
124 /*
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
125 * set all registers to indicate finished work.
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
126 * FCS will be checked later.
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
127 */
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
128 *cci_data->fbs.fcs_dl_reg1 &= 0x0000;
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
129 *cci_data->fbs.fcs_dl_reg2 &= 0x0000;
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
130
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
131 *cci_data->fbs.status_reg &= NOT_WORKING;
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
132
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133 } /* ciph_hw_sim_decipher */
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
136
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137 /*
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
138 +------------------------------------------------------------------------------
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
139 | Function : ciph_reg16_write_sim
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140 +------------------------------------------------------------------------------
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141 | Description : This function simulates the hardware writing process on windows
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 | environment
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143 |
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144 | Parameters : void
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145 |
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146 +------------------------------------------------------------------------------
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147 */
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
148 GLOBAL void ciph_reg16_write_sim ( void )
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
149 {
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
150 UBYTE *data = (UBYTE *)cci_data->fbs.data16_reg;;
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
151
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
152 /*
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
153 * To support any alignment the copy process must be done in two steps
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
154 * by the use of 8 bit char pointers
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
155 */
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
156 *cci_data->fbs.simulated_reg = *data;
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
157 cci_data->fbs.simulated_reg++;
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
158
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
159 data++;
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
160
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
161 *cci_data->fbs.simulated_reg = *data;
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
162 cci_data->fbs.simulated_reg++;
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
163
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
164 } /* ciph_reg16_write_sim */
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
165
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
166
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
167
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
168
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
169 /*
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
170 +------------------------------------------------------------------------------
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
171 | Function : ciph_reg8_write_sim
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
172 +------------------------------------------------------------------------------
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
173 | Description : This function simulates the 8 bit hardware writing process
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
174 | by the use of 8 bit register.
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
175 |
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
176 | Parameters : void
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
177 |
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
178 +------------------------------------------------------------------------------
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
179 */
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
180 GLOBAL void ciph_reg8_write_sim ( void )
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
181 {
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
182 *cci_data->fbs.simulated_reg = *cci_data->fbs.data8_reg;
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183 cci_data->fbs.simulated_reg++;
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
184
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
185 } /* ciph_reg8_write_sim() */
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
186
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
188 /*
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
189 +------------------------------------------------------------------------------
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
190 | Function : ciph_reg16_read_sim
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191 +------------------------------------------------------------------------------
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 | Description : This function simulates the 16 bit hardware reading process
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193 | by the use of a 16 bit register
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194 |
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
195 | Parameters : void
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
196 |
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197 +------------------------------------------------------------------------------
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
198 */
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199 GLOBAL void ciph_reg16_read_sim ( void )
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
200 {
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201 UBYTE *data = (UBYTE *)cci_data->fbs.data16_reg;
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
202
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203 /*
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204 * To support any alignment the copy process must be done in two steps
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205 * by the use of 8 bit char pointers
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206 */
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207 *data = *cci_data->fbs.simulated_reg;
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208 cci_data->fbs.simulated_reg++;
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210 data++;
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
211
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
212 *data = *cci_data->fbs.simulated_reg;
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
213 cci_data->fbs.simulated_reg++;
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
214
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
215 } /* ciph_reg16_read_sim*/
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
216
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
218 /*
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
219 +------------------------------------------------------------------------------
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
220 | Function : ciph_reg8_read_sim
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
221 +------------------------------------------------------------------------------
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
222 | Description : This function simulates the 8 bit hardware reading process
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
223 | by the use of 8 bit register.
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224 |
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
225 | Parameters : void
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
226 |
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
227 +------------------------------------------------------------------------------
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
228 */
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
229 GLOBAL void ciph_reg8_read_sim ( void )
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
230 {
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
231 *cci_data->fbs.data8_reg = *cci_data->fbs.simulated_reg;
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
232 cci_data->fbs.simulated_reg++;
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
233
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
234 } /* ciph_reg8_read_sim*/
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
235
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
236
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
237
219afcfc6250 src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
238 #endif /* _GEA_SIMULATION */