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comparison src/cs/drivers/drv_app/uart/uartfax.c @ 681:140a0d24a64c

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Tango pinmux implemented except for GPIO1 special outputs, which will be implemented later.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 25 Jun 2020 05:36:24 +0000
parents 92dbfa906f66
children 17b7b92e7dba
comparison
equal deleted inserted replaced
680:ee3ac8c617cb 681:140a0d24a64c
114 114
115 #include "memif/mem.h" 115 #include "memif/mem.h"
116 116
117 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41)) 117 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41))
118 #include "armio/armio.h" 118 #include "armio/armio.h"
119 #endif
120
121 #ifdef CONFIG_TANGO_MODEM
122 extern SYS_UWORD8 AI_Tango_pinmux[4];
119 #endif 123 #endif
120 124
121 /* 125 /*
122 * Maximal value for an unsigned 32 bits. 126 * Maximal value for an unsigned 32 bits.
123 */ 127 */
3019 /* 3023 /*
3020 * Select I/O for DCD and configure it as output. 3024 * Select I/O for DCD and configure it as output.
3021 * DCD should start HIGH (not asserted). 3025 * DCD should start HIGH (not asserted).
3022 */ 3026 */
3023 3027
3028 #ifdef CONFIG_TANGO_MODEM
3029 if (AI_Tango_pinmux[1] & 0x08) {
3030 #endif
3024 *((volatile SYS_UWORD16 *) EXTENDED_MCU_REG) &= ~(1 << IO_DCD); 3031 *((volatile SYS_UWORD16 *) EXTENDED_MCU_REG) &= ~(1 << IO_DCD);
3025 AI_ConfigBitAsOutput (ARMIO_DCD); 3032 AI_ConfigBitAsOutput (ARMIO_DCD);
3026 AI_SetBit (ARMIO_DCD); 3033 AI_SetBit (ARMIO_DCD);
3034 #ifdef CONFIG_TANGO_MODEM
3035 }
3036 #endif
3027 3037
3028 /* 3038 /*
3029 * Select I/O for DTR and configure it as input. 3039 * Select I/O for DTR and configure it as input.
3030 * An interrupt is used to detect a change of state of DTR. Falling edge 3040 * An interrupt is used to detect a change of state of DTR. Falling edge
3031 * or rising edge is selected according to the state of DTR. 3041 * or rising edge is selected according to the state of DTR.
3032 */ 3042 */
3033 3043
3044 #ifdef CONFIG_TANGO_MODEM
3045 if (AI_Tango_pinmux[1] & 0x80) {
3046 #endif
3034 *((volatile SYS_UWORD16 *) ASIC_CONFIG_REG) &= ~(1 << IO_DTR); 3047 *((volatile SYS_UWORD16 *) ASIC_CONFIG_REG) &= ~(1 << IO_DTR);
3035 AI_ConfigBitAsInput (ARMIO_DTR); 3048 AI_ConfigBitAsInput (ARMIO_DTR);
3036 uart->dtr_level = AI_ReadBit (ARMIO_DTR); 3049 uart->dtr_level = AI_ReadBit (ARMIO_DTR);
3037 3050
3038 if (uart->dtr_level) 3051 if (uart->dtr_level)
3039 AI_SelectIOForIT (ARMIO_DTR, ARMIO_FALLING_EDGE); 3052 AI_SelectIOForIT (ARMIO_DTR, ARMIO_FALLING_EDGE);
3040 else 3053 else
3041 AI_SelectIOForIT (ARMIO_DTR, ARMIO_RISING_EDGE); 3054 AI_SelectIOForIT (ARMIO_DTR, ARMIO_RISING_EDGE);
3042 3055
3043 AI_UnmaskIT (ARMIO_MASKIT_GPIO); 3056 AI_UnmaskIT (ARMIO_MASKIT_GPIO);
3057 #ifdef CONFIG_TANGO_MODEM
3058 } else
3059 uart->dtr_level = 0;
3060 #endif
3044 3061
3045 /* 3062 /*
3046 * Reset the 2 indexes of the circular buffer of 2 elements. 3063 * Reset the 2 indexes of the circular buffer of 2 elements.
3047 * The circular buffer does not need to be initialized. 3064 * The circular buffer does not need to be initialized.
3048 */ 3065 */
3221 * Mask all interrupts causes and disable sleep mode and low power mode. 3238 * Mask all interrupts causes and disable sleep mode and low power mode.
3222 */ 3239 */
3223 3240
3224 WRITE_UART_REGISTER (uart, IER, 0x00); 3241 WRITE_UART_REGISTER (uart, IER, 0x00);
3225 3242
3226 #if UARTFAX_CLASSIC_DTR_DCD 3243 #ifdef CONFIG_TANGO_MODEM
3244 if (AI_Tango_pinmux[1] & 0x80)
3245 AI_MaskIT (ARMIO_MASKIT_GPIO);
3246 #elif UARTFAX_CLASSIC_DTR_DCD
3227 AI_MaskIT (ARMIO_MASKIT_GPIO); 3247 AI_MaskIT (ARMIO_MASKIT_GPIO);
3228 #elif (CHIPSET == 12) 3248 #elif (CHIPSET == 12)
3229 DISABLE_DSR_INTERRUPT (uart); 3249 DISABLE_DSR_INTERRUPT (uart);
3230 #endif 3250 #endif
3231 3251
3367 #if UARTFAX_CLASSIC_DTR_DCD 3387 #if UARTFAX_CLASSIC_DTR_DCD
3368 /* 3388 /*
3369 * Read the state of DTR and select the edge. 3389 * Read the state of DTR and select the edge.
3370 */ 3390 */
3371 3391
3392 #ifdef CONFIG_TANGO_MODEM
3393 if (AI_Tango_pinmux[1] & 0x80) {
3394 #endif
3372 uart->dtr_level = AI_ReadBit (ARMIO_DTR); 3395 uart->dtr_level = AI_ReadBit (ARMIO_DTR);
3373 3396
3374 if (uart->dtr_level) 3397 if (uart->dtr_level)
3375 AI_SelectIOForIT (ARMIO_DTR, ARMIO_FALLING_EDGE); 3398 AI_SelectIOForIT (ARMIO_DTR, ARMIO_FALLING_EDGE);
3376 else 3399 else
3377 AI_SelectIOForIT (ARMIO_DTR, ARMIO_RISING_EDGE); 3400 AI_SelectIOForIT (ARMIO_DTR, ARMIO_RISING_EDGE);
3378 3401
3379 AI_UnmaskIT (ARMIO_MASKIT_GPIO); 3402 AI_UnmaskIT (ARMIO_MASKIT_GPIO);
3403 #ifdef CONFIG_TANGO_MODEM
3404 } else
3405 uart->dtr_level = 0;
3406 #endif
3407
3380 #elif (CHIPSET == 12) 3408 #elif (CHIPSET == 12)
3381 /* 3409 /*
3382 * Read the state of DTR - No need to reload MSR register since its value 3410 * Read the state of DTR - No need to reload MSR register since its value
3383 * is still stored in the "status" local variable. 3411 * is still stored in the "status" local variable.
3384 */ 3412 */
4753 4781
4754 if (state & (1 << DCD)) { 4782 if (state & (1 << DCD)) {
4755 /* Turn on DCD */ 4783 /* Turn on DCD */
4756 #if (CHIPSET == 12) 4784 #if (CHIPSET == 12)
4757 WRITE_UART_REGISTER (uart, MCR, READ_UART_REGISTER(uart, MCR) | MDCD); 4785 WRITE_UART_REGISTER (uart, MCR, READ_UART_REGISTER(uart, MCR) | MDCD);
4786 #elif defined(CONFIG_TANGO_MODEM)
4787 if (AI_Tango_pinmux[1] & 0x08)
4788 AI_ResetBit (ARMIO_DCD);
4758 #else 4789 #else
4759 AI_ResetBit (ARMIO_DCD); 4790 AI_ResetBit (ARMIO_DCD);
4760 #endif 4791 #endif
4761 } else { 4792 } else {
4762 /* Turn off DCD */ 4793 /* Turn off DCD */
4763 #if (CHIPSET == 12) 4794 #if (CHIPSET == 12)
4764 WRITE_UART_REGISTER (uart, MCR, READ_UART_REGISTER(uart, MCR) & ~MDCD); 4795 WRITE_UART_REGISTER (uart, MCR, READ_UART_REGISTER(uart, MCR) & ~MDCD);
4796 #elif defined(CONFIG_TANGO_MODEM)
4797 if (AI_Tango_pinmux[1] & 0x08)
4798 AI_SetBit (ARMIO_DCD);
4765 #else 4799 #else
4766 AI_SetBit (ARMIO_DCD); 4800 AI_SetBit (ARMIO_DCD);
4767 #endif 4801 #endif
4768 } 4802 }
4769 } 4803 }
4789 4823
4790 if (state & (1 << SB)) { 4824 if (state & (1 << SB)) {
4791 /* Turn on DCD */ 4825 /* Turn on DCD */
4792 #if (CHIPSET == 12) 4826 #if (CHIPSET == 12)
4793 WRITE_UART_REGISTER (uart, MCR, READ_UART_REGISTER(uart, MCR) | MDCD); 4827 WRITE_UART_REGISTER (uart, MCR, READ_UART_REGISTER(uart, MCR) | MDCD);
4828 #elif defined(CONFIG_TANGO_MODEM)
4829 if (AI_Tango_pinmux[1] & 0x08)
4830 AI_ResetBit (ARMIO_DCD);
4794 #else 4831 #else
4795 AI_ResetBit (ARMIO_DCD); 4832 AI_ResetBit (ARMIO_DCD);
4796 #endif 4833 #endif
4797 } else { 4834 } else {
4798 /* Turn off DCD */ 4835 /* Turn off DCD */
4799 #if (CHIPSET == 12) 4836 #if (CHIPSET == 12)
4800 WRITE_UART_REGISTER (uart, MCR, READ_UART_REGISTER(uart, MCR) & ~MDCD); 4837 WRITE_UART_REGISTER (uart, MCR, READ_UART_REGISTER(uart, MCR) & ~MDCD);
4838 #elif defined(CONFIG_TANGO_MODEM)
4839 if (AI_Tango_pinmux[1] & 0x08)
4840 AI_SetBit (ARMIO_DCD);
4801 #else 4841 #else
4802 AI_SetBit (ARMIO_DCD); 4842 AI_SetBit (ARMIO_DCD);
4803 #endif 4843 #endif
4804 } 4844 }
4805 } 4845 }