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comparison src/cs/layer1/tpu_drivers/source0/tpudrv12.h @ 79:3928363c521f

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tpudrv12.h: support for multiple targets
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 02 Oct 2016 05:37:13 +0000
parents 945cf7f506b2
children d380b62e1019
comparison
equal deleted inserted replaced
78:dce31be2b474 79:3928363c521f
13 #define SAFE_INIT_WA 0 // 1 => ENABLE the "RITA safe init" 13 #define SAFE_INIT_WA 0 // 1 => ENABLE the "RITA safe init"
14 // TeST - Enable Main VCO buffer for test 14 // TeST - Enable Main VCO buffer for test
15 #define MAIN_VCO_ACCESS_WA 0 // 1 => ENABLE the Main VCO buffer 15 #define MAIN_VCO_ACCESS_WA 0 // 1 => ENABLE the Main VCO buffer
16 16
17 #include "rf.cfg" 17 #include "rf.cfg"
18 #include "fc-target.cfg"
18 19
19 //--- RITA PG declaration 20 //--- RITA PG declaration
20 21
21 #define R_PG_10 0 22 #define R_PG_10 0
22 #define R_PG_13 1 23 #define R_PG_13 1
218 // For previous PGs this BIT was unused, so it can be safelly programmed 219 // For previous PGs this BIT was unused, so it can be safelly programmed
219 // for all PGs 220 // for all PGs
220 221
221 222
222 // RF signals connected to TSPACT [0..7] 223 // RF signals connected to TSPACT [0..7]
223 //#define RESET_RF BIT_0 // act0 224
224 #define RF_SER_ON BIT_0 // act0 225 #ifdef CONFIG_TARGET_PIRELLI
226 #define RF_RESET_LINE BIT_5
227 #else
228 #define RF_RESET_LINE BIT_0
229 #endif
230
231 #define RF_SER_ON RF_RESET_LINE
225 #define RF_SER_OFF 0 232 #define RF_SER_OFF 0
226 233
227 234 #define TEST_TX_ON 0
228 #if (FEM_TEST==1) 235 #define TEST_RX_ON 0
229 //for test 236
230 #define TEST_TX_ON BIT_2 // act2 237 #if defined(CONFIG_TARGET_LEONARDO) || defined(CONFIG_TARGET_ESAMPLE)
231 #define TEST_RX_ON BIT_3 // act3 238
232 239 // 4-band config (E-sample, P2, Leonardo)
233 //3-band config (D-sample) 240 #define FEM_7 BIT_2 // act2
234 #define FEM_1 BIT_1 // act1 241 #define FEM_8 BIT_1 // act1
235 #define FEM_2 0 //BIT_2 // act2 242 #define FEM_9 BIT_4 // act4
236 #define FEM_3 0 //BIT_3 // act3 243
237 #elif (BOARD == 42 || BOARD == 43 || BOARD == 35 || (BOARD == 41 && (RF_PA == 0 || RF_PA == 1 || RF_PA == 2 || RF_PA == 4))) // ESample, P2, Leonardo 244 #define PA_HI_BAND BIT_3 // act3
238 #define TEST_TX_ON 0 245 #define PA_LO_BAND 0
239 #define TEST_RX_ON 0 246 #define PA_OFF 0
240 // 4-band config (E-sample, P2, Leonardo) 247
241 #define FEM_7 BIT_2 // act2 248 #define FEM_PINS (FEM_7 | FEM_8 | FEM_9)
242 #define FEM_8 BIT_1 // act1 249
243 #define FEM_9 BIT_4 // act4 250 #define FEM_OFF ( FEM_PINS ^ 0 )
244 251
245 #if (RF_PA == 0) // LCPA for ES, P2 and Leo 252 #define FEM_SLEEP ( 0 )
246 #define PA_HI_BAND BIT_3 // act3
247 #define PA_LO_BAND 0
248 #define PA_OFF 0
249 #elif (RF_PA == 1) // RF3146 for ES and Leonardo
250 #define PA_HI_BAND BIT_3 // act3
251 #define PA_LO_BAND 0
252 #define PA_OFF 0
253 #elif (RF_PA == 2) // RF3133 for P2 and Leonardo
254 #define PA_HI_BAND BIT_3 // act3
255 #define PA_LO_BAND 0
256 #define PA_OFF 0
257 #elif (RF_PA == 4) // AWT6108 for Leonardo
258 #define PA_HI_BAND BIT_3 // act3
259 #define PA_LO_BAND 0
260 #define PA_OFF 0
261 #else
262 #error "RF_PA not correctly defined"
263 #endif
264
265 #else // DSample + EVARITA
266 #if (RF_PA != 3) // Hitachi for EVARITA
267 #error
268 #endif
269
270 //#define TEST_RX_ON 0
271 //#define TEST_TX_ON BIT_3 // act3
272 #define TEST_TX_ON 0
273 #define TEST_RX_ON BIT_3 // act3
274
275 //3-band config (D-sample)
276 #define FEM_1 BIT_1 // act1
277 #define FEM_2 BIT_2 // act2
278 #define FEM_3 BIT_3 // act3
279 #endif
280
281 #if (BOARD == 42 || BOARD == 43 || BOARD == 35 || (BOARD == 41 && (RF_PA == 0 || RF_PA == 1 || RF_PA == 2 || RF_PA == 4))) // ESample, P2, Leonardo
282
283 #define FEM_PINS (FEM_7 | FEM_8 | FEM_9)
284
285 #define FEM_OFF ( FEM_PINS ^ 0 )
286
287 #define FEM_SLEEP ( 0 )
288 253
289 // This configuration is always inverted. 254 // This configuration is always inverted.
290 255
291 // 4-band config 256 // RX_UP/DOWN and TX_UP/DOWN
292 // RX_UP/DOWN and TX_UP/DOWN 257 #define RU_900 ( PA_OFF | FEM_PINS ^ 0 )
258 #define RD_900 ( PA_OFF | FEM_PINS ^ 0 )
259 #define TU_900 ( PA_LO_BAND | FEM_PINS ^ FEM_7 )
260 #define TD_900 ( PA_OFF | FEM_PINS ^ 0 )
261
262 #define RU_850 ( PA_OFF | FEM_PINS ^ FEM_9 )
263 #define RD_850 ( PA_OFF | FEM_PINS ^ 0 )
264 #define TU_850 ( PA_LO_BAND | FEM_PINS ^ FEM_7 )
265 #define TD_850 ( PA_OFF | FEM_PINS ^ 0 )
266
267 #define RU_1800 ( PA_OFF | FEM_PINS ^ 0 )
268 #define RD_1800 ( PA_OFF | FEM_PINS ^ 0 )
269 #define TU_1800 ( PA_HI_BAND | FEM_PINS ^ FEM_8 )
270 #define TD_1800 ( PA_OFF | FEM_PINS ^ 0 )
271
272 #define RU_1900 ( PA_OFF | FEM_PINS ^ 0 )
273 #define RD_1900 ( PA_OFF | FEM_PINS ^ 0 )
274 #define TU_1900 ( PA_HI_BAND | FEM_PINS ^ FEM_8 )
275 #define TD_1900 ( PA_OFF | FEM_PINS ^ 0 )
276
277 #elif defined(CONFIG_TARGET_GTAMODEM) || defined(CONFIG_TARGET_FCDEV3B)
278
279 // Openmoko's triband configuration is a bastardized version
280 // of TI's quadband one from Leonardo/E-Sample
281
282 #define FEM_7 BIT_2 // act2
283 #define FEM_8 BIT_1 // act1
284 #define FEM_9 BIT_4 // act4
285
286 #define PA_HI_BAND BIT_3 // act3
287 #define PA_LO_BAND 0
288 #define PA_OFF 0
289
290 #define FEM_PINS (FEM_7 | FEM_8 | FEM_9)
291
292 #define FEM_OFF ( FEM_PINS ^ 0 )
293
294 #define FEM_SLEEP ( 0 )
295
296 // This configuration is always inverted.
297
298 // RX_UP/DOWN and TX_UP/DOWN
293 #define RU_900 ( PA_OFF | FEM_PINS ^ 0 ) 299 #define RU_900 ( PA_OFF | FEM_PINS ^ 0 )
294 #define RD_900 ( PA_OFF | FEM_PINS ^ 0 ) 300 #define RD_900 ( PA_OFF | FEM_PINS ^ 0 )
295 #define TU_900 ( PA_LO_BAND | FEM_PINS ^ FEM_9 ) 301 #define TU_900 ( PA_LO_BAND | FEM_PINS ^ FEM_9 )
296 #define TD_900 ( PA_OFF | FEM_PINS ^ 0 ) 302 #define TD_900 ( PA_OFF | FEM_PINS ^ 0 )
297 303
298 #define RU_850 ( PA_LO_BAND | FEM_PINS ^ 0 ) 304 #define RU_850 ( PA_OFF | FEM_PINS ^ 0 )
299 #define RD_850 ( PA_OFF | FEM_PINS ^ 0 ) 305 #define RD_850 ( PA_OFF | FEM_PINS ^ 0 )
300 #define TU_850 ( PA_LO_BAND | FEM_PINS ^ FEM_9 ) 306 #define TU_850 ( PA_LO_BAND | FEM_PINS ^ FEM_9 )
301 #define TD_850 ( PA_OFF | FEM_PINS ^ 0 ) 307 #define TD_850 ( PA_OFF | FEM_PINS ^ 0 )
302 308
303 #define RU_1800 ( PA_OFF | FEM_PINS ^ 0 ) 309 #define RU_1800 ( PA_OFF | FEM_PINS ^ 0 )
304 #define RD_1800 ( PA_OFF | FEM_PINS ^ 0 ) 310 #define RD_1800 ( PA_OFF | FEM_PINS ^ 0 )
305 #define TU_1800 ( PA_HI_BAND | FEM_PINS ^ FEM_7 ) 311 #define TU_1800 ( PA_HI_BAND | FEM_PINS ^ FEM_7 )
306 #define TD_1800 ( PA_OFF | FEM_PINS ^ 0 ) 312 #define TD_1800 ( PA_OFF | FEM_PINS ^ 0 )
307 313
308 #define RU_1900 ( PA_LO_BAND | FEM_PINS ^ FEM_8 ) 314 #define RU_1900 ( PA_OFF | FEM_PINS ^ FEM_8 )
309 #define RD_1900 ( PA_OFF | FEM_PINS ^ 0 ) 315 #define RD_1900 ( PA_OFF | FEM_PINS ^ 0 )
310 #define TU_1900 ( PA_HI_BAND | FEM_PINS ^ FEM_7 ) 316 #define TU_1900 ( PA_HI_BAND | FEM_PINS ^ FEM_7 )
311 #define TD_1900 ( PA_OFF | FEM_PINS ^ 0 ) 317 #define TD_1900 ( PA_OFF | FEM_PINS ^ 0 )
312 318
313 #else // end BOARD = 43 319 #elif defined(CONFIG_TARGET_PIRELLI)
314 // start RF HW interfacing with EVARITA 320
315 321 #define ANTSW_RX_PCS BIT_4
316 #define FEM_OFF (FEM_1 | FEM_2) 322 #define ANTSW_TX_HIGH BIT_10
317 #define FEM_SLEEP (0) // To avoid leakage during Deep-Seep 323 #define ANTSW_TX_LOW BIT_11
318 324
319 // 3-band config 325 #define PA_HI_BAND BIT_3 // act3
326 #define PA_LO_BAND 0
327 #define PA_OFF 0
328
329 #define PA_ENABLE BIT_0
330
331 // Pirelli uses a non-inverting buffer
332
333 #define FEM_OFF ( 0 )
334
335 #define FEM_SLEEP ( 0 )
336
337 // RX_UP/DOWN and TX_UP/DOWN (triband)
338 #define RU_900 ( PA_OFF | 0 )
339 #define RD_900 ( PA_OFF | 0 )
340 #define TU_900 ( PA_LO_BAND | ANTSW_TX_LOW )
341 #define TD_900 ( PA_OFF | 0 )
342
343 #define RU_850 ( PA_OFF | 0 )
344 #define RD_850 ( PA_OFF | 0 )
345 #define TU_850 ( PA_LO_BAND | ANTSW_TX_LOW )
346 #define TD_850 ( PA_OFF | 0 )
347
348 #define RU_1800 ( PA_OFF | 0 )
349 #define RD_1800 ( PA_OFF | 0 )
350 #define TU_1800 ( PA_HI_BAND | ANTSW_TX_HIGH )
351 #define TD_1800 ( PA_OFF | 0 )
352
353 #define RU_1900 ( PA_OFF | ANTSW_RX_PCS )
354 #define RD_1900 ( PA_OFF | 0 )
355 #define TU_1900 ( PA_HI_BAND | ANTSW_TX_HIGH )
356 #define TD_1900 ( PA_OFF | 0 )
357
358 #elif defined(CONFIG_TARGET_COMPAL)
359
360 #define PA_HI_BAND BIT_8 // act8
361 #define PA_LO_BAND 0
362 #define PA_OFF 0
363
364 #define PA_ENABLE BIT_1
365
366 // FEM control signals are active low
367 #define FEM_PINS (BIT_6 | BIT_2)
368
369 #define FEM_OFF ( FEM_PINS ^ 0 )
370
371 #define FEM_SLEEP ( 0 )
372
373 #define FEM_TX_HIGH BIT_6
374 #if USE_TSPACT2_FOR_TXLOW
375 #define FEM_TX_LOW BIT_2
376 #else
377 #define FEM_TX_LOW BIT_6
378 #endif
379
320 // RX_UP/DOWN and TX_UP/DOWN 380 // RX_UP/DOWN and TX_UP/DOWN
321 #define RU_900 ( FEM_1 | FEM_2 ) 381 #define RU_900 ( PA_OFF | FEM_PINS ^ 0 )
322 #define RD_900 ( FEM_1 | FEM_2 ) 382 #define RD_900 ( PA_OFF | FEM_PINS ^ 0 )
323 #define TU_900 ( FEM_1 ) 383 #define TU_900 ( PA_LO_BAND | FEM_PINS ^ FEM_TX_LOW )
324 #define TD_900 ( FEM_1 | FEM_2 ) 384 #define TD_900 ( PA_OFF | FEM_PINS ^ 0 )
325 385
326 #define RU_850 ( FEM_1 | FEM_2 ) 386 #define RU_850 ( PA_OFF | FEM_PINS ^ 0 )
327 #define RD_850 ( FEM_1 | FEM_2 ) 387 #define RD_850 ( PA_OFF | FEM_PINS ^ 0 )
328 #define TU_850 ( FEM_1 ) 388 #define TU_850 ( PA_LO_BAND | FEM_PINS ^ FEM_TX_LOW )
329 #define TD_850 ( FEM_1 | FEM_2 ) 389 #define TD_850 ( PA_OFF | FEM_PINS ^ 0 )
330 390
331 #define RU_1800 ( FEM_1 | FEM_2 ) 391 #define RU_1800 ( PA_OFF | FEM_PINS ^ 0 )
332 #define RD_1800 ( FEM_1 | FEM_2 ) 392 #define RD_1800 ( PA_OFF | FEM_PINS ^ 0 )
333 #define TU_1800 ( FEM_2 ) 393 #define TU_1800 ( PA_HI_BAND | FEM_PINS ^ FEM_TX_HIGH )
334 #define TD_1800 ( FEM_1 | FEM_2 ) 394 #define TD_1800 ( PA_OFF | FEM_PINS ^ 0 )
335 395
336 #define RU_1900 ( FEM_1 | FEM_2 ) 396 #define RU_1900 ( PA_OFF | FEM_PINS ^ 0 )
337 #define RD_1900 ( FEM_1 | FEM_2 ) 397 #define RD_1900 ( PA_OFF | FEM_PINS ^ 0 )
338 #define TU_1900 ( FEM_2) 398 #define TU_1900 ( PA_HI_BAND | FEM_PINS ^ FEM_TX_HIGH )
339 #define TD_1900 ( FEM_1 | FEM_2 ) 399 #define TD_1900 ( PA_OFF | FEM_PINS ^ 0 )
340 400
341 #endif // BOARD != 43 401 #endif // FreeCalypso target selection
342 402
343 #define TC1_DEVICE_ABB TC1_DEVICE0 // TSPEN0 403 #define TC1_DEVICE_ABB TC1_DEVICE0 // TSPEN0
404 #ifdef CONFIG_TARGET_PIRELLI
405 #define TC1_DEVICE_RF TC1_DEVICE1 // TSPEN1
406 #else
344 #define TC1_DEVICE_RF TC1_DEVICE2 // TSPEN2 407 #define TC1_DEVICE_RF TC1_DEVICE2 // TSPEN2
408 #endif
345 409
346 410
347 //--- TIMINGS ---------------------------------------------------------- 411 //--- TIMINGS ----------------------------------------------------------
348 412
349 /*------------------------------------------*/ 413 /*------------------------------------------*/