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comparison cdg211/cdginc/ccdid.h @ 4:56abf6cf8a0b

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cdg211: cdginc/mdf/pdf files from TCS211-20070608
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 26 Sep 2016 01:11:35 +0000
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3:93999a60b835 4:56abf6cf8a0b
1 /*
2 +--------------------------------------------------------------------------+
3 | PROJECT : PROTOCOL STACK |
4 | FILE : ccdid.h |
5 | SOURCE : "__out__\g23m_dfile\msg\rr_com.mdf" |
6 | LastModified : "2002-11-18" |
7 | IdAndVersion : "8443.250.02.008" |
8 | SrcFileTime : "Mon Nov 24 15:49:38 2003" |
9 | Generated by CCDGEN_2.5.5 on Fri Jun 08 13:59:16 2007 |
10 | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! |
11 +--------------------------------------------------------------------------+
12 */
13
14 typedef enum
15 {
16 /* melemIdx CCD_ID_$(Prefix|Filename)__$(COMP-name)__$(AS-name|VAR-name|COMP-name etc.)*/
17
18 /* 0*/ CCD_ID_RR_COM__mob_class_1__spare_0,
19 /* 1*/ CCD_ID_RR_COM__mob_class_1__rev_lev,
20 /* 2*/ CCD_ID_RR_COM__mob_class_1__es_ind,
21 /* 3*/ CCD_ID_RR_COM__mob_class_1__a5_1,
22 /* 4*/ CCD_ID_RR_COM__mob_class_1__rf_pow_cap,
23 /* 5*/ CCD_ID_RR_COM__mob_class_2__spare_0,
24 /* 6*/ CCD_ID_RR_COM__mob_class_2__rev_lev,
25 /* 7*/ CCD_ID_RR_COM__mob_class_2__es_ind,
26 /* 8*/ CCD_ID_RR_COM__mob_class_2__a5_1,
27 /* 9*/ CCD_ID_RR_COM__mob_class_2__rf_pow_cap,
28 /* 10*/ CCD_ID_RR_COM__mob_class_2__spare_1,
29 /* 11*/ CCD_ID_RR_COM__mob_class_2__ps,
30 /* 12*/ CCD_ID_RR_COM__mob_class_2__ss_screen,
31 /* 13*/ CCD_ID_RR_COM__mob_class_2__mt_pp_sms,
32 /* 14*/ CCD_ID_RR_COM__mob_class_2__vbs,
33 /* 15*/ CCD_ID_RR_COM__mob_class_2__vgcs,
34 /* 16*/ CCD_ID_RR_COM__mob_class_2__egsm,
35 /* 17*/ CCD_ID_RR_COM__mob_class_2__class3,
36 /* 18*/ CCD_ID_RR_COM__mob_class_2__spare_2,
37 /* 19*/ CCD_ID_RR_COM__mob_class_2__lcsva,
38 /* 20*/ CCD_ID_RR_COM__mob_class_2__ucs2_treat,
39 /* 21*/ CCD_ID_RR_COM__mob_class_2__solsa,
40 /* 22*/ CCD_ID_RR_COM__mob_class_2__cmsp,
41 /* 23*/ CCD_ID_RR_COM__mob_class_2__a5_3,
42 /* 24*/ CCD_ID_RR_COM__mob_class_2__a5_2,
43 /* 25*/ CCD_ID_RR_COM__gsm400_struct__gsm400_supp,
44 /* 26*/ CCD_ID_RR_COM__gsm400_struct__gsm400_cap,
45 /* 27*/ CCD_ID_RR_COM__measurement__sms_val,
46 /* 28*/ CCD_ID_RR_COM__measurement__sm_val,
47 /* 29*/ CCD_ID_RR_COM__pos_method__assist_eotd,
48 /* 30*/ CCD_ID_RR_COM__pos_method__based_eotd,
49 /* 31*/ CCD_ID_RR_COM__pos_method__assist_gps,
50 /* 32*/ CCD_ID_RR_COM__pos_method__based_gps,
51 /* 33*/ CCD_ID_RR_COM__pos_method__conv_gps,
52 /* 34*/ CCD_ID_RR_COM__egde_struct__mod,
53 /* 35*/ CCD_ID_RR_COM__egde_struct__egde_pow1,
54 /* 36*/ CCD_ID_RR_COM__egde_struct__egde_pow2,
55 /* 37*/ CCD_ID_RR_COM__dtm_ms__dtm_g_ms_class,
56 /* 38*/ CCD_ID_RR_COM__dtm_ms__mac_support,
57 /* 39*/ CCD_ID_RR_COM__dtm_ms__dtm_e_ms_class,
58 /* 40*/ CCD_ID_RR_COM__mob_class_3__spare_0,
59 /* 41*/ CCD_ID_RR_COM__mob_class_3__mb_value,
60 /* 42*/ CCD_ID_RR_COM__mob_class_3__a5_7,
61 /* 43*/ CCD_ID_RR_COM__mob_class_3__a5_6,
62 /* 44*/ CCD_ID_RR_COM__mob_class_3__a5_5,
63 /* 45*/ CCD_ID_RR_COM__mob_class_3__a5_4,
64 /* 46*/ CCD_ID_RR_COM__mob_class_3__radio_cap_2,
65 /* 47*/ CCD_ID_RR_COM__mob_class_3__spare_1,
66 /* 48*/ CCD_ID_RR_COM__mob_class_3__radio_cap_1,
67 /* 49*/ CCD_ID_RR_COM__mob_class_3__rgsm_class,
68 /* 50*/ CCD_ID_RR_COM__mob_class_3__ms_class,
69 /* 51*/ CCD_ID_RR_COM__mob_class_3__ucs2_treat,
70 /* 52*/ CCD_ID_RR_COM__mob_class_3__ext_meas,
71 /* 53*/ CCD_ID_RR_COM__mob_class_3__measurement,
72 /* 54*/ CCD_ID_RR_COM__mob_class_3__pos_method,
73 /* 55*/ CCD_ID_RR_COM__mob_class_3__edge_ms_class,
74 /* 56*/ CCD_ID_RR_COM__mob_class_3__egde_struct,
75 /* 57*/ CCD_ID_RR_COM__mob_class_3__gsm400_struct,
76 /* 58*/ CCD_ID_RR_COM__mob_class_3__gsm850_cap,
77 /* 59*/ CCD_ID_RR_COM__mob_class_3__pcs1900_cap,
78 /* 60*/ CCD_ID_RR_COM__mob_class_3__umts_fdd,
79 /* 61*/ CCD_ID_RR_COM__mob_class_3__umts_tdd,
80 /* 62*/ CCD_ID_RR_COM__mob_class_3__cdma2000,
81 /* 63*/ CCD_ID_RR_COM__mob_class_3__dtm_ms,
82 /* 64*/ CCD_ID_RR_COM__mob_class_3__single_band,
83 /* 65*/ CCD_ID_RR_COM__mob_class_3__spare_2,
84 /* 66*/ CCD_ID_RR_COM__a5_bits__a5_1,
85 /* 67*/ CCD_ID_RR_COM__a5_bits__a5_2,
86 /* 68*/ CCD_ID_RR_COM__a5_bits__a5_3,
87 /* 69*/ CCD_ID_RR_COM__a5_bits__a5_4,
88 /* 70*/ CCD_ID_RR_COM__a5_bits__a5_5,
89 /* 71*/ CCD_ID_RR_COM__a5_bits__a5_6,
90 /* 72*/ CCD_ID_RR_COM__a5_bits__a5_7,
91 /* 73*/ CCD_ID_RR_COM__sms_sm_value__sms_val,
92 /* 74*/ CCD_ID_RR_COM__sms_sm_value__sm_val,
93 /* 75*/ CCD_ID_RR_COM__gprs_struct__gprs_ms_class,
94 /* 76*/ CCD_ID_RR_COM__gprs_struct__gprs_eda,
95 /* 77*/ CCD_ID_RR_COM__ms_struct__hscsd_ms_class,
96 /* 78*/ CCD_ID_RR_COM__ms_struct__gprs_struct,
97 /* 79*/ CCD_ID_RR_COM__ms_struct__sms_sm_value,
98 /* 80*/ CCD_ID_RR_COM__acc_cap__pow_class,
99 /* 81*/ CCD_ID_RR_COM__acc_cap__a5_bits,
100 /* 82*/ CCD_ID_RR_COM__acc_cap__es_ind,
101 /* 83*/ CCD_ID_RR_COM__acc_cap__ps,
102 /* 84*/ CCD_ID_RR_COM__acc_cap__vgcs,
103 /* 85*/ CCD_ID_RR_COM__acc_cap__vbs,
104 /* 86*/ CCD_ID_RR_COM__acc_cap__ms_struct,
105 /* 87*/ CCD_ID_RR_COM__ra_cap2__acc_tech_typ,
106 /* 88*/ CCD_ID_RR_COM__ra_cap2__acc_cap,
107 /* 89*/ CCD_ID_RR_COM__ra_cap2__spare_0,
108 /* 90*/ CCD_ID_RR_COM__ra_cap__acc_tech_typ,
109 /* 91*/ CCD_ID_RR_COM__ra_cap__acc_cap,
110 /* 92*/ CCD_ID_RR_COM__ra_cap__flag_ra_cap2,
111 /* 93*/ CCD_ID_RR_COM__ra_cap__ra_cap2,
112 /* 94*/ CCD_ID_RR_COM__pow_class4__spare_0,
113 /* 95*/ CCD_ID_RR_COM__pow_class4__pow_class,
114 /* 96*/ CCD_ID_RR_COM__rf_power__pow_class4,
115 /* 97*/ CCD_ID_RR_COM__rf_power__egde_pow1,
116 /* 98*/ CCD_ID_RR_COM__rf_power__egde_pow2,
117 /* 99*/ CCD_ID_RR_COM__rf_ms__gsm_ms_class,
118 /* 100*/ CCD_ID_RR_COM__rf_ms__spare_0,
119 /* 101*/ CCD_ID_RR_COM__rf_ms__edge_ms_class,
120 /* 102*/ CCD_ID_RR_COM__rf_ms__spare_1,
121 /* 103*/ CCD_ID_RR_COM__rf_ms__hscsd_ms_class,
122 /* 104*/ CCD_ID_RR_COM__rf_ms__spare_2,
123 /* 105*/ CCD_ID_RR_COM__rf_ms__gprs_ms_class,
124 /* 106*/ CCD_ID_RR_COM__rf_ms__dtm_g,
125 /* 107*/ CCD_ID_RR_COM__rf_ms__dtm_g_ms_class,
126 /* 108*/ CCD_ID_RR_COM__rf_ms__ecsd_ms_class,
127 /* 109*/ CCD_ID_RR_COM__rf_ms__spare_3,
128 /* 110*/ CCD_ID_RR_COM__rf_ms__egprs_ms_class,
129 /* 111*/ CCD_ID_RR_COM__rf_ms__dtm_e,
130 /* 112*/ CCD_ID_RR_COM__rf_ms__dtm_e_ms_class,
131 /* 113*/ CCD_ID_RR_COM__rf_cap__setbands,
132 /* 114*/ CCD_ID_RR_COM__rf_cap__bands,
133 /* 115*/ CCD_ID_RR_COM__rf_cap__rf_power,
134 /* 116*/ CCD_ID_RR_COM__rf_cap__rf_ms,
135 /* 117*/ CCD_ID_RR_COM__rf_cap__es_ind,
136 /* 118*/ CCD_ID_RR_COM__rf_cap__ps,
137 /* 119*/ CCD_ID_RR_COM__rf_cap__mt_pp_sms,
138 /* 120*/ CCD_ID_RR_COM__rf_cap__lcsva,
139 /* 121*/ CCD_ID_RR_COM__rf_cap__solsa,
140 /* 122*/ CCD_ID_RR_COM__rf_cap__cmsp,
141 /* 123*/ CCD_ID_RR_COM__rf_cap__mod,
142 /* 124*/ CCD_ID_RR_COM__rf_cap__mac_support,
143 /* 125*/ CCD_ID_RR_COM__rf_cap__meas,
144 /* 126*/ CCD_ID_RR_COM__rf_cap__ext_meas,
145 /* 127*/ CCD_ID_RR_COM__rf_cap__compact,
146 /* 128*/ CCD_ID_RR_COM__rf_cap__vbs,
147 /* 129*/ CCD_ID_RR_COM__rf_cap__vgcs,
148 /* 130*/ CCD_ID_RR_COM__rf_cap__ucs2_treat,
149 /* 131*/ CCD_ID_RR_COM__rf_cap__ss_screen,
150 /* 132*/ CCD_ID_RR_COM__rf_cap__sms_val,
151 /* 133*/ CCD_ID_RR_COM__rf_cap__sm_val,
152 /* 134*/ CCD_ID_RR_COM__rf_cap__a5_bits,
153 /* 135*/ CCD_ID_RR_COM__rf_cap__spare_0,
154 /* 136*/ CCD_ID_RR_COM__rf_cap__assist_eotd,
155 /* 137*/ CCD_ID_RR_COM__rf_cap__based_eotd,
156 /* 138*/ CCD_ID_RR_COM__rf_cap__assist_gps,
157 /* 139*/ CCD_ID_RR_COM__rf_cap__based_gps,
158 /* 140*/ CCD_ID_RR_COM__rf_cap__conv_gps,
159 /* 141*/ CCD_ID_RR_COM__rf_cap__gprs_eda,
160 /* 142*/ CCD_ID_RR_COM__rf_cap__egprs_eda,
161 /* 143*/ CCD_ID_RR_COM__rf_cap__spare_1,
162 /* 144*/ CCD_ID_RR_COM__MS_RF_CAPABILITY__msg_type,
163 /* 145*/ CCD_ID_RR_COM__MS_RF_CAPABILITY__rf_cap,
164 /* 146*/ CCD_ID_RR__alpha_gamma__alpha,
165 /* 147*/ CCD_ID_RR__alpha_gamma__gamma,
166 /* 148*/ CCD_ID_RR__apdu_data__apdu_info,
167 /* 149*/ CCD_ID_RR__apdu_flags__spare_0,
168 /* 150*/ CCD_ID_RR__apdu_flags__c_r,
169 /* 151*/ CCD_ID_RR__apdu_flags__f_seg,
170 /* 152*/ CCD_ID_RR__apdu_flags__l_seg,
171 /* 153*/ CCD_ID_RR__apdu_id__protoc_ident,
172 /* 154*/ CCD_ID_RR__cell_desc__bcch_arfcn_hi,
173 /* 155*/ CCD_ID_RR__cell_desc__ncc,
174 /* 156*/ CCD_ID_RR__cell_desc__bcc,
175 /* 157*/ CCD_ID_RR__cell_desc__bcch_arfcn_lo,
176 /* 158*/ CCD_ID_RR__cell_opt_bcch__spare_0,
177 /* 159*/ CCD_ID_RR__cell_opt_bcch__pow_ctrl,
178 /* 160*/ CCD_ID_RR__cell_opt_bcch__dtx_b,
179 /* 161*/ CCD_ID_RR__cell_opt_bcch__rlt,
180 /* 162*/ CCD_ID_RR__cell_opt_sacch__dtx2_s,
181 /* 163*/ CCD_ID_RR__cell_opt_sacch__pow_ctrl,
182 /* 164*/ CCD_ID_RR__cell_opt_sacch__dtx_s,
183 /* 165*/ CCD_ID_RR__cell_opt_sacch__rlt,
184 /* 166*/ CCD_ID_RR__cell_select__cell_resel_hyst,
185 /* 167*/ CCD_ID_RR__cell_select__ms_txpwr_max_cch,
186 /* 168*/ CCD_ID_RR__cell_select__acs,
187 /* 169*/ CCD_ID_RR__cell_select__neci,
188 /* 170*/ CCD_ID_RR__cell_select__rxlev_access_min,
189 /* 171*/ CCD_ID_RR__chan_desc__chan_type,
190 /* 172*/ CCD_ID_RR__chan_desc__tn,
191 /* 173*/ CCD_ID_RR__chan_desc__tsc,
192 /* 174*/ CCD_ID_RR__chan_desc__hop,
193 /* 175*/ CCD_ID_RR__chan_desc__spare_0,
194 /* 176*/ CCD_ID_RR__chan_desc__arfcn,
195 /* 177*/ CCD_ID_RR__chan_desc__maio,
196 /* 178*/ CCD_ID_RR__chan_desc__hsn,
197 /* 179*/ CCD_ID_RR__chan_needed__cn2,
198 /* 180*/ CCD_ID_RR__chan_needed__cn1,
199 /* 181*/ CCD_ID_RR__chan_needed3_4__cn3,
200 /* 182*/ CCD_ID_RR__chan_needed3_4__cn4,
201 /* 183*/ CCD_ID_RR__chan_req_desc__or_ty,
202 /* 184*/ CCD_ID_RR__chan_req_desc__spare_0,
203 /* 185*/ CCD_ID_RR__chan_req_desc__spare_1,
204 /* 186*/ CCD_ID_RR__chan_req_desc__spare_2,
205 /* 187*/ CCD_ID_RR__chan_req_desc__crd_prio,
206 /* 188*/ CCD_ID_RR__chan_req_desc__rlc_mode,
207 /* 189*/ CCD_ID_RR__chan_req_desc__llc_fr_type,
208 /* 190*/ CCD_ID_RR__chan_req_desc__rbw,
209 /* 191*/ CCD_ID_RR__chan_req_desc__rlc_c_oct,
210 /* 192*/ CCD_ID_RR__ciph_key_num__spare_0,
211 /* 193*/ CCD_ID_RR__ciph_key_num__key_seq,
212 /* 194*/ CCD_ID_RR__ciph_mode_set__algo_ident,
213 /* 195*/ CCD_ID_RR__ciph_mode_set__sc,
214 /* 196*/ CCD_ID_RR__ciph_res__spare_0,
215 /* 197*/ CCD_ID_RR__ciph_res__cr,
216 /* 198*/ CCD_ID_RR__cod_prop__codec_thr,
217 /* 199*/ CCD_ID_RR__cod_prop__codec_hyst,
218 /* 200*/ CCD_ID_RR__ctrl_chan_desc__spare_0,
219 /* 201*/ CCD_ID_RR__ctrl_chan_desc__att,
220 /* 202*/ CCD_ID_RR__ctrl_chan_desc__bs_ag_blks_res,
221 /* 203*/ CCD_ID_RR__ctrl_chan_desc__ccch_conf,
222 /* 204*/ CCD_ID_RR__ctrl_chan_desc__spare_1,
223 /* 205*/ CCD_ID_RR__ctrl_chan_desc__bs_pa_mfrms,
224 /* 206*/ CCD_ID_RR__ctrl_chan_desc__t3212,
225 /* 207*/ CCD_ID_RR__dgcr__gcr,
226 /* 208*/ CCD_ID_RR__dgcr__sf,
227 /* 209*/ CCD_ID_RR__dgcr__af,
228 /* 210*/ CCD_ID_RR__dgcr__call_prio,
229 /* 211*/ CCD_ID_RR__dgcr__group_ckn,
230 /* 212*/ CCD_ID_RR__ext_meas_res__sc_used,
231 /* 213*/ CCD_ID_RR__ext_meas_res__dtx_used,
232 /* 214*/ CCD_ID_RR__ext_meas_res__rx_lev_ncell,
233 /* 215*/ CCD_ID_RR__exten__ext_len,
234 /* 216*/ CCD_ID_RR__exten__sp_ext,
235 /* 217*/ CCD_ID_RR__freq_chan_seq__spare_0,
236 /* 218*/ CCD_ID_RR__freq_chan_seq__low_arfcn,
237 /* 219*/ CCD_ID_RR__freq_chan_seq__inc_skip,
238 /* 220*/ CCD_ID_RR__freq_range__freq_lower,
239 /* 221*/ CCD_ID_RR__freq_range__freq_higher,
240 /* 222*/ CCD_ID_RR__ba_list_pref__freq_range,
241 /* 223*/ CCD_ID_RR__ba_list_pref__arfcn,
242 /* 224*/ CCD_ID_RR__ba_list_pref__spare_0,
243 /* 225*/ CCD_ID_RR__ba_range__num_range,
244 /* 226*/ CCD_ID_RR__ba_range__freq_range,
245 /* 227*/ CCD_ID_RR__gprs_indic__ra_color,
246 /* 228*/ CCD_ID_RR__gprs_indic__si13_pos,
247 /* 229*/ CCD_ID_RR__gprs_meas_res__c_val,
248 /* 230*/ CCD_ID_RR__gprs_meas_res__rxqual,
249 /* 231*/ CCD_ID_RR__gprs_meas_res__spare_0,
250 /* 232*/ CCD_ID_RR__gprs_meas_res__sign_var,
251 /* 233*/ CCD_ID_RR__gprs_ma__hsn,
252 /* 234*/ CCD_ID_RR__gprs_ma__rfln,
253 /* 235*/ CCD_ID_RR__gprs_ma__hop,
254 /* 236*/ CCD_ID_RR__gprs_ma__allo_len6,
255 /* 237*/ CCD_ID_RR__gprs_ma__allo_bmp6,
256 /* 238*/ CCD_ID_RR__gprs_ma__arfcn_idx,
257 /* 239*/ CCD_ID_RR__gprs_resum__spare_0,
258 /* 240*/ CCD_ID_RR__gprs_resum__res_ack,
259 /* 241*/ CCD_ID_RR__group_chan_desc__chan_type,
260 /* 242*/ CCD_ID_RR__group_chan_desc__tn,
261 /* 243*/ CCD_ID_RR__group_chan_desc__tsc,
262 /* 244*/ CCD_ID_RR__group_chan_desc__hop,
263 /* 245*/ CCD_ID_RR__group_chan_desc__spare_0,
264 /* 246*/ CCD_ID_RR__group_chan_desc__arfcn,
265 /* 247*/ CCD_ID_RR__group_chan_desc__maio,
266 /* 248*/ CCD_ID_RR__group_chan_desc__hsn,
267 /* 249*/ CCD_ID_RR__group_chan_desc__mac,
268 /* 250*/ CCD_ID_RR__hop_freq__flag,
269 /* 251*/ CCD_ID_RR__hop_freq__ma_len,
270 /* 252*/ CCD_ID_RR__hop_freq__mac,
271 /* 253*/ CCD_ID_RR__hop_freq__freq_short_list2,
272 /* 254*/ CCD_ID_RR__gr_ch_desc__chan_type,
273 /* 255*/ CCD_ID_RR__gr_ch_desc__tn,
274 /* 256*/ CCD_ID_RR__gr_ch_desc__tsc,
275 /* 257*/ CCD_ID_RR__gr_ch_desc__hop,
276 /* 258*/ CCD_ID_RR__gr_ch_desc__spare_0,
277 /* 259*/ CCD_ID_RR__gr_ch_desc__arfcn,
278 /* 260*/ CCD_ID_RR__gr_ch_desc__maio,
279 /* 261*/ CCD_ID_RR__gr_ch_desc__hsn,
280 /* 262*/ CCD_ID_RR__gr_ch_desc__hop_freq,
281 /* 263*/ CCD_ID_RR__gr_call_info__dgcr,
282 /* 264*/ CCD_ID_RR__gr_call_info__gr_ch_desc,
283 /* 265*/ CCD_ID_RR__ia_freq_par__fp_len,
284 /* 266*/ CCD_ID_RR__ia_freq_par__spare_0,
285 /* 267*/ CCD_ID_RR__ia_freq_par__maio,
286 /* 268*/ CCD_ID_RR__ia_freq_par__mac,
287 /* 269*/ CCD_ID_RR__loc_area_ident__mcc,
288 /* 270*/ CCD_ID_RR__loc_area_ident__mnc,
289 /* 271*/ CCD_ID_RR__loc_area_ident__lac,
290 /* 272*/ CCD_ID_RR__lsa_id_info__lsa_id,
291 /* 273*/ CCD_ID_RR__lsa_id_info__lsa_id_add,
292 /* 274*/ CCD_ID_RR__chan_coding__mac_mode,
293 /* 275*/ CCD_ID_RR__chan_coding__cod_scheme,
294 /* 276*/ CCD_ID_RR__mob_alloc__mac,
295 /* 277*/ CCD_ID_RR__mob_ident__ident_type,
296 /* 278*/ CCD_ID_RR__mob_ident__odd_even,
297 /* 279*/ CCD_ID_RR__mob_ident__ident_dig,
298 /* 280*/ CCD_ID_RR__mob_ident__spare_0,
299 /* 281*/ CCD_ID_RR__mob_ident__tmsi_1,
300 /* 282*/ CCD_ID_RR__mob_time_diff__diff,
301 /* 283*/ CCD_ID_RR__mob_time_diff__spare_0,
302 /* 284*/ CCD_ID_RR__multirate_conf__tlv_len,
303 /* 285*/ CCD_ID_RR__multirate_conf__mr_vers,
304 /* 286*/ CCD_ID_RR__multirate_conf__nscb,
305 /* 287*/ CCD_ID_RR__multirate_conf__icmi,
306 /* 288*/ CCD_ID_RR__multirate_conf__spare_0,
307 /* 289*/ CCD_ID_RR__multirate_conf__st_mode,
308 /* 290*/ CCD_ID_RR__multirate_conf__set_amr,
309 /* 291*/ CCD_ID_RR__multirate_conf__spare_1,
310 /* 292*/ CCD_ID_RR__multirate_conf__cod_prop,
311 /* 293*/ CCD_ID_RR__multirate_conf__spare_2,
312 /* 294*/ CCD_ID_RR__multirate_conf__spare_3,
313 /* 295*/ CCD_ID_RR__multislot_alloc__dab,
314 /* 296*/ CCD_ID_RR__multislot_alloc__uab,
315 /* 297*/ CCD_ID_RR__multislot_alloc__chan_set,
316 /* 298*/ CCD_ID_RR__nc_mode__spare_0,
317 /* 299*/ CCD_ID_RR__nc_mode__ncm,
318 /* 300*/ CCD_ID_RR__ncell__rx_lev_ncell,
319 /* 301*/ CCD_ID_RR__ncell__bcch_ncell,
320 /* 302*/ CCD_ID_RR__ncell__bsic,
321 /* 303*/ CCD_ID_RR__meas_result__ba_used,
322 /* 304*/ CCD_ID_RR__meas_result__dtx_used,
323 /* 305*/ CCD_ID_RR__meas_result__rxlev_full,
324 /* 306*/ CCD_ID_RR__meas_result__spare_0,
325 /* 307*/ CCD_ID_RR__meas_result__meas_valid,
326 /* 308*/ CCD_ID_RR__meas_result__rxlev_sub,
327 /* 309*/ CCD_ID_RR__meas_result__spare_1,
328 /* 310*/ CCD_ID_RR__meas_result__rxqual_full,
329 /* 311*/ CCD_ID_RR__meas_result__rxqual_sub,
330 /* 312*/ CCD_ID_RR__meas_result__num_ncell,
331 /* 313*/ CCD_ID_RR__meas_result__ncell,
332 /* 314*/ CCD_ID_RR__nln_stat__nln_pch,
333 /* 315*/ CCD_ID_RR__nln_stat__nln_status,
334 /* 316*/ CCD_ID_RR__nt_rest_oct__nln_pch,
335 /* 317*/ CCD_ID_RR__nt_rest_oct__gr_call_info,
336 /* 318*/ CCD_ID_RR__nt_rest_oct__spare_0,
337 /* 319*/ CCD_ID_RR__opt_mcc__mcc,
338 /* 320*/ CCD_ID_RR__lsa_param__prio_thr,
339 /* 321*/ CCD_ID_RR__lsa_param__lsa_offs,
340 /* 322*/ CCD_ID_RR__lsa_param__opt_mcc,
341 /* 323*/ CCD_ID_RR__lsa_param__mnc,
342 /* 324*/ CCD_ID_RR__lsa_par_id__lsa_param,
343 /* 325*/ CCD_ID_RR__lsa_par_id__lsa_id_info,
344 /* 326*/ CCD_ID_RR__opt_sel_par__cell_bar_qual,
345 /* 327*/ CCD_ID_RR__opt_sel_par__cell_resel_offs,
346 /* 328*/ CCD_ID_RR__opt_sel_par__temp_offs,
347 /* 329*/ CCD_ID_RR__opt_sel_par__penalty_time,
348 /* 330*/ CCD_ID_RR__p0_pwr_ctrl_mode__p0,
349 /* 331*/ CCD_ID_RR__p0_pwr_ctrl_mode__pwr_ctrl_mode,
350 /* 332*/ CCD_ID_RR__p0_prmode__p0,
351 /* 333*/ CCD_ID_RR__p0_prmode__pr_mode,
352 /* 334*/ CCD_ID_RR__p0_bts_prmode__p0,
353 /* 335*/ CCD_ID_RR__p0_bts_prmode__pwr_ctrl_mode,
354 /* 336*/ CCD_ID_RR__p0_bts_prmode__pr_mode,
355 /* 337*/ CCD_ID_RR__pck_chan_desc__pck_chan_type,
356 /* 338*/ CCD_ID_RR__pck_chan_desc__tn,
357 /* 339*/ CCD_ID_RR__pck_chan_desc__tsc,
358 /* 340*/ CCD_ID_RR__pck_chan_desc__hop,
359 /* 341*/ CCD_ID_RR__pck_chan_desc__indir,
360 /* 342*/ CCD_ID_RR__pck_chan_desc__spare_0,
361 /* 343*/ CCD_ID_RR__pck_chan_desc__arfcn,
362 /* 344*/ CCD_ID_RR__pck_chan_desc__maio,
363 /* 345*/ CCD_ID_RR__pck_chan_desc__ma_num,
364 /* 346*/ CCD_ID_RR__pck_chan_desc__flag,
365 /* 347*/ CCD_ID_RR__pck_chan_desc__spare_1,
366 /* 348*/ CCD_ID_RR__pck_chan_desc__ch_mark1,
367 /* 349*/ CCD_ID_RR__pck_chan_desc__hsn,
368 /* 350*/ CCD_ID_RR__page_mode__spare_0,
369 /* 351*/ CCD_ID_RR__page_mode__pm,
370 /* 352*/ CCD_ID_RR__pan__dec,
371 /* 353*/ CCD_ID_RR__pan__inc,
372 /* 354*/ CCD_ID_RR__pan__pmax,
373 /* 355*/ CCD_ID_RR__gprs_opt__nmo,
374 /* 356*/ CCD_ID_RR__gprs_opt__t3168,
375 /* 357*/ CCD_ID_RR__gprs_opt__t3192,
376 /* 358*/ CCD_ID_RR__gprs_opt__drx_t_max,
377 /* 359*/ CCD_ID_RR__gprs_opt__ab_type,
378 /* 360*/ CCD_ID_RR__gprs_opt__ctrl_ack_type,
379 /* 361*/ CCD_ID_RR__gprs_opt__bs_cv_max,
380 /* 362*/ CCD_ID_RR__gprs_opt__pan,
381 /* 363*/ CCD_ID_RR__gprs_opt__exten,
382 /* 364*/ CCD_ID_RR__pbcch_des__pb,
383 /* 365*/ CCD_ID_RR__pbcch_des__tsc,
384 /* 366*/ CCD_ID_RR__pbcch_des__tn,
385 /* 367*/ CCD_ID_RR__pbcch_des__flag,
386 /* 368*/ CCD_ID_RR__pbcch_des__flag2,
387 /* 369*/ CCD_ID_RR__pbcch_des__arfcn,
388 /* 370*/ CCD_ID_RR__pbcch_des__maio,
389 /* 371*/ CCD_ID_RR__pch_nch_info__pch_restruct,
390 /* 372*/ CCD_ID_RR__pch_nch_info__nln_sacch,
391 /* 373*/ CCD_ID_RR__pch_nch_info__call_prio,
392 /* 374*/ CCD_ID_RR__pch_nch_info__nln_status,
393 /* 375*/ CCD_ID_RR__pos__mod,
394 /* 376*/ CCD_ID_RR__pos__rel_pos,
395 /* 377*/ CCD_ID_RR__pos__bcch_type,
396 /* 378*/ CCD_ID_RR__poss__pos,
397 /* 379*/ CCD_ID_RR__poss__poso,
398 /* 380*/ CCD_ID_RR__itp__flag,
399 /* 381*/ CCD_ID_RR__itp__it4,
400 /* 382*/ CCD_ID_RR__itp__flag1,
401 /* 383*/ CCD_ID_RR__itp__it5,
402 /* 384*/ CCD_ID_RR__itp__it6,
403 /* 385*/ CCD_ID_RR__itp__poss,
404 /* 386*/ CCD_ID_RR__pow_cmd__spare_0,
405 /* 387*/ CCD_ID_RR__pow_cmd__pow,
406 /* 388*/ CCD_ID_RR__pow_cmd_access__atc,
407 /* 389*/ CCD_ID_RR__pow_cmd_access__spare_0,
408 /* 390*/ CCD_ID_RR__pow_cmd_access__pow,
409 /* 391*/ CCD_ID_RR__rach_ctrl__max_retrans,
410 /* 392*/ CCD_ID_RR__rach_ctrl__tx_integer,
411 /* 393*/ CCD_ID_RR__rach_ctrl__cell_bar_access,
412 /* 394*/ CCD_ID_RR__rach_ctrl__re,
413 /* 395*/ CCD_ID_RR__rach_ctrl__ac,
414 /* 396*/ CCD_ID_RR__req_ref__ra,
415 /* 397*/ CCD_ID_RR__req_ref__t1,
416 /* 398*/ CCD_ID_RR__req_ref__t3,
417 /* 399*/ CCD_ID_RR__req_ref__t2,
418 /* 400*/ CCD_ID_RR__rout_area_id__mcc,
419 /* 401*/ CCD_ID_RR__rout_area_id__mnc,
420 /* 402*/ CCD_ID_RR__rout_area_id__lac,
421 /* 403*/ CCD_ID_RR__rout_area_id__rac,
422 /* 404*/ CCD_ID_RR__sched__itp,
423 /* 405*/ CCD_ID_RR__sched__itpo,
424 /* 406*/ CCD_ID_RR__si1_rest_oct__nch_position,
425 /* 407*/ CCD_ID_RR__si1_rest_oct__spare_0,
426 /* 408*/ CCD_ID_RR__si4_rest_octets_s__lsa_param,
427 /* 409*/ CCD_ID_RR__si4_rest_octets_s__cell_ident,
428 /* 410*/ CCD_ID_RR__si4_rest_octets_s__lsa_id_info,
429 /* 411*/ CCD_ID_RR__si4_rest_octets_bs__flag,
430 /* 412*/ CCD_ID_RR__si4_rest_octets_bs__break_ind,
431 /* 413*/ CCD_ID_RR__si4_rest_octets_bs__si4_rest_octets_s,
432 /* 414*/ CCD_ID_RR__si4_rest_oct__opt_sel_par,
433 /* 415*/ CCD_ID_RR__si4_rest_oct__pow_offs,
434 /* 416*/ CCD_ID_RR__si4_rest_oct__gprs_indic,
435 /* 417*/ CCD_ID_RR__si4_rest_oct__si4_rest_octets_bs,
436 /* 418*/ CCD_ID_RR__si7_rest_oct__opt_sel_par,
437 /* 419*/ CCD_ID_RR__si7_rest_oct__pow_offs,
438 /* 420*/ CCD_ID_RR__si7_rest_oct__gprs_indic,
439 /* 421*/ CCD_ID_RR__si7_rest_oct__si4_rest_octets_s,
440 /* 422*/ CCD_ID_RR__si9_rest_oct__sched,
441 /* 423*/ CCD_ID_RR__si9_rest_oct__spare_0,
442 /* 424*/ CCD_ID_RR__si13_info__bcch_cm,
443 /* 425*/ CCD_ID_RR__si13_info__si_cf,
444 /* 426*/ CCD_ID_RR__si13_info__flag,
445 /* 427*/ CCD_ID_RR__si13_info__si13_cm,
446 /* 428*/ CCD_ID_RR__si13_info__gprs_ma,
447 /* 429*/ CCD_ID_RR__si13_info__flag1,
448 /* 430*/ CCD_ID_RR__si13_info__rac,
449 /* 431*/ CCD_ID_RR__si13_info__spgc,
450 /* 432*/ CCD_ID_RR__si13_info__prio_acc_thr,
451 /* 433*/ CCD_ID_RR__si13_info__nco,
452 /* 434*/ CCD_ID_RR__si13_info__gprs_opt,
453 /* 435*/ CCD_ID_RR__si13_info__alpha,
454 /* 436*/ CCD_ID_RR__si13_info__t_avg_w,
455 /* 437*/ CCD_ID_RR__si13_info__t_avg_t,
456 /* 438*/ CCD_ID_RR__si13_info__pc_meas_chan,
457 /* 439*/ CCD_ID_RR__si13_info__n_avg_i,
458 /* 440*/ CCD_ID_RR__si13_info__psi1_period,
459 /* 441*/ CCD_ID_RR__si13_info__pbcch_des,
460 /* 442*/ CCD_ID_RR__si13_rest_oct__si13_info,
461 /* 443*/ CCD_ID_RR__si13_rest_oct__spare_0,
462 /* 444*/ CCD_ID_RR__si16_rest_oct__lsa_par_id,
463 /* 445*/ CCD_ID_RR__si16_rest_oct__spare_0,
464 /* 446*/ CCD_ID_RR__single_alloc__tn,
465 /* 447*/ CCD_ID_RR__single_alloc__alpha_gamma,
466 /* 448*/ CCD_ID_RR__single_alloc__p0_pwr_ctrl_mode,
467 /* 449*/ CCD_ID_RR__start_time__t1,
468 /* 450*/ CCD_ID_RR__start_time__t3,
469 /* 451*/ CCD_ID_RR__start_time__t2,
470 /* 452*/ CCD_ID_RR__pck_meas_par__meas_start,
471 /* 453*/ CCD_ID_RR__pck_meas_par__meas_int,
472 /* 454*/ CCD_ID_RR__pck_meas_par__meas_bmp,
473 /* 455*/ CCD_ID_RR__si3_rest_oct__opt_sel_par,
474 /* 456*/ CCD_ID_RR__si3_rest_oct__pow_offs,
475 /* 457*/ CCD_ID_RR__si3_rest_oct__si2ter_ind,
476 /* 458*/ CCD_ID_RR__si3_rest_oct__es_ind_tag,
477 /* 459*/ CCD_ID_RR__si3_rest_oct__if_and_where,
478 /* 460*/ CCD_ID_RR__si3_rest_oct__gprs_indic,
479 /* 461*/ CCD_ID_RR__si3_rest_oct__spare_0,
480 /* 462*/ CCD_ID_RR__synch_ind__nci,
481 /* 463*/ CCD_ID_RR__synch_ind__rot,
482 /* 464*/ CCD_ID_RR__synch_ind__si,
483 /* 465*/ CCD_ID_RR__tagged_gamma__gamma,
484 /* 466*/ CCD_ID_RR__pwr_ctrl__alpha,
485 /* 467*/ CCD_ID_RR__pwr_ctrl__tagged_gamma,
486 /* 468*/ CCD_ID_RR__tagged_call_prio__call_prio,
487 /* 469*/ CCD_ID_RR__p3_rest_oct__chan_needed3_4,
488 /* 470*/ CCD_ID_RR__p3_rest_oct__nln_stat,
489 /* 471*/ CCD_ID_RR__p3_rest_oct__tagged_call_prio,
490 /* 472*/ CCD_ID_RR__p3_rest_oct__spare_0,
491 /* 473*/ CCD_ID_RR__p2_rest_oct__cn3,
492 /* 474*/ CCD_ID_RR__p2_rest_oct__nln_stat,
493 /* 475*/ CCD_ID_RR__p2_rest_oct__tagged_call_prio,
494 /* 476*/ CCD_ID_RR__p2_rest_oct__pck_page3,
495 /* 477*/ CCD_ID_RR__p2_rest_oct__spare_0,
496 /* 478*/ CCD_ID_RR__p1_rest_oct__nln_stat,
497 /* 479*/ CCD_ID_RR__p1_rest_oct__tagged_call_prio,
498 /* 480*/ CCD_ID_RR__p1_rest_oct__gr_call_info,
499 /* 481*/ CCD_ID_RR__p1_rest_oct__pck_page1,
500 /* 482*/ CCD_ID_RR__p1_rest_oct__pck_page2,
501 /* 483*/ CCD_ID_RR__p1_rest_oct__spare_0,
502 /* 484*/ CCD_ID_RR__tagged_usf_tn__usf,
503 /* 485*/ CCD_ID_RR__time_advance__spare_0,
504 /* 486*/ CCD_ID_RR__time_advance__ta,
505 /* 487*/ CCD_ID_RR__ta_idx_nm__ta_idx,
506 /* 488*/ CCD_ID_RR__ta_idx_nm__ta_nm,
507 /* 489*/ CCD_ID_RR__pck_ta__ta,
508 /* 490*/ CCD_ID_RR__pck_ta__ta_idx_nm,
509 /* 491*/ CCD_ID_RR__pck_dl_ass__mac_mode,
510 /* 492*/ CCD_ID_RR__pck_dl_ass__rlc_mode,
511 /* 493*/ CCD_ID_RR__pck_dl_ass__ts_all,
512 /* 494*/ CCD_ID_RR__pck_dl_ass__pck_ta,
513 /* 495*/ CCD_ID_RR__pck_dl_ass__pwr_ctrl,
514 /* 496*/ CCD_ID_RR__pck_dl_ass__tfi,
515 /* 497*/ CCD_ID_RR__pck_dl_ass__pck_meas_par,
516 /* 498*/ CCD_ID_RR__pck_dl_ass__spare_0,
517 /* 499*/ CCD_ID_RR__tfi_ass_alloc__tfi,
518 /* 500*/ CCD_ID_RR__tfi_ass_alloc__poll,
519 /* 501*/ CCD_ID_RR__tfi_ass_alloc__allo_flag,
520 /* 502*/ CCD_ID_RR__tfi_ass_alloc__usf,
521 /* 503*/ CCD_ID_RR__tfi_ass_alloc__usf_gran,
522 /* 504*/ CCD_ID_RR__tfi_ass_alloc__p0_prmode,
523 /* 505*/ CCD_ID_RR__tfi_ass_alloc__allo_len5,
524 /* 506*/ CCD_ID_RR__tfi_ass_alloc__allo_bmp5,
525 /* 507*/ CCD_ID_RR__tfi_ass_alloc__p0_bts_prmode,
526 /* 508*/ CCD_ID_RR__tfi_ass_alloc__ccm,
527 /* 509*/ CCD_ID_RR__tfi_ass_alloc__tlli_bcc,
528 /* 510*/ CCD_ID_RR__tfi_ass_alloc__alpha,
529 /* 511*/ CCD_ID_RR__tfi_ass_alloc__gamma,
530 /* 512*/ CCD_ID_RR__tfi_ass_alloc__ta_idx,
531 /* 513*/ CCD_ID_RR__tfi_ass_alloc__tbf_start_time,
532 /* 514*/ CCD_ID_RR__tfi_ass_rlc__tfi,
533 /* 515*/ CCD_ID_RR__tfi_ass_rlc__rlc_mode,
534 /* 516*/ CCD_ID_RR__tfi_ass_rlc__alpha,
535 /* 517*/ CCD_ID_RR__tfi_ass_rlc__gamma,
536 /* 518*/ CCD_ID_RR__tfi_ass_rlc__poll,
537 /* 519*/ CCD_ID_RR__tfi_ass_rlc__ta_valid,
538 /* 520*/ CCD_ID_RR__pck_downl_ass_ia__ded_tlli,
539 /* 521*/ CCD_ID_RR__pck_downl_ass_ia__tfi_ass_rlc,
540 /* 522*/ CCD_ID_RR__pck_downl_ass_ia__ta_idx,
541 /* 523*/ CCD_ID_RR__pck_downl_ass_ia__tbf_start_time,
542 /* 524*/ CCD_ID_RR__pck_downl_ass_ia__p0_bts_prmode,
543 /* 525*/ CCD_ID_RR__usf_gamma__usf,
544 /* 526*/ CCD_ID_RR__usf_gamma__gamma,
545 /* 527*/ CCD_ID_RR__usf_gamma_csn1__usf_gamma,
546 /* 528*/ CCD_ID_RR__dyn_alloc__ext_dyn_all,
547 /* 529*/ CCD_ID_RR__dyn_alloc__p0,
548 /* 530*/ CCD_ID_RR__dyn_alloc__usf_gran,
549 /* 531*/ CCD_ID_RR__dyn_alloc__tfi,
550 /* 532*/ CCD_ID_RR__dyn_alloc__rlc_blks,
551 /* 533*/ CCD_ID_RR__dyn_alloc__flag_pp,
552 /* 534*/ CCD_ID_RR__dyn_alloc__tagged_usf_tn,
553 /* 535*/ CCD_ID_RR__dyn_alloc__alpha,
554 /* 536*/ CCD_ID_RR__dyn_alloc__usf_gamma_csn1,
555 /* 537*/ CCD_ID_RR__vbs_vgcs_opt__inband_not,
556 /* 538*/ CCD_ID_RR__vbs_vgcs_opt__inband_pag,
557 /* 539*/ CCD_ID_RR__si6_rest_oct__pch_nch_info,
558 /* 540*/ CCD_ID_RR__si6_rest_oct__vbs_vgcs_opt,
559 /* 541*/ CCD_ID_RR__si6_rest_oct__spare_0,
560 /* 542*/ CCD_ID_RR__vgcs_tmi__tm,
561 /* 543*/ CCD_ID_RR__vgcs_tmi__group_ckn,
562 /* 544*/ CCD_ID_RR__vgcs_tmi__spare_0,
563 /* 545*/ CCD_ID_RR__fa_blk_ia__blp,
564 /* 546*/ CCD_ID_RR__fa_blk_ia__allo_len7,
565 /* 547*/ CCD_ID_RR__fa_blk_ia__allo_bmp7,
566 /* 548*/ CCD_ID_RR__fix_alloc__tfi,
567 /* 549*/ CCD_ID_RR__fix_alloc__final,
568 /* 550*/ CCD_ID_RR__fix_alloc__dl_ctrl_tn,
569 /* 551*/ CCD_ID_RR__fix_alloc__p0_pwr_ctrl_mode,
570 /* 552*/ CCD_ID_RR__fix_alloc__flag,
571 /* 553*/ CCD_ID_RR__fix_alloc__ts_all,
572 /* 554*/ CCD_ID_RR__fix_alloc__pwr_ctrl,
573 /* 555*/ CCD_ID_RR__fix_alloc__hdm,
574 /* 556*/ CCD_ID_RR__fix_alloc__spare_0,
575 /* 557*/ CCD_ID_RR__fix_alloc__flag1,
576 /* 558*/ CCD_ID_RR__fix_alloc__fa_blk_ia,
577 /* 559*/ CCD_ID_RR__fix_alloc__allo_var,
578 /* 560*/ CCD_ID_RR__pck_ul_ass__ccm,
579 /* 561*/ CCD_ID_RR__pck_ul_ass__tlli_bcc,
580 /* 562*/ CCD_ID_RR__pck_ul_ass__pck_ta,
581 /* 563*/ CCD_ID_RR__pck_ul_ass__flag,
582 /* 564*/ CCD_ID_RR__pck_ul_ass__flag1,
583 /* 565*/ CCD_ID_RR__pck_ul_ass__dyn_alloc,
584 /* 566*/ CCD_ID_RR__pck_ul_ass__single_alloc,
585 /* 567*/ CCD_ID_RR__pck_ul_ass__fix_alloc,
586 /* 568*/ CCD_ID_RR__pck_ul_ass__spare_0,
587 /* 569*/ CCD_ID_RR__sngl_block_alloc__alpha,
588 /* 570*/ CCD_ID_RR__sngl_block_alloc__gamma,
589 /* 571*/ CCD_ID_RR__sngl_block_alloc__spare_0,
590 /* 572*/ CCD_ID_RR__sngl_block_alloc__tbf_start_time,
591 /* 573*/ CCD_ID_RR__sngl_block_alloc__p0_bts_prmode,
592 /* 574*/ CCD_ID_RR__pck_upl_ass_ia__flag,
593 /* 575*/ CCD_ID_RR__pck_upl_ass_ia__tfi_ass_alloc,
594 /* 576*/ CCD_ID_RR__pck_upl_ass_ia__sngl_block_alloc,
595 /* 577*/ CCD_ID_RR__ia_assign_par__flag,
596 /* 578*/ CCD_ID_RR__ia_assign_par__flag1,
597 /* 579*/ CCD_ID_RR__ia_assign_par__pck_upl_ass_ia,
598 /* 580*/ CCD_ID_RR__ia_assign_par__pck_downl_ass_ia,
599 /* 581*/ CCD_ID_RR__ia_assign_par__ia_2nd_part,
600 /* 582*/ CCD_ID_RR__ia_rest_oct_par__flag,
601 /* 583*/ CCD_ID_RR__ia_rest_oct_par__ia_freq_par,
602 /* 584*/ CCD_ID_RR__ia_rest_oct_par__ia_assign_par,
603 /* 585*/ CCD_ID_RR__ia_rest_oct__ia_rest_oct_par,
604 /* 586*/ CCD_ID_RR__ia_rest_oct__spare_0,
605 /* 587*/ CCD_ID_RR__B_APPLIC_INFO__msg_type,
606 /* 588*/ CCD_ID_RR__B_APPLIC_INFO__apdu_id,
607 /* 589*/ CCD_ID_RR__B_APPLIC_INFO__apdu_flags,
608 /* 590*/ CCD_ID_RR__B_APPLIC_INFO__apdu_data,
609 /* 591*/ CCD_ID_RR__D_ADD_ASSIGN__msg_type,
610 /* 592*/ CCD_ID_RR__D_ADD_ASSIGN__chan_desc,
611 /* 593*/ CCD_ID_RR__D_ADD_ASSIGN__mob_alloc,
612 /* 594*/ CCD_ID_RR__D_ADD_ASSIGN__start_time,
613 /* 595*/ CCD_ID_RR__D_ASSIGN_CMD__msg_type,
614 /* 596*/ CCD_ID_RR__D_ASSIGN_CMD__chan_desc,
615 /* 597*/ CCD_ID_RR__D_ASSIGN_CMD__pow_cmd,
616 /* 598*/ CCD_ID_RR__D_ASSIGN_CMD__freq_list_after,
617 /* 599*/ CCD_ID_RR__D_ASSIGN_CMD__cell_chan_desc,
618 /* 600*/ CCD_ID_RR__D_ASSIGN_CMD__multislot_alloc,
619 /* 601*/ CCD_ID_RR__D_ASSIGN_CMD__chan_mode,
620 /* 602*/ CCD_ID_RR__D_ASSIGN_CMD__chan_mode2,
621 /* 603*/ CCD_ID_RR__D_ASSIGN_CMD__chan_mode3,
622 /* 604*/ CCD_ID_RR__D_ASSIGN_CMD__chan_mode4,
623 /* 605*/ CCD_ID_RR__D_ASSIGN_CMD__chan_mode5,
624 /* 606*/ CCD_ID_RR__D_ASSIGN_CMD__chan_mode6,
625 /* 607*/ CCD_ID_RR__D_ASSIGN_CMD__chan_mode7,
626 /* 608*/ CCD_ID_RR__D_ASSIGN_CMD__chan_mode8,
627 /* 609*/ CCD_ID_RR__D_ASSIGN_CMD__chan_desc_after_2,
628 /* 610*/ CCD_ID_RR__D_ASSIGN_CMD__chan_mode_2,
629 /* 611*/ CCD_ID_RR__D_ASSIGN_CMD__mob_alloc_after,
630 /* 612*/ CCD_ID_RR__D_ASSIGN_CMD__start_time,
631 /* 613*/ CCD_ID_RR__D_ASSIGN_CMD__freq_list_before,
632 /* 614*/ CCD_ID_RR__D_ASSIGN_CMD__chan_desc_before,
633 /* 615*/ CCD_ID_RR__D_ASSIGN_CMD__chan_desc_before_2,
634 /* 616*/ CCD_ID_RR__D_ASSIGN_CMD__freq_chan_seq,
635 /* 617*/ CCD_ID_RR__D_ASSIGN_CMD__mob_alloc_before,
636 /* 618*/ CCD_ID_RR__D_ASSIGN_CMD__ciph_mode_set,
637 /* 619*/ CCD_ID_RR__D_ASSIGN_CMD__vgcs_tmi,
638 /* 620*/ CCD_ID_RR__D_ASSIGN_CMD__multirate_conf,
639 /* 621*/ CCD_ID_RR__U_ASSIGN_COMP__msg_type,
640 /* 622*/ CCD_ID_RR__U_ASSIGN_COMP__rr_cause,
641 /* 623*/ CCD_ID_RR__U_ASSIGN_FAIL__msg_type,
642 /* 624*/ CCD_ID_RR__U_ASSIGN_FAIL__rr_cause,
643 /* 625*/ CCD_ID_RR__D_CHAN_MOD__msg_type,
644 /* 626*/ CCD_ID_RR__D_CHAN_MOD__chan_desc,
645 /* 627*/ CCD_ID_RR__D_CHAN_MOD__chan_mode,
646 /* 628*/ CCD_ID_RR__D_CHAN_MOD__vgcs_tmi,
647 /* 629*/ CCD_ID_RR__D_CHAN_MOD__multirate_conf,
648 /* 630*/ CCD_ID_RR__U_CHAN_MOD_ACK__msg_type,
649 /* 631*/ CCD_ID_RR__U_CHAN_MOD_ACK__chan_desc,
650 /* 632*/ CCD_ID_RR__U_CHAN_MOD_ACK__chan_mode,
651 /* 633*/ CCD_ID_RR__D_CHAN_REL__msg_type,
652 /* 634*/ CCD_ID_RR__D_CHAN_REL__rr_cause,
653 /* 635*/ CCD_ID_RR__D_CHAN_REL__ba_range,
654 /* 636*/ CCD_ID_RR__D_CHAN_REL__group_chan_desc,
655 /* 637*/ CCD_ID_RR__D_CHAN_REL__group_ckn,
656 /* 638*/ CCD_ID_RR__D_CHAN_REL__gprs_resum,
657 /* 639*/ CCD_ID_RR__D_CHAN_REL__ba_list_pref,
658 /* 640*/ CCD_ID_RR__D_CIPH_CMD__msg_type,
659 /* 641*/ CCD_ID_RR__D_CIPH_CMD__ciph_mode_set,
660 /* 642*/ CCD_ID_RR__D_CIPH_CMD__ciph_res,
661 /* 643*/ CCD_ID_RR__U_CIPH_COMP__msg_type,
662 /* 644*/ CCD_ID_RR__U_CIPH_COMP__mob_ident,
663 /* 645*/ CCD_ID_RR__U_CLASS_CHNG__msg_type,
664 /* 646*/ CCD_ID_RR__U_CLASS_CHNG__mob_class_2,
665 /* 647*/ CCD_ID_RR__U_CLASS_CHNG__mob_class_3,
666 /* 648*/ CCD_ID_RR__D_CLASS_ENQ__msg_type,
667 /* 649*/ CCD_ID_RR__D_CONF_CHANGE_CMD__msg_type,
668 /* 650*/ CCD_ID_RR__D_CONF_CHANGE_CMD__multislot_alloc,
669 /* 651*/ CCD_ID_RR__D_CONF_CHANGE_CMD__chan_mode,
670 /* 652*/ CCD_ID_RR__D_CONF_CHANGE_CMD__chan_mode2,
671 /* 653*/ CCD_ID_RR__D_CONF_CHANGE_CMD__chan_mode3,
672 /* 654*/ CCD_ID_RR__D_CONF_CHANGE_CMD__chan_mode4,
673 /* 655*/ CCD_ID_RR__D_CONF_CHANGE_CMD__chan_mode5,
674 /* 656*/ CCD_ID_RR__D_CONF_CHANGE_CMD__chan_mode6,
675 /* 657*/ CCD_ID_RR__D_CONF_CHANGE_CMD__chan_mode7,
676 /* 658*/ CCD_ID_RR__D_CONF_CHANGE_CMD__chan_mode8,
677 /* 659*/ CCD_ID_RR__D_CONF_CHANGE_ACK__msg_type,
678 /* 660*/ CCD_ID_RR__D_CONFIG_CHANGE_REJ__msg_type,
679 /* 661*/ CCD_ID_RR__D_CONFIG_CHANGE_REJ__rr_cause,
680 /* 662*/ CCD_ID_RR__D_EXT_MEAS_ORDER__msg_type,
681 /* 663*/ CCD_ID_RR__D_EXT_MEAS_ORDER__ext_meas_freq,
682 /* 664*/ CCD_ID_RR__U_EXT_MEAS_REPORT__msg_type,
683 /* 665*/ CCD_ID_RR__U_EXT_MEAS_REPORT__ext_meas_res,
684 /* 666*/ CCD_ID_RR__D_FREQ_REDEF__msg_type,
685 /* 667*/ CCD_ID_RR__D_FREQ_REDEF__chan_desc,
686 /* 668*/ CCD_ID_RR__D_FREQ_REDEF__mob_alloc,
687 /* 669*/ CCD_ID_RR__D_FREQ_REDEF__start_time,
688 /* 670*/ CCD_ID_RR__D_FREQ_REDEF__cell_chan_desc,
689 /* 671*/ CCD_ID_RR__U_GPRS_SUSP_REQ__msg_type,
690 /* 672*/ CCD_ID_RR__U_GPRS_SUSP_REQ__ded_tlli,
691 /* 673*/ CCD_ID_RR__U_GPRS_SUSP_REQ__rout_area_id,
692 /* 674*/ CCD_ID_RR__U_GPRS_SUSP_REQ__susp_cause,
693 /* 675*/ CCD_ID_RR__D_HANDOV_CMD__msg_type,
694 /* 676*/ CCD_ID_RR__D_HANDOV_CMD__cell_desc,
695 /* 677*/ CCD_ID_RR__D_HANDOV_CMD__chan_desc_after,
696 /* 678*/ CCD_ID_RR__D_HANDOV_CMD__handov_ref,
697 /* 679*/ CCD_ID_RR__D_HANDOV_CMD__pow_cmd_access,
698 /* 680*/ CCD_ID_RR__D_HANDOV_CMD__synch_ind,
699 /* 681*/ CCD_ID_RR__D_HANDOV_CMD__freq_short_list_after,
700 /* 682*/ CCD_ID_RR__D_HANDOV_CMD__freq_list_after,
701 /* 683*/ CCD_ID_RR__D_HANDOV_CMD__cell_chan_desc,
702 /* 684*/ CCD_ID_RR__D_HANDOV_CMD__chan_mode,
703 /* 685*/ CCD_ID_RR__D_HANDOV_CMD__chan_mode2,
704 /* 686*/ CCD_ID_RR__D_HANDOV_CMD__chan_mode3,
705 /* 687*/ CCD_ID_RR__D_HANDOV_CMD__chan_mode4,
706 /* 688*/ CCD_ID_RR__D_HANDOV_CMD__chan_mode5,
707 /* 689*/ CCD_ID_RR__D_HANDOV_CMD__chan_mode6,
708 /* 690*/ CCD_ID_RR__D_HANDOV_CMD__chan_mode7,
709 /* 691*/ CCD_ID_RR__D_HANDOV_CMD__chan_mode8,
710 /* 692*/ CCD_ID_RR__D_HANDOV_CMD__chan_desc_after_2,
711 /* 693*/ CCD_ID_RR__D_HANDOV_CMD__chan_mode_2,
712 /* 694*/ CCD_ID_RR__D_HANDOV_CMD__freq_chan_seq_after,
713 /* 695*/ CCD_ID_RR__D_HANDOV_CMD__mob_alloc_after,
714 /* 696*/ CCD_ID_RR__D_HANDOV_CMD__start_time,
715 /* 697*/ CCD_ID_RR__D_HANDOV_CMD__time_diff,
716 /* 698*/ CCD_ID_RR__D_HANDOV_CMD__time_advance,
717 /* 699*/ CCD_ID_RR__D_HANDOV_CMD__freq_short_list_before,
718 /* 700*/ CCD_ID_RR__D_HANDOV_CMD__freq_list_before,
719 /* 701*/ CCD_ID_RR__D_HANDOV_CMD__chan_desc_before,
720 /* 702*/ CCD_ID_RR__D_HANDOV_CMD__chan_desc_before_2,
721 /* 703*/ CCD_ID_RR__D_HANDOV_CMD__freq_chan_seq_before,
722 /* 704*/ CCD_ID_RR__D_HANDOV_CMD__mob_alloc_before,
723 /* 705*/ CCD_ID_RR__D_HANDOV_CMD__ciph_mode_set,
724 /* 706*/ CCD_ID_RR__D_HANDOV_CMD__vgcs_tmi,
725 /* 707*/ CCD_ID_RR__D_HANDOV_CMD__multirate_conf,
726 /* 708*/ CCD_ID_RR__U_HANDOV_COMP__msg_type,
727 /* 709*/ CCD_ID_RR__U_HANDOV_COMP__rr_cause,
728 /* 710*/ CCD_ID_RR__U_HANDOV_COMP__mob_time_diff,
729 /* 711*/ CCD_ID_RR__U_HANDOV_FAIL__msg_type,
730 /* 712*/ CCD_ID_RR__U_HANDOV_FAIL__rr_cause,
731 /* 713*/ CCD_ID_RR__D_IMM_ASSIGN__msg_type,
732 /* 714*/ CCD_ID_RR__D_IMM_ASSIGN__spare_0,
733 /* 715*/ CCD_ID_RR__D_IMM_ASSIGN__tma,
734 /* 716*/ CCD_ID_RR__D_IMM_ASSIGN__dl,
735 /* 717*/ CCD_ID_RR__D_IMM_ASSIGN__d_t,
736 /* 718*/ CCD_ID_RR__D_IMM_ASSIGN__page_mode,
737 /* 719*/ CCD_ID_RR__D_IMM_ASSIGN__chan_desc,
738 /* 720*/ CCD_ID_RR__D_IMM_ASSIGN__pck_chan_desc,
739 /* 721*/ CCD_ID_RR__D_IMM_ASSIGN__req_ref,
740 /* 722*/ CCD_ID_RR__D_IMM_ASSIGN__time_advance,
741 /* 723*/ CCD_ID_RR__D_IMM_ASSIGN__mob_alloc,
742 /* 724*/ CCD_ID_RR__D_IMM_ASSIGN__start_time,
743 /* 725*/ CCD_ID_RR__D_IMM_ASSIGN__ia_rest_oct,
744 /* 726*/ CCD_ID_RR__D_IMM_ASSIGN_EXT__msg_type,
745 /* 727*/ CCD_ID_RR__D_IMM_ASSIGN_EXT__page_mode,
746 /* 728*/ CCD_ID_RR__D_IMM_ASSIGN_EXT__spare_0,
747 /* 729*/ CCD_ID_RR__D_IMM_ASSIGN_EXT__chan_desc,
748 /* 730*/ CCD_ID_RR__D_IMM_ASSIGN_EXT__req_ref,
749 /* 731*/ CCD_ID_RR__D_IMM_ASSIGN_EXT__time_advance,
750 /* 732*/ CCD_ID_RR__D_IMM_ASSIGN_EXT__chan_desc_2,
751 /* 733*/ CCD_ID_RR__D_IMM_ASSIGN_EXT__req_ref_2,
752 /* 734*/ CCD_ID_RR__D_IMM_ASSIGN_EXT__time_advance_2,
753 /* 735*/ CCD_ID_RR__D_IMM_ASSIGN_EXT__mob_alloc,
754 /* 736*/ CCD_ID_RR__D_IMM_ASSIGN_EXT__start_time,
755 /* 737*/ CCD_ID_RR__D_IMM_ASSIGN_EXT__spare_1,
756 /* 738*/ CCD_ID_RR__D_IMM_ASSIGN_REJ__msg_type,
757 /* 739*/ CCD_ID_RR__D_IMM_ASSIGN_REJ__page_mode,
758 /* 740*/ CCD_ID_RR__D_IMM_ASSIGN_REJ__spare_0,
759 /* 741*/ CCD_ID_RR__D_IMM_ASSIGN_REJ__req_ref,
760 /* 742*/ CCD_ID_RR__D_IMM_ASSIGN_REJ__t3122,
761 /* 743*/ CCD_ID_RR__D_IMM_ASSIGN_REJ__req_ref_2,
762 /* 744*/ CCD_ID_RR__D_IMM_ASSIGN_REJ__t3122_2,
763 /* 745*/ CCD_ID_RR__D_IMM_ASSIGN_REJ__req_ref_3,
764 /* 746*/ CCD_ID_RR__D_IMM_ASSIGN_REJ__t3122_3,
765 /* 747*/ CCD_ID_RR__D_IMM_ASSIGN_REJ__req_ref_4,
766 /* 748*/ CCD_ID_RR__D_IMM_ASSIGN_REJ__t3122_4,
767 /* 749*/ CCD_ID_RR__D_IMM_ASSIGN_REJ__spare_1,
768 /* 750*/ CCD_ID_RR__U_MEAS_REP__msg_type,
769 /* 751*/ CCD_ID_RR__U_MEAS_REP__meas_result,
770 /* 752*/ CCD_ID_RR__D_NOTIFY_NCH__msg_type,
771 /* 753*/ CCD_ID_RR__D_NOTIFY_NCH__nt_rest_oct,
772 /* 754*/ CCD_ID_RR__D_PAG_REQ_1__msg_type,
773 /* 755*/ CCD_ID_RR__D_PAG_REQ_1__page_mode,
774 /* 756*/ CCD_ID_RR__D_PAG_REQ_1__chan_needed,
775 /* 757*/ CCD_ID_RR__D_PAG_REQ_1__mob_ident,
776 /* 758*/ CCD_ID_RR__D_PAG_REQ_1__mob_ident_2,
777 /* 759*/ CCD_ID_RR__D_PAG_REQ_1__p1_rest_oct,
778 /* 760*/ CCD_ID_RR__D_PAG_REQ_2__msg_type,
779 /* 761*/ CCD_ID_RR__D_PAG_REQ_2__page_mode,
780 /* 762*/ CCD_ID_RR__D_PAG_REQ_2__chan_needed,
781 /* 763*/ CCD_ID_RR__D_PAG_REQ_2__tmsi_1,
782 /* 764*/ CCD_ID_RR__D_PAG_REQ_2__tmsi_2,
783 /* 765*/ CCD_ID_RR__D_PAG_REQ_2__mob_ident,
784 /* 766*/ CCD_ID_RR__D_PAG_REQ_2__p2_rest_oct,
785 /* 767*/ CCD_ID_RR__D_PAG_REQ_3__msg_type,
786 /* 768*/ CCD_ID_RR__D_PAG_REQ_3__page_mode,
787 /* 769*/ CCD_ID_RR__D_PAG_REQ_3__chan_needed,
788 /* 770*/ CCD_ID_RR__D_PAG_REQ_3__tmsi_1,
789 /* 771*/ CCD_ID_RR__D_PAG_REQ_3__tmsi_2,
790 /* 772*/ CCD_ID_RR__D_PAG_REQ_3__tmsi_3,
791 /* 773*/ CCD_ID_RR__D_PAG_REQ_3__tmsi_4,
792 /* 774*/ CCD_ID_RR__D_PAG_REQ_3__p3_rest_oct,
793 /* 775*/ CCD_ID_RR__U_PAG_RES__msg_type,
794 /* 776*/ CCD_ID_RR__U_PAG_RES__ciph_key_num,
795 /* 777*/ CCD_ID_RR__U_PAG_RES__spare_0,
796 /* 778*/ CCD_ID_RR__U_PAG_RES__mob_class_2,
797 /* 779*/ CCD_ID_RR__U_PAG_RES__mob_ident,
798 /* 780*/ CCD_ID_RR__D_PART_REL__msg_type,
799 /* 781*/ CCD_ID_RR__D_PART_REL__chan_desc,
800 /* 782*/ CCD_ID_RR__U_PART_REL_COMP__msg_type,
801 /* 783*/ CCD_ID_RR__D_PDCH_ASS_CMD__msg_type,
802 /* 784*/ CCD_ID_RR__D_PDCH_ASS_CMD__chan_desc,
803 /* 785*/ CCD_ID_RR__D_PDCH_ASS_CMD__cell_chan_desc,
804 /* 786*/ CCD_ID_RR__D_PDCH_ASS_CMD__freq_list_after,
805 /* 787*/ CCD_ID_RR__D_PDCH_ASS_CMD__mob_alloc_after,
806 /* 788*/ CCD_ID_RR__D_PDCH_ASS_CMD__start_time,
807 /* 789*/ CCD_ID_RR__D_PDCH_ASS_CMD__freq_list_before,
808 /* 790*/ CCD_ID_RR__D_PDCH_ASS_CMD__chan_desc_before,
809 /* 791*/ CCD_ID_RR__D_PDCH_ASS_CMD__freq_chan_seq,
810 /* 792*/ CCD_ID_RR__D_PDCH_ASS_CMD__mob_alloc_before,
811 /* 793*/ CCD_ID_RR__D_PDCH_ASS_CMD__pck_ul_ass,
812 /* 794*/ CCD_ID_RR__D_PDCH_ASS_CMD__pck_dl_ass,
813 /* 795*/ CCD_ID_RR__D_PHYS_INFO__msg_type,
814 /* 796*/ CCD_ID_RR__D_PHYS_INFO__time_advance,
815 /* 797*/ CCD_ID_RR__D_CHANGE_ORDER__msg_type,
816 /* 798*/ CCD_ID_RR__D_CHANGE_ORDER__cell_desc,
817 /* 799*/ CCD_ID_RR__D_CHANGE_ORDER__nc_mode,
818 /* 800*/ CCD_ID_RR__D_RR_INIT_REQ__msg_type,
819 /* 801*/ CCD_ID_RR__D_RR_INIT_REQ__ciph_key_num,
820 /* 802*/ CCD_ID_RR__D_RR_INIT_REQ__chan_coding,
821 /* 803*/ CCD_ID_RR__D_RR_INIT_REQ__mob_class_2,
822 /* 804*/ CCD_ID_RR__D_RR_INIT_REQ__ded_tlli,
823 /* 805*/ CCD_ID_RR__D_RR_INIT_REQ__chan_req_desc,
824 /* 806*/ CCD_ID_RR__D_RR_INIT_REQ__gprs_meas_res,
825 /* 807*/ CCD_ID_RR__B_RR_STATUS__msg_type,
826 /* 808*/ CCD_ID_RR__B_RR_STATUS__rr_cause,
827 /* 809*/ CCD_ID_RR__D_SYS_INFO_1__msg_type,
828 /* 810*/ CCD_ID_RR__D_SYS_INFO_1__cell_chan_desc,
829 /* 811*/ CCD_ID_RR__D_SYS_INFO_1__rach_ctrl,
830 /* 812*/ CCD_ID_RR__D_SYS_INFO_1__si1_rest_oct,
831 /* 813*/ CCD_ID_RR__D_SYS_INFO_2__msg_type,
832 /* 814*/ CCD_ID_RR__D_SYS_INFO_2__neigh_cell_desc,
833 /* 815*/ CCD_ID_RR__D_SYS_INFO_2__ncc_permit,
834 /* 816*/ CCD_ID_RR__D_SYS_INFO_2__rach_ctrl,
835 /* 817*/ CCD_ID_RR__D_SYS_INFO_2BIS__msg_type,
836 /* 818*/ CCD_ID_RR__D_SYS_INFO_2BIS__neigh_cell_desc,
837 /* 819*/ CCD_ID_RR__D_SYS_INFO_2BIS__rach_ctrl,
838 /* 820*/ CCD_ID_RR__D_SYS_INFO_2BIS__spare_0,
839 /* 821*/ CCD_ID_RR__D_SYS_INFO_2TER__msg_type,
840 /* 822*/ CCD_ID_RR__D_SYS_INFO_2TER__neigh_cell_desc,
841 /* 823*/ CCD_ID_RR__D_SYS_INFO_2TER__spare_0,
842 /* 824*/ CCD_ID_RR__D_SYS_INFO_3__msg_type,
843 /* 825*/ CCD_ID_RR__D_SYS_INFO_3__cell_ident,
844 /* 826*/ CCD_ID_RR__D_SYS_INFO_3__loc_area_ident,
845 /* 827*/ CCD_ID_RR__D_SYS_INFO_3__ctrl_chan_desc,
846 /* 828*/ CCD_ID_RR__D_SYS_INFO_3__cell_opt_bcch,
847 /* 829*/ CCD_ID_RR__D_SYS_INFO_3__cell_select,
848 /* 830*/ CCD_ID_RR__D_SYS_INFO_3__rach_ctrl,
849 /* 831*/ CCD_ID_RR__D_SYS_INFO_3__si3_rest_oct,
850 /* 832*/ CCD_ID_RR__D_SYS_INFO_4__msg_type,
851 /* 833*/ CCD_ID_RR__D_SYS_INFO_4__loc_area_ident,
852 /* 834*/ CCD_ID_RR__D_SYS_INFO_4__cell_select,
853 /* 835*/ CCD_ID_RR__D_SYS_INFO_4__rach_ctrl,
854 /* 836*/ CCD_ID_RR__D_SYS_INFO_4__chan_desc,
855 /* 837*/ CCD_ID_RR__D_SYS_INFO_4__mob_alloc,
856 /* 838*/ CCD_ID_RR__D_SYS_INFO_4__si4_rest_oct,
857 /* 839*/ CCD_ID_RR__D_SYS_INFO_4__spare_0,
858 /* 840*/ CCD_ID_RR__D_SYS_INFO_5__msg_type,
859 /* 841*/ CCD_ID_RR__D_SYS_INFO_5__neigh_cell_desc,
860 /* 842*/ CCD_ID_RR__D_SYS_INFO_5BIS__msg_type,
861 /* 843*/ CCD_ID_RR__D_SYS_INFO_5BIS__neigh_cell_desc,
862 /* 844*/ CCD_ID_RR__D_SYS_INFO_5TER__msg_type,
863 /* 845*/ CCD_ID_RR__D_SYS_INFO_5TER__neigh_cell_desc,
864 /* 846*/ CCD_ID_RR__D_SYS_INFO_6__msg_type,
865 /* 847*/ CCD_ID_RR__D_SYS_INFO_6__cell_ident,
866 /* 848*/ CCD_ID_RR__D_SYS_INFO_6__loc_area_ident,
867 /* 849*/ CCD_ID_RR__D_SYS_INFO_6__cell_opt_sacch,
868 /* 850*/ CCD_ID_RR__D_SYS_INFO_6__ncc_permit,
869 /* 851*/ CCD_ID_RR__D_SYS_INFO_6__si6_rest_oct,
870 /* 852*/ CCD_ID_RR__D_SYS_INFO_7__msg_type,
871 /* 853*/ CCD_ID_RR__D_SYS_INFO_7__si7_rest_oct,
872 /* 854*/ CCD_ID_RR__D_SYS_INFO_8__msg_type,
873 /* 855*/ CCD_ID_RR__D_SYS_INFO_8__si8_rest_oct,
874 /* 856*/ CCD_ID_RR__D_SYS_INFO_9__msg_type,
875 /* 857*/ CCD_ID_RR__D_SYS_INFO_9__rach_ctrl,
876 /* 858*/ CCD_ID_RR__D_SYS_INFO_9__si9_rest_oct,
877 /* 859*/ CCD_ID_RR__D_SYS_INFO_13__msg_type,
878 /* 860*/ CCD_ID_RR__D_SYS_INFO_13__si13_rest_oct,
879 /* 861*/ CCD_ID_RR__D_SYS_INFO_16__msg_type,
880 /* 862*/ CCD_ID_RR__D_SYS_INFO_16__si16_rest_oct,
881 /* 863*/ CCD_ID_RR__D_SYS_INFO_17__msg_type,
882 /* 864*/ CCD_ID_RR__D_SYS_INFO_17__si17_rest_oct,
883 /* 865*/ CCD_ID_RR__TALKER_IND__msg_type,
884 /* 866*/ CCD_ID_RR__TALKER_IND__mob_class_2,
885 /* 867*/ CCD_ID_RR__TALKER_IND__mob_ident,
886 /* 868*/ CCD_ID_RR__D_UPLINK_BUSY__msg_type,
887 /* 869*/ CCD_ID_RR__B_UPLINK_REL__msg_type,
888 /* 870*/ CCD_ID_RR__B_UPLINK_REL__rr_cause,
889 /* 871*/ CCD_ID_RR__D_VGCS_UPLINK_GRANT__msg_type,
890 /* 872*/ CCD_ID_RR__D_VGCS_UPLINK_GRANT__req_ref,
891 /* 873*/ CCD_ID_RR__D_VGCS_UPLINK_GRANT__time_advance,
892 /* 874*/ CCD_ID_MM__auth_rand__rand,
893 /* 875*/ CCD_ID_MM__ciph_key_num__spare_0,
894 /* 876*/ CCD_ID_MM__ciph_key_num__key_seq,
895 /* 877*/ CCD_ID_MM__ident__spare_0,
896 /* 878*/ CCD_ID_MM__ident__ident_type,
897 /* 879*/ CCD_ID_MM__loc_area_ident__mcc,
898 /* 880*/ CCD_ID_MM__loc_area_ident__mnc,
899 /* 881*/ CCD_ID_MM__loc_area_ident__lac,
900 /* 882*/ CCD_ID_MM__loc_upd_type__follow,
901 /* 883*/ CCD_ID_MM__loc_upd_type__spare_0,
902 /* 884*/ CCD_ID_MM__loc_upd_type__lut,
903 /* 885*/ CCD_ID_MM__mob_id__ident_type,
904 /* 886*/ CCD_ID_MM__mob_id__odd_even,
905 /* 887*/ CCD_ID_MM__mob_id__ident_dig,
906 /* 888*/ CCD_ID_MM__mob_id__spare_0,
907 /* 889*/ CCD_ID_MM__mob_id__tmsi,
908 /* 890*/ CCD_ID_MM__mob_id__dmy,
909 /* 891*/ CCD_ID_MM__pd_and_sapi__spare_0,
910 /* 892*/ CCD_ID_MM__pd_and_sapi__sapi,
911 /* 893*/ CCD_ID_MM__pd_and_sapi__pd,
912 /* 894*/ CCD_ID_MM__full_net_name__spare_0,
913 /* 895*/ CCD_ID_MM__full_net_name__cs,
914 /* 896*/ CCD_ID_MM__full_net_name__add_ci,
915 /* 897*/ CCD_ID_MM__full_net_name__num_spare,
916 /* 898*/ CCD_ID_MM__full_net_name__text,
917 /* 899*/ CCD_ID_MM__net_tz__tz,
918 /* 900*/ CCD_ID_MM__net_tz_and_time__year,
919 /* 901*/ CCD_ID_MM__net_tz_and_time__month,
920 /* 902*/ CCD_ID_MM__net_tz_and_time__day,
921 /* 903*/ CCD_ID_MM__net_tz_and_time__hour,
922 /* 904*/ CCD_ID_MM__net_tz_and_time__minute,
923 /* 905*/ CCD_ID_MM__net_tz_and_time__second,
924 /* 906*/ CCD_ID_MM__net_tz_and_time__tz,
925 /* 907*/ CCD_ID_MM__eqv_plmn__mcc,
926 /* 908*/ CCD_ID_MM__eqv_plmn__mnc,
927 /* 909*/ CCD_ID_MM__eqv_plmn_list__eqv_plmn,
928 /* 910*/ CCD_ID_MM__D_ABORT__msg_type,
929 /* 911*/ CCD_ID_MM__D_ABORT__rej_cause,
930 /* 912*/ CCD_ID_MM__D_AUTH_REJ__msg_type,
931 /* 913*/ CCD_ID_MM__D_AUTH_REQ__msg_type,
932 /* 914*/ CCD_ID_MM__D_AUTH_REQ__ciph_key_num,
933 /* 915*/ CCD_ID_MM__D_AUTH_REQ__spare_0,
934 /* 916*/ CCD_ID_MM__D_AUTH_REQ__auth_rand,
935 /* 917*/ CCD_ID_MM__U_AUTH_RES__msg_type,
936 /* 918*/ CCD_ID_MM__U_AUTH_RES__auth_sres,
937 /* 919*/ CCD_ID_MM__U_CM_REESTAB_REQ__msg_type,
938 /* 920*/ CCD_ID_MM__U_CM_REESTAB_REQ__ciph_key_num,
939 /* 921*/ CCD_ID_MM__U_CM_REESTAB_REQ__spare_0,
940 /* 922*/ CCD_ID_MM__U_CM_REESTAB_REQ__mob_class_2,
941 /* 923*/ CCD_ID_MM__U_CM_REESTAB_REQ__mob_id,
942 /* 924*/ CCD_ID_MM__U_CM_REESTAB_REQ__loc_area_ident,
943 /* 925*/ CCD_ID_MM__U_CM_SERV_ABORT__msg_type,
944 /* 926*/ CCD_ID_MM__D_CM_SERV_ACCEPT__msg_type,
945 /* 927*/ CCD_ID_MM__D_CM_SERV_REJ__msg_type,
946 /* 928*/ CCD_ID_MM__D_CM_SERV_REJ__rej_cause,
947 /* 929*/ CCD_ID_MM__U_CM_SERV_REQ__msg_type,
948 /* 930*/ CCD_ID_MM__U_CM_SERV_REQ__cm_serv_type,
949 /* 931*/ CCD_ID_MM__U_CM_SERV_REQ__ciph_key_num,
950 /* 932*/ CCD_ID_MM__U_CM_SERV_REQ__mob_class_2,
951 /* 933*/ CCD_ID_MM__U_CM_SERV_REQ__mob_id,
952 /* 934*/ CCD_ID_MM__D_IDENT_REQ__msg_type,
953 /* 935*/ CCD_ID_MM__D_IDENT_REQ__ident,
954 /* 936*/ CCD_ID_MM__D_IDENT_REQ__spare_0,
955 /* 937*/ CCD_ID_MM__U_IDENT_RES__msg_type,
956 /* 938*/ CCD_ID_MM__U_IDENT_RES__mob_id,
957 /* 939*/ CCD_ID_MM__U_IMSI_DETACH_IND__msg_type,
958 /* 940*/ CCD_ID_MM__U_IMSI_DETACH_IND__mob_class_1,
959 /* 941*/ CCD_ID_MM__U_IMSI_DETACH_IND__mob_id,
960 /* 942*/ CCD_ID_MM__D_LOC_UPD_ACCEPT__msg_type,
961 /* 943*/ CCD_ID_MM__D_LOC_UPD_ACCEPT__loc_area_ident,
962 /* 944*/ CCD_ID_MM__D_LOC_UPD_ACCEPT__mob_id,
963 /* 945*/ CCD_ID_MM__D_LOC_UPD_ACCEPT__follow_proceed,
964 /* 946*/ CCD_ID_MM__D_LOC_UPD_ACCEPT__eqv_plmn_list,
965 /* 947*/ CCD_ID_MM__D_LOC_UPD_REJ__msg_type,
966 /* 948*/ CCD_ID_MM__D_LOC_UPD_REJ__rej_cause,
967 /* 949*/ CCD_ID_MM__U_LOC_UPD_REQ__msg_type,
968 /* 950*/ CCD_ID_MM__U_LOC_UPD_REQ__loc_upd_type,
969 /* 951*/ CCD_ID_MM__U_LOC_UPD_REQ__ciph_key_num,
970 /* 952*/ CCD_ID_MM__U_LOC_UPD_REQ__loc_area_ident,
971 /* 953*/ CCD_ID_MM__U_LOC_UPD_REQ__mob_class_1,
972 /* 954*/ CCD_ID_MM__U_LOC_UPD_REQ__mob_id,
973 /* 955*/ CCD_ID_MM__B_MM_STATUS__msg_type,
974 /* 956*/ CCD_ID_MM__B_MM_STATUS__rej_cause,
975 /* 957*/ CCD_ID_MM__D_TMSI_REALLOC_CMD__msg_type,
976 /* 958*/ CCD_ID_MM__D_TMSI_REALLOC_CMD__loc_area_ident,
977 /* 959*/ CCD_ID_MM__D_TMSI_REALLOC_CMD__mob_id,
978 /* 960*/ CCD_ID_MM__U_TMSI_REALLOC_COMP__msg_type,
979 /* 961*/ CCD_ID_MM__D_CM_SERVICE_PROMPT__msg_type,
980 /* 962*/ CCD_ID_MM__D_CM_SERVICE_PROMPT__pd_and_sapi,
981 /* 963*/ CCD_ID_MM__D_MM_INFORMATION__msg_type,
982 /* 964*/ CCD_ID_MM__D_MM_INFORMATION__full_net_name,
983 /* 965*/ CCD_ID_MM__D_MM_INFORMATION__short_net_name,
984 /* 966*/ CCD_ID_MM__D_MM_INFORMATION__net_tz,
985 /* 967*/ CCD_ID_MM__D_MM_INFORMATION__net_tz_and_time,
986 /* 968*/ CCD_ID_CC__aux_states__spare_0,
987 /* 969*/ CCD_ID_CC__aux_states__hold,
988 /* 970*/ CCD_ID_CC__aux_states__mpty,
989 /* 971*/ CCD_ID_CC__bearer_cap__rad_chan_req,
990 /* 972*/ CCD_ID_CC__bearer_cap__code,
991 /* 973*/ CCD_ID_CC__bearer_cap__trans_mode,
992 /* 974*/ CCD_ID_CC__bearer_cap__trans_cap,
993 /* 975*/ CCD_ID_CC__bearer_cap__coding_bc3x1,
994 /* 976*/ CCD_ID_CC__bearer_cap__ctm,
995 /* 977*/ CCD_ID_CC__bearer_cap__spare_0,
996 /* 978*/ CCD_ID_CC__bearer_cap__speech_vers1,
997 /* 979*/ CCD_ID_CC__bearer_cap__coding_bc3x2,
998 /* 980*/ CCD_ID_CC__bearer_cap__spare_1,
999 /* 981*/ CCD_ID_CC__bearer_cap__speech_vers2,
1000 /* 982*/ CCD_ID_CC__bearer_cap__coding_bc3x3,
1001 /* 983*/ CCD_ID_CC__bearer_cap__spare_2,
1002 /* 984*/ CCD_ID_CC__bearer_cap__speech_vers3,
1003 /* 985*/ CCD_ID_CC__bearer_cap__coding_bc3x4,
1004 /* 986*/ CCD_ID_CC__bearer_cap__spare_3,
1005 /* 987*/ CCD_ID_CC__bearer_cap__speech_vers4,
1006 /* 988*/ CCD_ID_CC__bearer_cap__coding_bc3x5,
1007 /* 989*/ CCD_ID_CC__bearer_cap__spare_4,
1008 /* 990*/ CCD_ID_CC__bearer_cap__speech_vers5,
1009 /* 991*/ CCD_ID_CC__bearer_cap__compress,
1010 /* 992*/ CCD_ID_CC__bearer_cap__structure,
1011 /* 993*/ CCD_ID_CC__bearer_cap__duplex,
1012 /* 994*/ CCD_ID_CC__bearer_cap__config,
1013 /* 995*/ CCD_ID_CC__bearer_cap__nirr,
1014 /* 996*/ CCD_ID_CC__bearer_cap__establish,
1015 /* 997*/ CCD_ID_CC__bearer_cap__access_ident,
1016 /* 998*/ CCD_ID_CC__bearer_cap__rate_adapt,
1017 /* 999*/ CCD_ID_CC__bearer_cap__sig_access_prot,
1018 /* 1000*/ CCD_ID_CC__bearer_cap__l1_ident,
1019 /* 1001*/ CCD_ID_CC__bearer_cap__user_inf_l1_prot,
1020 /* 1002*/ CCD_ID_CC__bearer_cap__sync_async,
1021 /* 1003*/ CCD_ID_CC__bearer_cap__num_stop,
1022 /* 1004*/ CCD_ID_CC__bearer_cap__negotiate,
1023 /* 1005*/ CCD_ID_CC__bearer_cap__num_data,
1024 /* 1006*/ CCD_ID_CC__bearer_cap__user_rate,
1025 /* 1007*/ CCD_ID_CC__bearer_cap__intermed_rate,
1026 /* 1008*/ CCD_ID_CC__bearer_cap__nic_tx,
1027 /* 1009*/ CCD_ID_CC__bearer_cap__nic_rx,
1028 /* 1010*/ CCD_ID_CC__bearer_cap__parity,
1029 /* 1011*/ CCD_ID_CC__bearer_cap__conn_elem,
1030 /* 1012*/ CCD_ID_CC__bearer_cap__modem_type,
1031 /* 1013*/ CCD_ID_CC__bearer_cap__modem_type_2,
1032 /* 1014*/ CCD_ID_CC__bearer_cap__fnur,
1033 /* 1015*/ CCD_ID_CC__bearer_cap__acc,
1034 /* 1016*/ CCD_ID_CC__bearer_cap__mTch,
1035 /* 1017*/ CCD_ID_CC__bearer_cap__uimi,
1036 /* 1018*/ CCD_ID_CC__bearer_cap__waiur,
1037 /* 1019*/ CCD_ID_CC__bearer_cap__l2_ident,
1038 /* 1020*/ CCD_ID_CC__bearer_cap__user_inf_l2_prot,
1039 /* 1021*/ CCD_ID_CC__call_ctrl_cap__spare_0,
1040 /* 1022*/ CCD_ID_CC__call_ctrl_cap__pcp,
1041 /* 1023*/ CCD_ID_CC__call_ctrl_cap__dtmf,
1042 /* 1024*/ CCD_ID_CC__call_state__cs,
1043 /* 1025*/ CCD_ID_CC__call_state__state,
1044 /* 1026*/ CCD_ID_CC__dl_called_num__ton,
1045 /* 1027*/ CCD_ID_CC__dl_called_num__npi,
1046 /* 1028*/ CCD_ID_CC__dl_called_num__num,
1047 /* 1029*/ CCD_ID_CC__ul_called_num__ton,
1048 /* 1030*/ CCD_ID_CC__ul_called_num__npi,
1049 /* 1031*/ CCD_ID_CC__ul_called_num__num,
1050 /* 1032*/ CCD_ID_CC__called_subaddr__tos,
1051 /* 1033*/ CCD_ID_CC__called_subaddr__odd_even,
1052 /* 1034*/ CCD_ID_CC__called_subaddr__spare_0,
1053 /* 1035*/ CCD_ID_CC__called_subaddr__subaddr,
1054 /* 1036*/ CCD_ID_CC__calling_num__ton,
1055 /* 1037*/ CCD_ID_CC__calling_num__npi,
1056 /* 1038*/ CCD_ID_CC__calling_num__present,
1057 /* 1039*/ CCD_ID_CC__calling_num__spare_0,
1058 /* 1040*/ CCD_ID_CC__calling_num__screen,
1059 /* 1041*/ CCD_ID_CC__calling_num__num,
1060 /* 1042*/ CCD_ID_CC__calling_subaddr__tos,
1061 /* 1043*/ CCD_ID_CC__calling_subaddr__odd_even,
1062 /* 1044*/ CCD_ID_CC__calling_subaddr__spare_0,
1063 /* 1045*/ CCD_ID_CC__calling_subaddr__subaddr,
1064 /* 1046*/ CCD_ID_CC__cc_cause__cs,
1065 /* 1047*/ CCD_ID_CC__cc_cause__spare_0,
1066 /* 1048*/ CCD_ID_CC__cc_cause__loc,
1067 /* 1049*/ CCD_ID_CC__cc_cause__rec,
1068 /* 1050*/ CCD_ID_CC__cc_cause__cause,
1069 /* 1051*/ CCD_ID_CC__cc_cause__diag,
1070 /* 1052*/ CCD_ID_CC__connect_num__ton,
1071 /* 1053*/ CCD_ID_CC__connect_num__npi,
1072 /* 1054*/ CCD_ID_CC__connect_num__present,
1073 /* 1055*/ CCD_ID_CC__connect_num__spare_0,
1074 /* 1056*/ CCD_ID_CC__connect_num__screen,
1075 /* 1057*/ CCD_ID_CC__connect_num__num,
1076 /* 1058*/ CCD_ID_CC__connect_subaddr__tos,
1077 /* 1059*/ CCD_ID_CC__connect_subaddr__odd_even,
1078 /* 1060*/ CCD_ID_CC__connect_subaddr__spare_0,
1079 /* 1061*/ CCD_ID_CC__connect_subaddr__subaddr,
1080 /* 1062*/ CCD_ID_CC__facility__fac,
1081 /* 1063*/ CCD_ID_CC__high_layer_comp__cs,
1082 /* 1064*/ CCD_ID_CC__high_layer_comp__interpret,
1083 /* 1065*/ CCD_ID_CC__high_layer_comp__prot_prof,
1084 /* 1066*/ CCD_ID_CC__high_layer_comp__hlci,
1085 /* 1067*/ CCD_ID_CC__high_layer_comp__ext_hlci,
1086 /* 1068*/ CCD_ID_CC__key_facility__spare_0,
1087 /* 1069*/ CCD_ID_CC__key_facility__key,
1088 /* 1070*/ CCD_ID_CC__low_layer_comp__llc,
1089 /* 1071*/ CCD_ID_CC__notific__nd,
1090 /* 1072*/ CCD_ID_CC__progress__cs,
1091 /* 1073*/ CCD_ID_CC__progress__spare_0,
1092 /* 1074*/ CCD_ID_CC__progress__loc,
1093 /* 1075*/ CCD_ID_CC__progress__progress_desc,
1094 /* 1076*/ CCD_ID_CC__ss_version__ver,
1095 /* 1077*/ CCD_ID_CC__user_user__pd,
1096 /* 1078*/ CCD_ID_CC__user_user__info,
1097 /* 1079*/ CCD_ID_CC__allowed_actions__ccbs_act,
1098 /* 1080*/ CCD_ID_CC__allowed_actions__spare_0,
1099 /* 1081*/ CCD_ID_CC__recall_type__spare_0,
1100 /* 1082*/ CCD_ID_CC__recall_type__rcl_type,
1101 /* 1083*/ CCD_ID_CC__setup_cont__setup_msg,
1102 /* 1084*/ CCD_ID_CC__redirecting_num__ton,
1103 /* 1085*/ CCD_ID_CC__redirecting_num__npi,
1104 /* 1086*/ CCD_ID_CC__redirecting_num__present,
1105 /* 1087*/ CCD_ID_CC__redirecting_num__spare_0,
1106 /* 1088*/ CCD_ID_CC__redirecting_num__screen,
1107 /* 1089*/ CCD_ID_CC__redirecting_num__num,
1108 /* 1090*/ CCD_ID_CC__redirecting_subaddr__tos,
1109 /* 1091*/ CCD_ID_CC__redirecting_subaddr__odd_even,
1110 /* 1092*/ CCD_ID_CC__redirecting_subaddr__spare_0,
1111 /* 1093*/ CCD_ID_CC__redirecting_subaddr__subaddr,
1112 /* 1094*/ CCD_ID_CC__D_ALERT__msg_type,
1113 /* 1095*/ CCD_ID_CC__D_ALERT__facility,
1114 /* 1096*/ CCD_ID_CC__D_ALERT__progress,
1115 /* 1097*/ CCD_ID_CC__D_ALERT__user_user,
1116 /* 1098*/ CCD_ID_CC__U_ALERT__msg_type,
1117 /* 1099*/ CCD_ID_CC__U_ALERT__facility,
1118 /* 1100*/ CCD_ID_CC__U_ALERT__user_user,
1119 /* 1101*/ CCD_ID_CC__U_ALERT__ss_version,
1120 /* 1102*/ CCD_ID_CC__U_CALL_CONF__msg_type,
1121 /* 1103*/ CCD_ID_CC__U_CALL_CONF__repeat,
1122 /* 1104*/ CCD_ID_CC__U_CALL_CONF__bearer_cap,
1123 /* 1105*/ CCD_ID_CC__U_CALL_CONF__bearer_cap_2,
1124 /* 1106*/ CCD_ID_CC__U_CALL_CONF__cc_cause,
1125 /* 1107*/ CCD_ID_CC__U_CALL_CONF__call_ctrl_cap,
1126 /* 1108*/ CCD_ID_CC__D_CALL_PROCEED__msg_type,
1127 /* 1109*/ CCD_ID_CC__D_CALL_PROCEED__repeat,
1128 /* 1110*/ CCD_ID_CC__D_CALL_PROCEED__bearer_cap,
1129 /* 1111*/ CCD_ID_CC__D_CALL_PROCEED__bearer_cap_2,
1130 /* 1112*/ CCD_ID_CC__D_CALL_PROCEED__facility,
1131 /* 1113*/ CCD_ID_CC__D_CALL_PROCEED__progress,
1132 /* 1114*/ CCD_ID_CC__B_CONGEST_CTRL__msg_type,
1133 /* 1115*/ CCD_ID_CC__B_CONGEST_CTRL__congest_lev,
1134 /* 1116*/ CCD_ID_CC__B_CONGEST_CTRL__spare_0,
1135 /* 1117*/ CCD_ID_CC__B_CONGEST_CTRL__cc_cause,
1136 /* 1118*/ CCD_ID_CC__D_CONNECT__msg_type,
1137 /* 1119*/ CCD_ID_CC__D_CONNECT__facility,
1138 /* 1120*/ CCD_ID_CC__D_CONNECT__progress,
1139 /* 1121*/ CCD_ID_CC__D_CONNECT__connect_num,
1140 /* 1122*/ CCD_ID_CC__D_CONNECT__connect_subaddr,
1141 /* 1123*/ CCD_ID_CC__D_CONNECT__user_user,
1142 /* 1124*/ CCD_ID_CC__U_CONNECT__msg_type,
1143 /* 1125*/ CCD_ID_CC__U_CONNECT__facility,
1144 /* 1126*/ CCD_ID_CC__U_CONNECT__connect_subaddr,
1145 /* 1127*/ CCD_ID_CC__U_CONNECT__user_user,
1146 /* 1128*/ CCD_ID_CC__U_CONNECT__ss_version,
1147 /* 1129*/ CCD_ID_CC__B_CONNECT_ACK__msg_type,
1148 /* 1130*/ CCD_ID_CC__D_DISCONNECT__msg_type,
1149 /* 1131*/ CCD_ID_CC__D_DISCONNECT__cc_cause,
1150 /* 1132*/ CCD_ID_CC__D_DISCONNECT__facility,
1151 /* 1133*/ CCD_ID_CC__D_DISCONNECT__progress,
1152 /* 1134*/ CCD_ID_CC__D_DISCONNECT__user_user,
1153 /* 1135*/ CCD_ID_CC__D_DISCONNECT__allowed_actions,
1154 /* 1136*/ CCD_ID_CC__U_DISCONNECT__msg_type,
1155 /* 1137*/ CCD_ID_CC__U_DISCONNECT__cc_cause,
1156 /* 1138*/ CCD_ID_CC__U_DISCONNECT__facility,
1157 /* 1139*/ CCD_ID_CC__U_DISCONNECT__user_user,
1158 /* 1140*/ CCD_ID_CC__U_DISCONNECT__ss_version,
1159 /* 1141*/ CCD_ID_CC__U_EMERGE_SETUP__msg_type,
1160 /* 1142*/ CCD_ID_CC__U_EMERGE_SETUP__bearer_cap,
1161 /* 1143*/ CCD_ID_CC__D_FACILITY__msg_type,
1162 /* 1144*/ CCD_ID_CC__D_FACILITY__facility,
1163 /* 1145*/ CCD_ID_CC__U_FACILITY__msg_type,
1164 /* 1146*/ CCD_ID_CC__U_FACILITY__facility,
1165 /* 1147*/ CCD_ID_CC__U_FACILITY__ss_version,
1166 /* 1148*/ CCD_ID_CC__U_HOLD__msg_type,
1167 /* 1149*/ CCD_ID_CC__D_HOLD_ACK__msg_type,
1168 /* 1150*/ CCD_ID_CC__D_HOLD_REJ__msg_type,
1169 /* 1151*/ CCD_ID_CC__D_HOLD_REJ__cc_cause,
1170 /* 1152*/ CCD_ID_CC__B_MODIFY__msg_type,
1171 /* 1153*/ CCD_ID_CC__B_MODIFY__bearer_cap,
1172 /* 1154*/ CCD_ID_CC__B_MODIFY__low_layer_comp,
1173 /* 1155*/ CCD_ID_CC__B_MODIFY__high_layer_comp,
1174 /* 1156*/ CCD_ID_CC__B_MODIFY__reverse_call,
1175 /* 1157*/ CCD_ID_CC__B_MODIFY_COMP__msg_type,
1176 /* 1158*/ CCD_ID_CC__B_MODIFY_COMP__bearer_cap,
1177 /* 1159*/ CCD_ID_CC__B_MODIFY_COMP__low_layer_comp,
1178 /* 1160*/ CCD_ID_CC__B_MODIFY_COMP__high_layer_comp,
1179 /* 1161*/ CCD_ID_CC__B_MODIFY_COMP__reverse_call,
1180 /* 1162*/ CCD_ID_CC__B_MODIFY_REJ__msg_type,
1181 /* 1163*/ CCD_ID_CC__B_MODIFY_REJ__bearer_cap,
1182 /* 1164*/ CCD_ID_CC__B_MODIFY_REJ__cc_cause,
1183 /* 1165*/ CCD_ID_CC__B_MODIFY_REJ__low_layer_comp,
1184 /* 1166*/ CCD_ID_CC__B_MODIFY_REJ__high_layer_comp,
1185 /* 1167*/ CCD_ID_CC__B_NOTIFY__msg_type,
1186 /* 1168*/ CCD_ID_CC__B_NOTIFY__notific,
1187 /* 1169*/ CCD_ID_CC__D_PROGRESS__msg_type,
1188 /* 1170*/ CCD_ID_CC__D_PROGRESS__progress,
1189 /* 1171*/ CCD_ID_CC__D_PROGRESS__user_user,
1190 /* 1172*/ CCD_ID_CC__D_RELEASE__msg_type,
1191 /* 1173*/ CCD_ID_CC__D_RELEASE__cc_cause,
1192 /* 1174*/ CCD_ID_CC__D_RELEASE__cc_cause_2,
1193 /* 1175*/ CCD_ID_CC__D_RELEASE__facility,
1194 /* 1176*/ CCD_ID_CC__D_RELEASE__user_user,
1195 /* 1177*/ CCD_ID_CC__U_RELEASE__msg_type,
1196 /* 1178*/ CCD_ID_CC__U_RELEASE__cc_cause,
1197 /* 1179*/ CCD_ID_CC__U_RELEASE__cc_cause_2,
1198 /* 1180*/ CCD_ID_CC__U_RELEASE__facility,
1199 /* 1181*/ CCD_ID_CC__U_RELEASE__user_user,
1200 /* 1182*/ CCD_ID_CC__U_RELEASE__ss_version,
1201 /* 1183*/ CCD_ID_CC__D_RELEASE_COMP__msg_type,
1202 /* 1184*/ CCD_ID_CC__D_RELEASE_COMP__cc_cause,
1203 /* 1185*/ CCD_ID_CC__D_RELEASE_COMP__facility,
1204 /* 1186*/ CCD_ID_CC__D_RELEASE_COMP__user_user,
1205 /* 1187*/ CCD_ID_CC__U_RELEASE_COMP__msg_type,
1206 /* 1188*/ CCD_ID_CC__U_RELEASE_COMP__cc_cause,
1207 /* 1189*/ CCD_ID_CC__U_RELEASE_COMP__facility,
1208 /* 1190*/ CCD_ID_CC__U_RELEASE_COMP__user_user,
1209 /* 1191*/ CCD_ID_CC__U_RELEASE_COMP__ss_version,
1210 /* 1192*/ CCD_ID_CC__U_RETRIEVE__msg_type,
1211 /* 1193*/ CCD_ID_CC__D_RETRIEVE_ACK__msg_type,
1212 /* 1194*/ CCD_ID_CC__D_RETRIEVE_REJ__msg_type,
1213 /* 1195*/ CCD_ID_CC__D_RETRIEVE_REJ__cc_cause,
1214 /* 1196*/ CCD_ID_CC__D_SETUP__msg_type,
1215 /* 1197*/ CCD_ID_CC__D_SETUP__repeat,
1216 /* 1198*/ CCD_ID_CC__D_SETUP__bearer_cap,
1217 /* 1199*/ CCD_ID_CC__D_SETUP__bearer_cap_2,
1218 /* 1200*/ CCD_ID_CC__D_SETUP__facility,
1219 /* 1201*/ CCD_ID_CC__D_SETUP__progress,
1220 /* 1202*/ CCD_ID_CC__D_SETUP__signal,
1221 /* 1203*/ CCD_ID_CC__D_SETUP__calling_num,
1222 /* 1204*/ CCD_ID_CC__D_SETUP__calling_subaddr,
1223 /* 1205*/ CCD_ID_CC__D_SETUP__dl_called_num,
1224 /* 1206*/ CCD_ID_CC__D_SETUP__called_subaddr,
1225 /* 1207*/ CCD_ID_CC__D_SETUP__redirecting_num,
1226 /* 1208*/ CCD_ID_CC__D_SETUP__redirecting_subaddr,
1227 /* 1209*/ CCD_ID_CC__D_SETUP__repeat_2,
1228 /* 1210*/ CCD_ID_CC__D_SETUP__low_layer_comp,
1229 /* 1211*/ CCD_ID_CC__D_SETUP__low_layer_comp_2,
1230 /* 1212*/ CCD_ID_CC__D_SETUP__repeat_3,
1231 /* 1213*/ CCD_ID_CC__D_SETUP__high_layer_comp,
1232 /* 1214*/ CCD_ID_CC__D_SETUP__high_layer_comp_2,
1233 /* 1215*/ CCD_ID_CC__D_SETUP__user_user,
1234 /* 1216*/ CCD_ID_CC__U_SETUP__msg_type,
1235 /* 1217*/ CCD_ID_CC__U_SETUP__repeat,
1236 /* 1218*/ CCD_ID_CC__U_SETUP__bearer_cap,
1237 /* 1219*/ CCD_ID_CC__U_SETUP__bearer_cap_2,
1238 /* 1220*/ CCD_ID_CC__U_SETUP__facility,
1239 /* 1221*/ CCD_ID_CC__U_SETUP__calling_subaddr,
1240 /* 1222*/ CCD_ID_CC__U_SETUP__ul_called_num,
1241 /* 1223*/ CCD_ID_CC__U_SETUP__called_subaddr,
1242 /* 1224*/ CCD_ID_CC__U_SETUP__repeat_2,
1243 /* 1225*/ CCD_ID_CC__U_SETUP__low_layer_comp,
1244 /* 1226*/ CCD_ID_CC__U_SETUP__low_layer_comp_2,
1245 /* 1227*/ CCD_ID_CC__U_SETUP__repeat_3,
1246 /* 1228*/ CCD_ID_CC__U_SETUP__high_layer_comp,
1247 /* 1229*/ CCD_ID_CC__U_SETUP__high_layer_comp_2,
1248 /* 1230*/ CCD_ID_CC__U_SETUP__user_user,
1249 /* 1231*/ CCD_ID_CC__U_SETUP__ss_version,
1250 /* 1232*/ CCD_ID_CC__U_SETUP__clir_suppr,
1251 /* 1233*/ CCD_ID_CC__U_SETUP__clir_invoc,
1252 /* 1234*/ CCD_ID_CC__U_SETUP__call_ctrl_cap,
1253 /* 1235*/ CCD_ID_CC__U_SETUP__fac_adv,
1254 /* 1236*/ CCD_ID_CC__U_START_DTMF__msg_type,
1255 /* 1237*/ CCD_ID_CC__U_START_DTMF__key_facility,
1256 /* 1238*/ CCD_ID_CC__D_START_DTMF_ACK__msg_type,
1257 /* 1239*/ CCD_ID_CC__D_START_DTMF_ACK__key_facility,
1258 /* 1240*/ CCD_ID_CC__D_START_DTMF_REJ__msg_type,
1259 /* 1241*/ CCD_ID_CC__D_START_DTMF_REJ__cc_cause,
1260 /* 1242*/ CCD_ID_CC__B_STATUS__msg_type,
1261 /* 1243*/ CCD_ID_CC__B_STATUS__cc_cause,
1262 /* 1244*/ CCD_ID_CC__B_STATUS__call_state,
1263 /* 1245*/ CCD_ID_CC__B_STATUS__aux_states,
1264 /* 1246*/ CCD_ID_CC__B_STATUS_ENQ__msg_type,
1265 /* 1247*/ CCD_ID_CC__U_STOP_DTMF__msg_type,
1266 /* 1248*/ CCD_ID_CC__D_STOP_DTMF_ACK__msg_type,
1267 /* 1249*/ CCD_ID_CC__B_USER_INFO__msg_type,
1268 /* 1250*/ CCD_ID_CC__B_USER_INFO__user_user,
1269 /* 1251*/ CCD_ID_CC__B_USER_INFO__more_data,
1270 /* 1252*/ CCD_ID_CC__U_START_CC__msg_type,
1271 /* 1253*/ CCD_ID_CC__U_START_CC__call_ctrl_cap,
1272 /* 1254*/ CCD_ID_CC__D_RECALL__msg_type,
1273 /* 1255*/ CCD_ID_CC__D_RECALL__recall_type,
1274 /* 1256*/ CCD_ID_CC__D_RECALL__facility,
1275 /* 1257*/ CCD_ID_CC__U_CC_EST_CONF__msg_type,
1276 /* 1258*/ CCD_ID_CC__U_CC_EST_CONF__repeat,
1277 /* 1259*/ CCD_ID_CC__U_CC_EST_CONF__bearer_cap,
1278 /* 1260*/ CCD_ID_CC__U_CC_EST_CONF__bearer_cap_2,
1279 /* 1261*/ CCD_ID_CC__U_CC_EST_CONF__cc_cause,
1280 /* 1262*/ CCD_ID_CC__D_CC_ESTABLISHMENT__msg_type,
1281 /* 1263*/ CCD_ID_CC__D_CC_ESTABLISHMENT__setup_cont,
1282 /* 1264*/ CCD_ID_SS__ss_facility__fac_info,
1283 /* 1265*/ CCD_ID_SS__ss_version__ver,
1284 /* 1266*/ CCD_ID_SS__ss_cause__cs2,
1285 /* 1267*/ CCD_ID_SS__ss_cause__spare_0,
1286 /* 1268*/ CCD_ID_SS__ss_cause__loc,
1287 /* 1269*/ CCD_ID_SS__ss_cause__rec,
1288 /* 1270*/ CCD_ID_SS__ss_cause__cs,
1289 /* 1271*/ CCD_ID_SS__ss_cause__diag,
1290 /* 1272*/ CCD_ID_SS__D_SS_FACILITY__msg_type,
1291 /* 1273*/ CCD_ID_SS__D_SS_FACILITY__ss_facility,
1292 /* 1274*/ CCD_ID_SS__U_SS_FACILITY__msg_type,
1293 /* 1275*/ CCD_ID_SS__U_SS_FACILITY__ss_facility,
1294 /* 1276*/ CCD_ID_SS__D_SS_REGISTER__msg_type,
1295 /* 1277*/ CCD_ID_SS__D_SS_REGISTER__ss_facility,
1296 /* 1278*/ CCD_ID_SS__U_SS_REGISTER__msg_type,
1297 /* 1279*/ CCD_ID_SS__U_SS_REGISTER__ss_facility,
1298 /* 1280*/ CCD_ID_SS__U_SS_REGISTER__ss_version,
1299 /* 1281*/ CCD_ID_SS__B_SS_REL_COMP__msg_type,
1300 /* 1282*/ CCD_ID_SS__B_SS_REL_COMP__ss_cause,
1301 /* 1283*/ CCD_ID_SS__B_SS_REL_COMP__ss_facility,
1302 /* 1284*/ CCD_ID_SMS__rp_cause__rp_cause_value,
1303 /* 1285*/ CCD_ID_SMS__rp_cause__diag,
1304 /* 1286*/ CCD_ID_SMS__rp_addr__ton,
1305 /* 1287*/ CCD_ID_SMS__rp_addr__npi,
1306 /* 1288*/ CCD_ID_SMS__rp_addr__num,
1307 /* 1289*/ CCD_ID_SMS__rp_user_data__tp_mti,
1308 /* 1290*/ CCD_ID_SMS__rp_user_data__tpdu,
1309 /* 1291*/ CCD_ID_SMS__rp_ack__rp_user_data,
1310 /* 1292*/ CCD_ID_SMS__rp_error__rp_cause,
1311 /* 1293*/ CCD_ID_SMS__rp_error__rp_user_data,
1312 /* 1294*/ CCD_ID_SMS__rp_data_dl__rp_addr,
1313 /* 1295*/ CCD_ID_SMS__rp_data_dl__spare_0,
1314 /* 1296*/ CCD_ID_SMS__rp_data_dl__rp_user_data,
1315 /* 1297*/ CCD_ID_SMS__cp_user_data_dl__spare_0,
1316 /* 1298*/ CCD_ID_SMS__cp_user_data_dl__rp_mti,
1317 /* 1299*/ CCD_ID_SMS__cp_user_data_dl__reference,
1318 /* 1300*/ CCD_ID_SMS__cp_user_data_dl__rp_data_dl,
1319 /* 1301*/ CCD_ID_SMS__cp_user_data_dl__rp_error,
1320 /* 1302*/ CCD_ID_SMS__cp_user_data_dl__rp_ack,
1321 /* 1303*/ CCD_ID_SMS__rp_data_ul__spare_0,
1322 /* 1304*/ CCD_ID_SMS__rp_data_ul__rp_addr,
1323 /* 1305*/ CCD_ID_SMS__rp_data_ul__rp_user_data,
1324 /* 1306*/ CCD_ID_SMS__cp_user_data_ul__spare_0,
1325 /* 1307*/ CCD_ID_SMS__cp_user_data_ul__rp_mti,
1326 /* 1308*/ CCD_ID_SMS__cp_user_data_ul__reference,
1327 /* 1309*/ CCD_ID_SMS__cp_user_data_ul__rp_data_ul,
1328 /* 1310*/ CCD_ID_SMS__cp_user_data_ul__rp_error,
1329 /* 1311*/ CCD_ID_SMS__cp_user_data_ul__rp_ack,
1330 /* 1312*/ CCD_ID_SMS__tp_cd__data,
1331 /* 1313*/ CCD_ID_SMS__tp_da__digits,
1332 /* 1314*/ CCD_ID_SMS__tp_da__spare_0,
1333 /* 1315*/ CCD_ID_SMS__tp_da__ton,
1334 /* 1316*/ CCD_ID_SMS__tp_da__npi,
1335 /* 1317*/ CCD_ID_SMS__tp_da__num,
1336 /* 1318*/ CCD_ID_SMS__tp_vp_abs__year,
1337 /* 1319*/ CCD_ID_SMS__tp_vp_abs__month,
1338 /* 1320*/ CCD_ID_SMS__tp_vp_abs__day,
1339 /* 1321*/ CCD_ID_SMS__tp_vp_abs__hour,
1340 /* 1322*/ CCD_ID_SMS__tp_vp_abs__minute,
1341 /* 1323*/ CCD_ID_SMS__tp_vp_abs__second,
1342 /* 1324*/ CCD_ID_SMS__tp_vp_abs__tz_lsb,
1343 /* 1325*/ CCD_ID_SMS__tp_vp_abs__tz_sign,
1344 /* 1326*/ CCD_ID_SMS__tp_vp_abs__tz_msb,
1345 /* 1327*/ CCD_ID_SMS__tp_vp_enh__tp_ext,
1346 /* 1328*/ CCD_ID_SMS__tp_vp_enh__tp_ss,
1347 /* 1329*/ CCD_ID_SMS__tp_vp_enh__spare_0,
1348 /* 1330*/ CCD_ID_SMS__tp_vp_enh__tvpf,
1349 /* 1331*/ CCD_ID_SMS__tp_vp_enh__spare_1,
1350 /* 1332*/ CCD_ID_SMS__tp_vp_enh__tp_rsrvd,
1351 /* 1333*/ CCD_ID_SMS__tp_vp_enh__tp_vp_rel,
1352 /* 1334*/ CCD_ID_SMS__tp_vp_enh__tp_vp_sec,
1353 /* 1335*/ CCD_ID_SMS__tp_vp_enh__hour,
1354 /* 1336*/ CCD_ID_SMS__tp_vp_enh__minute,
1355 /* 1337*/ CCD_ID_SMS__tp_vp_enh__second,
1356 /* 1338*/ CCD_ID_SMS__tp_vp_enh__spare_2,
1357 /* 1339*/ CCD_ID_SMS__tp_vp_enh__spare_3,
1358 /* 1340*/ CCD_ID_SMS__tp_vp_enh__spare_4,
1359 /* 1341*/ CCD_ID_SMS__tp_vp_enh__spare_5,
1360 /* 1342*/ CCD_ID_SMS__tp_vp_enh__spare_6,
1361 /* 1343*/ CCD_ID_SMS__tp_ud__length,
1362 /* 1344*/ CCD_ID_SMS__tp_ud__data,
1363 /* 1345*/ CCD_ID_SMS__tp_udh_inc__length,
1364 /* 1346*/ CCD_ID_SMS__tp_udh_inc__tp_udh,
1365 /* 1347*/ CCD_ID_SMS__tp_udh_inc__data,
1366 /* 1348*/ CCD_ID_SMS__tp_cdh_inc__tp_udh,
1367 /* 1349*/ CCD_ID_SMS__tp_cdh_inc__data,
1368 /* 1350*/ CCD_ID_SMS__B_CP_ACK__msg_type,
1369 /* 1351*/ CCD_ID_SMS__D_CP_DATA__msg_type,
1370 /* 1352*/ CCD_ID_SMS__D_CP_DATA__cp_user_data_dl,
1371 /* 1353*/ CCD_ID_SMS__U_CP_DATA__msg_type,
1372 /* 1354*/ CCD_ID_SMS__U_CP_DATA__cp_user_data_ul,
1373 /* 1355*/ CCD_ID_SMS__B_CP_ERROR__msg_type,
1374 /* 1356*/ CCD_ID_SMS__B_CP_ERROR__cp_cause,
1375 /* 1357*/ CCD_ID_SMS__TP_DELIVER__tp_vt_mti,
1376 /* 1358*/ CCD_ID_SMS__TP_DELIVER__tp_rp,
1377 /* 1359*/ CCD_ID_SMS__TP_DELIVER__tp_udhi,
1378 /* 1360*/ CCD_ID_SMS__TP_DELIVER__tp_sri,
1379 /* 1361*/ CCD_ID_SMS__TP_DELIVER__spare_0,
1380 /* 1362*/ CCD_ID_SMS__TP_DELIVER__tp_mms,
1381 /* 1363*/ CCD_ID_SMS__TP_DELIVER__tp_mti,
1382 /* 1364*/ CCD_ID_SMS__TP_DELIVER__tp_oa,
1383 /* 1365*/ CCD_ID_SMS__TP_DELIVER__tp_pid,
1384 /* 1366*/ CCD_ID_SMS__TP_DELIVER__tp_dcs,
1385 /* 1367*/ CCD_ID_SMS__TP_DELIVER__tp_scts,
1386 /* 1368*/ CCD_ID_SMS__TP_DELIVER__tp_ud,
1387 /* 1369*/ CCD_ID_SMS__TP_DELIVER__tp_udh_inc,
1388 /* 1370*/ CCD_ID_SMS__TP_DLVR_REP_ERR__tp_vt_mti,
1389 /* 1371*/ CCD_ID_SMS__TP_DLVR_REP_ERR__spare_0,
1390 /* 1372*/ CCD_ID_SMS__TP_DLVR_REP_ERR__tp_udhi,
1391 /* 1373*/ CCD_ID_SMS__TP_DLVR_REP_ERR__spare_1,
1392 /* 1374*/ CCD_ID_SMS__TP_DLVR_REP_ERR__tp_mti,
1393 /* 1375*/ CCD_ID_SMS__TP_DLVR_REP_ERR__tp_fcs,
1394 /* 1376*/ CCD_ID_SMS__TP_DLVR_REP_ERR__tp_ext,
1395 /* 1377*/ CCD_ID_SMS__TP_DLVR_REP_ERR__spare_2,
1396 /* 1378*/ CCD_ID_SMS__TP_DLVR_REP_ERR__tp_udl_p,
1397 /* 1379*/ CCD_ID_SMS__TP_DLVR_REP_ERR__tp_dcs_p,
1398 /* 1380*/ CCD_ID_SMS__TP_DLVR_REP_ERR__tp_pid_p,
1399 /* 1381*/ CCD_ID_SMS__TP_DLVR_REP_ERR__spare_3,
1400 /* 1382*/ CCD_ID_SMS__TP_DLVR_REP_ERR__tp_rsrvd,
1401 /* 1383*/ CCD_ID_SMS__TP_DLVR_REP_ERR__tp_pid,
1402 /* 1384*/ CCD_ID_SMS__TP_DLVR_REP_ERR__tp_dcs,
1403 /* 1385*/ CCD_ID_SMS__TP_DLVR_REP_ERR__tp_ud,
1404 /* 1386*/ CCD_ID_SMS__TP_DLVR_REP_ERR__tp_udh_inc,
1405 /* 1387*/ CCD_ID_SMS__TP_DLVR_REP_ACK__tp_vt_mti,
1406 /* 1388*/ CCD_ID_SMS__TP_DLVR_REP_ACK__spare_0,
1407 /* 1389*/ CCD_ID_SMS__TP_DLVR_REP_ACK__tp_udhi,
1408 /* 1390*/ CCD_ID_SMS__TP_DLVR_REP_ACK__spare_1,
1409 /* 1391*/ CCD_ID_SMS__TP_DLVR_REP_ACK__tp_mti,
1410 /* 1392*/ CCD_ID_SMS__TP_DLVR_REP_ACK__tp_ext,
1411 /* 1393*/ CCD_ID_SMS__TP_DLVR_REP_ACK__spare_2,
1412 /* 1394*/ CCD_ID_SMS__TP_DLVR_REP_ACK__tp_udl_p,
1413 /* 1395*/ CCD_ID_SMS__TP_DLVR_REP_ACK__tp_dcs_p,
1414 /* 1396*/ CCD_ID_SMS__TP_DLVR_REP_ACK__tp_pid_p,
1415 /* 1397*/ CCD_ID_SMS__TP_DLVR_REP_ACK__spare_3,
1416 /* 1398*/ CCD_ID_SMS__TP_DLVR_REP_ACK__tp_rsrvd,
1417 /* 1399*/ CCD_ID_SMS__TP_DLVR_REP_ACK__tp_pid,
1418 /* 1400*/ CCD_ID_SMS__TP_DLVR_REP_ACK__tp_dcs,
1419 /* 1401*/ CCD_ID_SMS__TP_DLVR_REP_ACK__tp_ud,
1420 /* 1402*/ CCD_ID_SMS__TP_DLVR_REP_ACK__tp_udh_inc,
1421 /* 1403*/ CCD_ID_SMS__TP_SUBMIT__tp_vt_mti,
1422 /* 1404*/ CCD_ID_SMS__TP_SUBMIT__tp_rp,
1423 /* 1405*/ CCD_ID_SMS__TP_SUBMIT__tp_udhi,
1424 /* 1406*/ CCD_ID_SMS__TP_SUBMIT__tp_srr,
1425 /* 1407*/ CCD_ID_SMS__TP_SUBMIT__tp_vpf,
1426 /* 1408*/ CCD_ID_SMS__TP_SUBMIT__tp_rd,
1427 /* 1409*/ CCD_ID_SMS__TP_SUBMIT__tp_mti,
1428 /* 1410*/ CCD_ID_SMS__TP_SUBMIT__tp_mr,
1429 /* 1411*/ CCD_ID_SMS__TP_SUBMIT__tp_da,
1430 /* 1412*/ CCD_ID_SMS__TP_SUBMIT__tp_pid,
1431 /* 1413*/ CCD_ID_SMS__TP_SUBMIT__tp_dcs,
1432 /* 1414*/ CCD_ID_SMS__TP_SUBMIT__tp_vp_enh,
1433 /* 1415*/ CCD_ID_SMS__TP_SUBMIT__tp_vp_rel,
1434 /* 1416*/ CCD_ID_SMS__TP_SUBMIT__tp_vp_abs,
1435 /* 1417*/ CCD_ID_SMS__TP_SUBMIT__tp_ud,
1436 /* 1418*/ CCD_ID_SMS__TP_SUBMIT__tp_udh_inc,
1437 /* 1419*/ CCD_ID_SMS__TP_SBMT_REP_ERR__tp_vt_mti,
1438 /* 1420*/ CCD_ID_SMS__TP_SBMT_REP_ERR__spare_0,
1439 /* 1421*/ CCD_ID_SMS__TP_SBMT_REP_ERR__tp_udhi,
1440 /* 1422*/ CCD_ID_SMS__TP_SBMT_REP_ERR__spare_1,
1441 /* 1423*/ CCD_ID_SMS__TP_SBMT_REP_ERR__tp_mti,
1442 /* 1424*/ CCD_ID_SMS__TP_SBMT_REP_ERR__tp_fcs,
1443 /* 1425*/ CCD_ID_SMS__TP_SBMT_REP_ERR__tp_ext,
1444 /* 1426*/ CCD_ID_SMS__TP_SBMT_REP_ERR__spare_2,
1445 /* 1427*/ CCD_ID_SMS__TP_SBMT_REP_ERR__tp_udl_p,
1446 /* 1428*/ CCD_ID_SMS__TP_SBMT_REP_ERR__tp_dcs_p,
1447 /* 1429*/ CCD_ID_SMS__TP_SBMT_REP_ERR__tp_pid_p,
1448 /* 1430*/ CCD_ID_SMS__TP_SBMT_REP_ERR__spare_3,
1449 /* 1431*/ CCD_ID_SMS__TP_SBMT_REP_ERR__tp_rsrvd,
1450 /* 1432*/ CCD_ID_SMS__TP_SBMT_REP_ERR__tp_scts,
1451 /* 1433*/ CCD_ID_SMS__TP_SBMT_REP_ERR__tp_pid,
1452 /* 1434*/ CCD_ID_SMS__TP_SBMT_REP_ERR__tp_dcs,
1453 /* 1435*/ CCD_ID_SMS__TP_SBMT_REP_ERR__tp_ud,
1454 /* 1436*/ CCD_ID_SMS__TP_SBMT_REP_ERR__tp_udh_inc,
1455 /* 1437*/ CCD_ID_SMS__TP_SBMT_REP_ACK__tp_vt_mti,
1456 /* 1438*/ CCD_ID_SMS__TP_SBMT_REP_ACK__spare_0,
1457 /* 1439*/ CCD_ID_SMS__TP_SBMT_REP_ACK__tp_udhi,
1458 /* 1440*/ CCD_ID_SMS__TP_SBMT_REP_ACK__spare_1,
1459 /* 1441*/ CCD_ID_SMS__TP_SBMT_REP_ACK__tp_mti,
1460 /* 1442*/ CCD_ID_SMS__TP_SBMT_REP_ACK__tp_ext,
1461 /* 1443*/ CCD_ID_SMS__TP_SBMT_REP_ACK__spare_2,
1462 /* 1444*/ CCD_ID_SMS__TP_SBMT_REP_ACK__tp_udl_p,
1463 /* 1445*/ CCD_ID_SMS__TP_SBMT_REP_ACK__tp_dcs_p,
1464 /* 1446*/ CCD_ID_SMS__TP_SBMT_REP_ACK__tp_pid_p,
1465 /* 1447*/ CCD_ID_SMS__TP_SBMT_REP_ACK__spare_3,
1466 /* 1448*/ CCD_ID_SMS__TP_SBMT_REP_ACK__tp_rsrvd,
1467 /* 1449*/ CCD_ID_SMS__TP_SBMT_REP_ACK__tp_scts,
1468 /* 1450*/ CCD_ID_SMS__TP_SBMT_REP_ACK__tp_pid,
1469 /* 1451*/ CCD_ID_SMS__TP_SBMT_REP_ACK__tp_dcs,
1470 /* 1452*/ CCD_ID_SMS__TP_SBMT_REP_ACK__tp_ud,
1471 /* 1453*/ CCD_ID_SMS__TP_SBMT_REP_ACK__tp_udh_inc,
1472 /* 1454*/ CCD_ID_SMS__TP_STATUS__tp_vt_mti,
1473 /* 1455*/ CCD_ID_SMS__TP_STATUS__spare_0,
1474 /* 1456*/ CCD_ID_SMS__TP_STATUS__tp_udhi,
1475 /* 1457*/ CCD_ID_SMS__TP_STATUS__tp_srq,
1476 /* 1458*/ CCD_ID_SMS__TP_STATUS__spare_1,
1477 /* 1459*/ CCD_ID_SMS__TP_STATUS__tp_mms,
1478 /* 1460*/ CCD_ID_SMS__TP_STATUS__tp_mti,
1479 /* 1461*/ CCD_ID_SMS__TP_STATUS__tp_mr,
1480 /* 1462*/ CCD_ID_SMS__TP_STATUS__tp_ra,
1481 /* 1463*/ CCD_ID_SMS__TP_STATUS__tp_scts,
1482 /* 1464*/ CCD_ID_SMS__TP_STATUS__tp_dt,
1483 /* 1465*/ CCD_ID_SMS__TP_STATUS__tp_st,
1484 /* 1466*/ CCD_ID_SMS__TP_STATUS__spare_2,
1485 /* 1467*/ CCD_ID_SMS__TP_STATUS__tp_udl_p,
1486 /* 1468*/ CCD_ID_SMS__TP_STATUS__tp_dcs_p,
1487 /* 1469*/ CCD_ID_SMS__TP_STATUS__tp_pid_p,
1488 /* 1470*/ CCD_ID_SMS__TP_STATUS__tp_rsrvd,
1489 /* 1471*/ CCD_ID_SMS__TP_STATUS__tp_pid,
1490 /* 1472*/ CCD_ID_SMS__TP_STATUS__tp_dcs,
1491 /* 1473*/ CCD_ID_SMS__TP_STATUS__tp_ud,
1492 /* 1474*/ CCD_ID_SMS__TP_STATUS__tp_udh_inc,
1493 /* 1475*/ CCD_ID_SMS__TP_COMMAND__tp_vt_mti,
1494 /* 1476*/ CCD_ID_SMS__TP_COMMAND__spare_0,
1495 /* 1477*/ CCD_ID_SMS__TP_COMMAND__tp_udhi,
1496 /* 1478*/ CCD_ID_SMS__TP_COMMAND__tp_srr,
1497 /* 1479*/ CCD_ID_SMS__TP_COMMAND__spare_1,
1498 /* 1480*/ CCD_ID_SMS__TP_COMMAND__tp_mti,
1499 /* 1481*/ CCD_ID_SMS__TP_COMMAND__tp_mr,
1500 /* 1482*/ CCD_ID_SMS__TP_COMMAND__tp_pid,
1501 /* 1483*/ CCD_ID_SMS__TP_COMMAND__tp_ct,
1502 /* 1484*/ CCD_ID_SMS__TP_COMMAND__tp_mn,
1503 /* 1485*/ CCD_ID_SMS__TP_COMMAND__tp_da,
1504 /* 1486*/ CCD_ID_SMS__TP_COMMAND__tp_cd,
1505 /* 1487*/ CCD_ID_SMS__TP_COMMAND__tp_cdh_inc,
1506 /* 1488*/ CCD_ID_SMS__SIM_PDU__tp_vt_mti,
1507 /* 1489*/ CCD_ID_SMS__SIM_PDU__rp_addr,
1508 /* 1490*/ CCD_ID_SMS__SIM_PDU__tp_mti,
1509 /* 1491*/ CCD_ID_SMS__SIM_PDU__tpdu,
1510 /* 1492*/ CCD_ID_FAC__inv_comp__inv_id,
1511 /* 1493*/ CCD_ID_FAC__inv_comp__lnk_id,
1512 /* 1494*/ CCD_ID_FAC__inv_comp__op_code,
1513 /* 1495*/ CCD_ID_FAC__inv_comp__params,
1514 /* 1496*/ CCD_ID_FAC__err_comp__inv_id,
1515 /* 1497*/ CCD_ID_FAC__err_comp__err_code,
1516 /* 1498*/ CCD_ID_FAC__err_comp__params,
1517 /* 1499*/ CCD_ID_FAC__rej_comp__inv_id,
1518 /* 1500*/ CCD_ID_FAC__rej_comp__gen_problem,
1519 /* 1501*/ CCD_ID_FAC__rej_comp__inv_problem,
1520 /* 1502*/ CCD_ID_FAC__rej_comp__res_problem,
1521 /* 1503*/ CCD_ID_FAC__rej_comp__err_problem,
1522 /* 1504*/ CCD_ID_FAC__sequence__op_code,
1523 /* 1505*/ CCD_ID_FAC__sequence__params,
1524 /* 1506*/ CCD_ID_FAC__res_comp__inv_id,
1525 /* 1507*/ CCD_ID_FAC__res_comp__sequence,
1526 /* 1508*/ CCD_ID_FAC__forwardedToNumber__noa,
1527 /* 1509*/ CCD_ID_FAC__forwardedToNumber__npi,
1528 /* 1510*/ CCD_ID_FAC__forwardedToNumber__bcdDigit,
1529 /* 1511*/ CCD_ID_FAC__forwardedToSubaddress__tos,
1530 /* 1512*/ CCD_ID_FAC__forwardedToSubaddress__oei,
1531 /* 1513*/ CCD_ID_FAC__forwardedToSubaddress__spare_0,
1532 /* 1514*/ CCD_ID_FAC__forwardedToSubaddress__bcdDigit,
1533 /* 1515*/ CCD_ID_FAC__basicService__bearerService,
1534 /* 1516*/ CCD_ID_FAC__basicService__teleservice,
1535 /* 1517*/ CCD_ID_FAC__ssForBS__ssCode,
1536 /* 1518*/ CCD_ID_FAC__ssForBS__basicService,
1537 /* 1519*/ CCD_ID_FAC__registerSSArg__ssCode,
1538 /* 1520*/ CCD_ID_FAC__registerSSArg__basicService,
1539 /* 1521*/ CCD_ID_FAC__registerSSArg__forwardedToNumber,
1540 /* 1522*/ CCD_ID_FAC__registerSSArg__forwardedToSubaddress,
1541 /* 1523*/ CCD_ID_FAC__registerSSArg__noReplyConditionTime,
1542 /* 1524*/ CCD_ID_FAC__registerSSArg__defaultPriority,
1543 /* 1525*/ CCD_ID_FAC__cbf__basicService,
1544 /* 1526*/ CCD_ID_FAC__cbf__ssStatus,
1545 /* 1527*/ CCD_ID_FAC__callBarringFeatureList__cbf,
1546 /* 1528*/ CCD_ID_FAC__callBarringInfo__ssCode,
1547 /* 1529*/ CCD_ID_FAC__callBarringInfo__callBarringFeatureList,
1548 /* 1530*/ CCD_ID_FAC__cugf__basicService,
1549 /* 1531*/ CCD_ID_FAC__cugf__preferentialCugIndicator,
1550 /* 1532*/ CCD_ID_FAC__cugf__interCugRestrictions,
1551 /* 1533*/ CCD_ID_FAC__cugFeatureList__cugf,
1552 /* 1534*/ CCD_ID_FAC__forwardingOptions__notify_fwd_pty,
1553 /* 1535*/ CCD_ID_FAC__forwardingOptions__notify_clg_pty,
1554 /* 1536*/ CCD_ID_FAC__forwardingOptions__fwd_reason,
1555 /* 1537*/ CCD_ID_FAC__forwardingOptions__spare_0,
1556 /* 1538*/ CCD_ID_FAC__ff__basicService,
1557 /* 1539*/ CCD_ID_FAC__ff__ssStatus,
1558 /* 1540*/ CCD_ID_FAC__ff__forwardedToNumber,
1559 /* 1541*/ CCD_ID_FAC__ff__forwardedToSubaddress,
1560 /* 1542*/ CCD_ID_FAC__ff__forwardingOptions,
1561 /* 1543*/ CCD_ID_FAC__ff__noReplyConditionTime,
1562 /* 1544*/ CCD_ID_FAC__forwardingFeatureList__ff,
1563 /* 1545*/ CCD_ID_FAC__forwardingInfo__ssCode,
1564 /* 1546*/ CCD_ID_FAC__forwardingInfo__forwardingFeatureList,
1565 /* 1547*/ CCD_ID_FAC__ssSubscriptionOption__cliRestrictionOption,
1566 /* 1548*/ CCD_ID_FAC__ssSubscriptionOption__overrideCategory,
1567 /* 1549*/ CCD_ID_FAC__ssNotification__spare_0,
1568 /* 1550*/ CCD_ID_FAC__ssNotification__clgSubscriber,
1569 /* 1551*/ CCD_ID_FAC__ssNotification__fwgSubscriber,
1570 /* 1552*/ CCD_ID_FAC__ssNotification__fwdSubscriber,
1571 /* 1553*/ CCD_ID_FAC__ssIncompatibilityCause__ssCode,
1572 /* 1554*/ CCD_ID_FAC__ssIncompatibilityCause__basicService,
1573 /* 1555*/ CCD_ID_FAC__ssIncompatibilityCause__ssStatus,
1574 /* 1556*/ CCD_ID_FAC__presentationAllowedAddress__partyNumber,
1575 /* 1557*/ CCD_ID_FAC__presentationAllowedAddress__partySubaddress,
1576 /* 1558*/ CCD_ID_FAC__rdn__presentationAllowedAddress,
1577 /* 1559*/ CCD_ID_FAC__rdn__presentationRestricted,
1578 /* 1560*/ CCD_ID_FAC__rdn__numberNotAvailableDueToInterworking,
1579 /* 1561*/ CCD_ID_FAC__rdn__presentationRestrictedAddress,
1580 /* 1562*/ CCD_ID_FAC__ectIndicator__ectCallState,
1581 /* 1563*/ CCD_ID_FAC__ectIndicator__rdn,
1582 /* 1564*/ CCD_ID_FAC__ussdRes__ussdDataCodingScheme,
1583 /* 1565*/ CCD_ID_FAC__ussdRes__ussdString,
1584 /* 1566*/ CCD_ID_FAC__forwardCUGInfoArg__cugIndex,
1585 /* 1567*/ CCD_ID_FAC__forwardCUGInfoArg__suppressPrefCUG,
1586 /* 1568*/ CCD_ID_FAC__forwardCUGInfoArg__suppressOA,
1587 /* 1569*/ CCD_ID_FAC__basicServiceGroupList__bearerService,
1588 /* 1570*/ CCD_ID_FAC__basicServiceGroupList__teleservice,
1589 /* 1571*/ CCD_ID_FAC__ssData__ssCode,
1590 /* 1572*/ CCD_ID_FAC__ssData__ssStatus,
1591 /* 1573*/ CCD_ID_FAC__ssData__ssSubscriptionOption,
1592 /* 1574*/ CCD_ID_FAC__ssData__basicServiceGroupList,
1593 /* 1575*/ CCD_ID_FAC__ssData__defaultPriority,
1594 /* 1576*/ CCD_ID_FAC__cugs__cugIndex,
1595 /* 1577*/ CCD_ID_FAC__cugs__cugInterlock,
1596 /* 1578*/ CCD_ID_FAC__cugs__intraCugOptions,
1597 /* 1579*/ CCD_ID_FAC__cugs__basicServiceGroupList,
1598 /* 1580*/ CCD_ID_FAC__cugSubscriptionList__cugs,
1599 /* 1581*/ CCD_ID_FAC__cugInfo__cugSubscriptionList,
1600 /* 1582*/ CCD_ID_FAC__cugInfo__cugFeatureList,
1601 /* 1583*/ CCD_ID_FAC__ssInfo__forwardingInfo,
1602 /* 1584*/ CCD_ID_FAC__ssInfo__callBarringInfo,
1603 /* 1585*/ CCD_ID_FAC__ssInfo__cugInfo,
1604 /* 1586*/ CCD_ID_FAC__ssInfo__ssData,
1605 /* 1587*/ CCD_ID_FAC__newPassword__digit,
1606 /* 1588*/ CCD_ID_FAC__e1__e_val,
1607 /* 1589*/ CCD_ID_FAC__chargingInformation__e1,
1608 /* 1590*/ CCD_ID_FAC__chargingInformation__e2,
1609 /* 1591*/ CCD_ID_FAC__chargingInformation__e3,
1610 /* 1592*/ CCD_ID_FAC__chargingInformation__e4,
1611 /* 1593*/ CCD_ID_FAC__chargingInformation__e5,
1612 /* 1594*/ CCD_ID_FAC__chargingInformation__e6,
1613 /* 1595*/ CCD_ID_FAC__chargingInformation__e7,
1614 /* 1596*/ CCD_ID_FAC__forwardChargeAdviceArg__ssCode,
1615 /* 1597*/ CCD_ID_FAC__forwardChargeAdviceArg__chargingInformation,
1616 /* 1598*/ CCD_ID_FAC__rej_comp_sat__inv_id,
1617 /* 1599*/ CCD_ID_FAC__rej_comp_sat__rej_params_sat,
1618 /* 1600*/ CCD_ID_FAC__err_desc_sat__err_params_sat,
1619 /* 1601*/ CCD_ID_FAC__err_comp_sat__inv_id,
1620 /* 1602*/ CCD_ID_FAC__err_comp_sat__err_desc_sat,
1621 /* 1603*/ CCD_ID_FAC__res_desc_sat__res_params_sat,
1622 /* 1604*/ CCD_ID_FAC__seq_sat__res_desc_sat,
1623 /* 1605*/ CCD_ID_FAC__res_comp_sat__inv_id,
1624 /* 1606*/ CCD_ID_FAC__res_comp_sat__seq_sat,
1625 /* 1607*/ CCD_ID_FAC__ccbsf__ccbsIndex,
1626 /* 1608*/ CCD_ID_FAC__ccbsf__b_subscriberNumber,
1627 /* 1609*/ CCD_ID_FAC__ccbsf__b_subscriberSubaddress,
1628 /* 1610*/ CCD_ID_FAC__ccbsf__basicServiceGroup,
1629 /* 1611*/ CCD_ID_FAC__ccbsFeatureList__ccbsf,
1630 /* 1612*/ CCD_ID_FAC__cliRestrictionInfo__ssStatus,
1631 /* 1613*/ CCD_ID_FAC__cliRestrictionInfo__cliRestrictionOption,
1632 /* 1614*/ CCD_ID_FAC__cliRestrictionInfo__maxEntitledPriority,
1633 /* 1615*/ CCD_ID_FAC__cliRestrictionInfo__defaultPriority,
1634 /* 1616*/ CCD_ID_FAC__cliRestrictionInfo__ccbsFeatureList,
1635 /* 1617*/ CCD_ID_FAC__interrogateSSRes__ssStatus,
1636 /* 1618*/ CCD_ID_FAC__interrogateSSRes__forwardedToNumber,
1637 /* 1619*/ CCD_ID_FAC__interrogateSSRes__basicServiceGroupList,
1638 /* 1620*/ CCD_ID_FAC__interrogateSSRes__forwardingFeatureList,
1639 /* 1621*/ CCD_ID_FAC__interrogateSSRes__cliRestrictionInfo,
1640 /* 1622*/ CCD_ID_FAC__namePresentationAllowed__dataCodingScheme,
1641 /* 1623*/ CCD_ID_FAC__namePresentationAllowed__lengthInCharacters,
1642 /* 1624*/ CCD_ID_FAC__namePresentationAllowed__nameString,
1643 /* 1625*/ CCD_ID_FAC__ussdArg__ussdDataCodingScheme,
1644 /* 1626*/ CCD_ID_FAC__ussdArg__ussdString,
1645 /* 1627*/ CCD_ID_FAC__ussdArg__alertingPattern,
1646 /* 1628*/ CCD_ID_FAC__eraseCCEntryArg__ssCode,
1647 /* 1629*/ CCD_ID_FAC__eraseCCEntryArg__ccbsIndex,
1648 /* 1630*/ CCD_ID_FAC__eraseCCEntryRes__ssCode,
1649 /* 1631*/ CCD_ID_FAC__eraseCCEntryRes__ssStatus,
1650 /* 1632*/ CCD_ID_FAC__accRegisterCCEntryRes__ccbsf,
1651 /* 1633*/ CCD_ID_FAC__callDeflectionArg__deflectedToNumber,
1652 /* 1634*/ CCD_ID_FAC__callDeflectionArg__deflectedToSubaddress,
1653 /* 1635*/ CCD_ID_FAC__userUserServiceArg__uusService,
1654 /* 1636*/ CCD_ID_FAC__userUserServiceArg__uusRequired,
1655 /* 1637*/ CCD_ID_FAC__privateExtensionList__extension,
1656 /* 1638*/ CCD_ID_FAC__extensionContainer__privateExtensionList,
1657 /* 1639*/ CCD_ID_FAC__extensionContainer__pcsExtension,
1658 /* 1640*/ CCD_ID_FAC__unknownSubscriberParam__extensionContainer,
1659 /* 1641*/ CCD_ID_FAC__unknownSubscriberParam__unknwnSubscrDiag,
1660 /* 1642*/ CCD_ID_FAC__illegalSubscriberParam__extensionContainer,
1661 /* 1643*/ CCD_ID_FAC__extCallBarredParam__callBarringCause,
1662 /* 1644*/ CCD_ID_FAC__extCallBarredParam__extensionContainer,
1663 /* 1645*/ CCD_ID_FAC__absentSubscriberParam__extensionContainer,
1664 /* 1646*/ CCD_ID_FAC__absentSubscriberParam__absentSubscriberReason,
1665 /* 1647*/ CCD_ID_FAC__extSystemFailureParam__networkResource,
1666 /* 1648*/ CCD_ID_FAC__extSystemFailureParam__extensionContainer,
1667 /* 1649*/ CCD_ID_FAC__callingName__namePresentationAllowed,
1668 /* 1650*/ CCD_ID_FAC__callingName__presentationRestricted,
1669 /* 1651*/ CCD_ID_FAC__callingName__nameUnavailable,
1670 /* 1652*/ CCD_ID_FAC__callingName__namePresentationRestricted,
1671 /* 1653*/ CCD_ID_FAC__nameIndicator__callingName,
1672 /* 1654*/ CCD_ID_FAC__notifySSArg__ssCode,
1673 /* 1655*/ CCD_ID_FAC__notifySSArg__ssStatus,
1674 /* 1656*/ CCD_ID_FAC__notifySSArg__ssNotification,
1675 /* 1657*/ CCD_ID_FAC__notifySSArg__callIsWaitingIndicator,
1676 /* 1658*/ CCD_ID_FAC__notifySSArg__callOnHoldIndicator,
1677 /* 1659*/ CCD_ID_FAC__notifySSArg__mptyIndicator,
1678 /* 1660*/ CCD_ID_FAC__notifySSArg__cugIndex,
1679 /* 1661*/ CCD_ID_FAC__notifySSArg__clirSuppressionRejected,
1680 /* 1662*/ CCD_ID_FAC__notifySSArg__ectIndicator,
1681 /* 1663*/ CCD_ID_FAC__notifySSArg__nameIndicator,
1682 /* 1664*/ CCD_ID_FAC__notifySSArg__ccbsf,
1683 /* 1665*/ CCD_ID_FAC__notifySSArg__alertingPattern,
1684 /* 1666*/ CCD_ID_FAC__COMPONENT__msg_type,
1685 /* 1667*/ CCD_ID_FAC__COMPONENT__inv_comp,
1686 /* 1668*/ CCD_ID_FAC__COMPONENT__res_comp,
1687 /* 1669*/ CCD_ID_FAC__COMPONENT__err_comp,
1688 /* 1670*/ CCD_ID_FAC__COMPONENT__rej_comp,
1689 /* 1671*/ CCD_ID_FAC__REGISTER_SS_INV__msg_type,
1690 /* 1672*/ CCD_ID_FAC__REGISTER_SS_INV__registerSSArg,
1691 /* 1673*/ CCD_ID_FAC__REGISTER_SS_RES__msg_type,
1692 /* 1674*/ CCD_ID_FAC__REGISTER_SS_RES__ssInfo,
1693 /* 1675*/ CCD_ID_FAC__ERASE_SS_INV__msg_type,
1694 /* 1676*/ CCD_ID_FAC__ERASE_SS_INV__ssForBS,
1695 /* 1677*/ CCD_ID_FAC__ERASE_SS_RES__msg_type,
1696 /* 1678*/ CCD_ID_FAC__ERASE_SS_RES__ssInfo,
1697 /* 1679*/ CCD_ID_FAC__ACTIVATE_SS_INV__msg_type,
1698 /* 1680*/ CCD_ID_FAC__ACTIVATE_SS_INV__ssForBS,
1699 /* 1681*/ CCD_ID_FAC__ACTIVATE_SS_RES__msg_type,
1700 /* 1682*/ CCD_ID_FAC__ACTIVATE_SS_RES__ssInfo,
1701 /* 1683*/ CCD_ID_FAC__DEACTIVATE_SS_INV__msg_type,
1702 /* 1684*/ CCD_ID_FAC__DEACTIVATE_SS_INV__ssForBS,
1703 /* 1685*/ CCD_ID_FAC__DEACTIVATE_SS_RES__msg_type,
1704 /* 1686*/ CCD_ID_FAC__DEACTIVATE_SS_RES__ssInfo,
1705 /* 1687*/ CCD_ID_FAC__INTERROGATE_SS_INV__msg_type,
1706 /* 1688*/ CCD_ID_FAC__INTERROGATE_SS_INV__ssForBS,
1707 /* 1689*/ CCD_ID_FAC__INTERROGATE_SS_RES__msg_type,
1708 /* 1690*/ CCD_ID_FAC__INTERROGATE_SS_RES__interrogateSSRes,
1709 /* 1691*/ CCD_ID_FAC__NOTIFY_SS_INV__msg_type,
1710 /* 1692*/ CCD_ID_FAC__NOTIFY_SS_INV__notifySSArg,
1711 /* 1693*/ CCD_ID_FAC__REGISTER_PWD_INV__msg_type,
1712 /* 1694*/ CCD_ID_FAC__REGISTER_PWD_INV__ssCode,
1713 /* 1695*/ CCD_ID_FAC__REGISTER_PWD_RES__msg_type,
1714 /* 1696*/ CCD_ID_FAC__REGISTER_PWD_RES__newPassword,
1715 /* 1697*/ CCD_ID_FAC__GET_PWD_INV__msg_type,
1716 /* 1698*/ CCD_ID_FAC__GET_PWD_INV__guidanceInfo,
1717 /* 1699*/ CCD_ID_FAC__GET_PWD_RES__msg_type,
1718 /* 1700*/ CCD_ID_FAC__GET_PWD_RES__currPassword,
1719 /* 1701*/ CCD_ID_FAC__PROCESS_USSD_INV__msg_type,
1720 /* 1702*/ CCD_ID_FAC__PROCESS_USSD_INV__ssUserData,
1721 /* 1703*/ CCD_ID_FAC__PROCESS_USSD_RES__msg_type,
1722 /* 1704*/ CCD_ID_FAC__PROCESS_USSD_RES__ssUserData,
1723 /* 1705*/ CCD_ID_FAC__PROCESS_USSD_REQ_INV__msg_type,
1724 /* 1706*/ CCD_ID_FAC__PROCESS_USSD_REQ_INV__ussdArg,
1725 /* 1707*/ CCD_ID_FAC__PROCESS_USSD_REQ_RES__msg_type,
1726 /* 1708*/ CCD_ID_FAC__PROCESS_USSD_REQ_RES__ussdRes,
1727 /* 1709*/ CCD_ID_FAC__USSD_REQ_INV__msg_type,
1728 /* 1710*/ CCD_ID_FAC__USSD_REQ_INV__ussdArg,
1729 /* 1711*/ CCD_ID_FAC__USSD_REQ_RES__msg_type,
1730 /* 1712*/ CCD_ID_FAC__USSD_REQ_RES__ussdRes,
1731 /* 1713*/ CCD_ID_FAC__USSD_NOTIFY_INV__msg_type,
1732 /* 1714*/ CCD_ID_FAC__USSD_NOTIFY_INV__ussdArg,
1733 /* 1715*/ CCD_ID_FAC__FWD_CUG_INFO_INV__msg_type,
1734 /* 1716*/ CCD_ID_FAC__FWD_CUG_INFO_INV__forwardCUGInfoArg,
1735 /* 1717*/ CCD_ID_FAC__SPLIT_MPTY_RES__msg_type,
1736 /* 1718*/ CCD_ID_FAC__SPLIT_MPTY_RES__zzzzEmpty,
1737 /* 1719*/ CCD_ID_FAC__RETRIEVE_MPTY_RES__msg_type,
1738 /* 1720*/ CCD_ID_FAC__RETRIEVE_MPTY_RES__zzzzEmpty,
1739 /* 1721*/ CCD_ID_FAC__HOLD_MPTY_RES__msg_type,
1740 /* 1722*/ CCD_ID_FAC__HOLD_MPTY_RES__zzzzEmpty,
1741 /* 1723*/ CCD_ID_FAC__BUILD_MPTY_RES__msg_type,
1742 /* 1724*/ CCD_ID_FAC__BUILD_MPTY_RES__zzzzEmpty,
1743 /* 1725*/ CCD_ID_FAC__FWD_CHG_ADVICE_INV__msg_type,
1744 /* 1726*/ CCD_ID_FAC__FWD_CHG_ADVICE_INV__forwardChargeAdviceArg,
1745 /* 1727*/ CCD_ID_FAC__FWD_CHG_ADVICE_RES__msg_type,
1746 /* 1728*/ CCD_ID_FAC__FWD_CHG_ADVICE_RES__zzzzEmpty,
1747 /* 1729*/ CCD_ID_FAC__COMP_SAT__msg_type,
1748 /* 1730*/ CCD_ID_FAC__COMP_SAT__res_comp_sat,
1749 /* 1731*/ CCD_ID_FAC__COMP_SAT__err_comp_sat,
1750 /* 1732*/ CCD_ID_FAC__COMP_SAT__rej_comp_sat,
1751 /* 1733*/ CCD_ID_FAC__ERASE_CC_ENTRY_INV__msg_type,
1752 /* 1734*/ CCD_ID_FAC__ERASE_CC_ENTRY_INV__eraseCCEntryArg,
1753 /* 1735*/ CCD_ID_FAC__ERASE_CC_ENTRY_RES__msg_type,
1754 /* 1736*/ CCD_ID_FAC__ERASE_CC_ENTRY_RES__eraseCCEntryRes,
1755 /* 1737*/ CCD_ID_FAC__ACC_REGISTER_CC_ENTRY_INV__msg_type,
1756 /* 1738*/ CCD_ID_FAC__ACC_REGISTER_CC_ENTRY_INV__accRegisterCCEntryArg,
1757 /* 1739*/ CCD_ID_FAC__ACC_REGISTER_CC_ENTRY_RES__msg_type,
1758 /* 1740*/ CCD_ID_FAC__ACC_REGISTER_CC_ENTRY_RES__accRegisterCCEntryRes,
1759 /* 1741*/ CCD_ID_FAC__CALL_DEFLECTION_INV__msg_type,
1760 /* 1742*/ CCD_ID_FAC__CALL_DEFLECTION_INV__callDeflectionArg,
1761 /* 1743*/ CCD_ID_FAC__USER_USER_SRV_INV__msg_type,
1762 /* 1744*/ CCD_ID_FAC__USER_USER_SRV_INV__userUserServiceArg,
1763 /* 1745*/ CCD_ID_FAC__UNKNOWN_SUBSCRIBER_ERR__msg_type,
1764 /* 1746*/ CCD_ID_FAC__UNKNOWN_SUBSCRIBER_ERR__unknownSubscriberParam,
1765 /* 1747*/ CCD_ID_FAC__ILLEGAL_SUBSCRIBER_ERR__msg_type,
1766 /* 1748*/ CCD_ID_FAC__ILLEGAL_SUBSCRIBER_ERR__illegalSubscriberParam,
1767 /* 1749*/ CCD_ID_FAC__BEARER_SERV_NOT_PROV_ERR__msg_type,
1768 /* 1750*/ CCD_ID_FAC__BEARER_SERV_NOT_PROV_ERR__bearerServNotProvParam,
1769 /* 1751*/ CCD_ID_FAC__TELE_SERV_NOT_PROV_ERR__msg_type,
1770 /* 1752*/ CCD_ID_FAC__TELE_SERV_NOT_PROV_ERR__teleServNotProvParam,
1771 /* 1753*/ CCD_ID_FAC__ILLEGAL_EQUIPMENT_ERR__msg_type,
1772 /* 1754*/ CCD_ID_FAC__ILLEGAL_EQUIPMENT_ERR__teleServNotProvParam,
1773 /* 1755*/ CCD_ID_FAC__CALL_BARRED_ERR__msg_type,
1774 /* 1756*/ CCD_ID_FAC__CALL_BARRED_ERR__callBarringCause,
1775 /* 1757*/ CCD_ID_FAC__CALL_BARRED_ERR__extCallBarredParam,
1776 /* 1758*/ CCD_ID_FAC__SS_INCOMPATIBILITY_ERR__msg_type,
1777 /* 1759*/ CCD_ID_FAC__SS_INCOMPATIBILITY_ERR__ssIncompatibilityCause,
1778 /* 1760*/ CCD_ID_FAC__FACILITY_NOT_SUPPORTED_ERR__msg_type,
1779 /* 1761*/ CCD_ID_FAC__FACILITY_NOT_SUPPORTED_ERR__facilityNotSupParam,
1780 /* 1762*/ CCD_ID_FAC__ABSENT_SUBSCRIBER_ERR__msg_type,
1781 /* 1763*/ CCD_ID_FAC__ABSENT_SUBSCRIBER_ERR__absentSubscriberParam,
1782 /* 1764*/ CCD_ID_FAC__SYSTEM_FAILURE_ERR__msg_type,
1783 /* 1765*/ CCD_ID_FAC__SYSTEM_FAILURE_ERR__networkResource,
1784 /* 1766*/ CCD_ID_FAC__SYSTEM_FAILURE_ERR__extSystemFailureParam,
1785 /* 1767*/ CCD_ID_FAC__DATA_MISSING_ERR__msg_type,
1786 /* 1768*/ CCD_ID_FAC__DATA_MISSING_ERR__dataMissingParam,
1787 /* 1769*/ CCD_ID_FAC__UNEXPECTED_DATA_VALUE_ERR__msg_type,
1788 /* 1770*/ CCD_ID_FAC__UNEXPECTED_DATA_VALUE_ERR__unexpectedDataParam,
1789 /* 1771*/ CCD_ID_FAC__SS_ERROR_STATUS_ERR__msg_type,
1790 /* 1772*/ CCD_ID_FAC__SS_ERROR_STATUS_ERR__ssStatus,
1791 /* 1773*/ CCD_ID_FAC__PW_REGISTRATION_FAILURE_ERR__msg_type,
1792 /* 1774*/ CCD_ID_FAC__PW_REGISTRATION_FAILURE_ERR__pwRegistrationFailureCause,
1793 /* 1775*/ CCD_ID_SAT__cmd_details__cmd_nr,
1794 /* 1776*/ CCD_ID_SAT__cmd_details__cmd_typ,
1795 /* 1777*/ CCD_ID_SAT__cmd_details__cmd_qlf,
1796 /* 1778*/ CCD_ID_SAT__dev_ids__src_dev,
1797 /* 1779*/ CCD_ID_SAT__dev_ids__dest_dev,
1798 /* 1780*/ CCD_ID_SAT__pas_cmd__cmd_details,
1799 /* 1781*/ CCD_ID_SAT__pas_cmd__dev_ids,
1800 /* 1782*/ CCD_ID_SAT__pas_cmd__cmd_prms,
1801 /* 1783*/ CCD_ID_SAT__ss_string__noa,
1802 /* 1784*/ CCD_ID_SAT__ss_string__npi,
1803 /* 1785*/ CCD_ID_SAT__ss_string__ss_ctrl_string,
1804 /* 1786*/ CCD_ID_SAT__addr__noa,
1805 /* 1787*/ CCD_ID_SAT__addr__npi,
1806 /* 1788*/ CCD_ID_SAT__addr__bcdDigit,
1807 /* 1789*/ CCD_ID_SAT__subaddr__tos,
1808 /* 1790*/ CCD_ID_SAT__subaddr__oei,
1809 /* 1791*/ CCD_ID_SAT__subaddr__spare_0,
1810 /* 1792*/ CCD_ID_SAT__subaddr__bcdDigit,
1811 /* 1793*/ CCD_ID_SAT__res__gen,
1812 /* 1794*/ CCD_ID_SAT__res__add,
1813 /* 1795*/ CCD_ID_SAT__text__dcs,
1814 /* 1796*/ CCD_ID_SAT__text__text_str,
1815 /* 1797*/ CCD_ID_SAT__item_id__item,
1816 /* 1798*/ CCD_ID_SAT__cc_smc_loc_info__mnc_mcc,
1817 /* 1799*/ CCD_ID_SAT__cc_smc_loc_info__lac,
1818 /* 1800*/ CCD_ID_SAT__cc_smc_loc_info__cid,
1819 /* 1801*/ CCD_ID_SAT__cbd_cmd__dev_ids,
1820 /* 1802*/ CCD_ID_SAT__cbd_cmd__cb_page,
1821 /* 1803*/ CCD_ID_SAT__dur__time_unit,
1822 /* 1804*/ CCD_ID_SAT__dur__time_ivl,
1823 /* 1805*/ CCD_ID_SAT__ussd_string__dcs,
1824 /* 1806*/ CCD_ID_SAT__ussd_string__ussd_str,
1825 /* 1807*/ CCD_ID_SAT__ccr_allw__addr,
1826 /* 1808*/ CCD_ID_SAT__ccr_allw__ss_string,
1827 /* 1809*/ CCD_ID_SAT__ccr_allw__ussd_string,
1828 /* 1810*/ CCD_ID_SAT__ccr_allw__cap_cnf_parms,
1829 /* 1811*/ CCD_ID_SAT__ccr_allw__subaddr,
1830 /* 1812*/ CCD_ID_SAT__ccr_allw__alpha_id,
1831 /* 1813*/ CCD_ID_SAT__ccr_allw__bc_rpi,
1832 /* 1814*/ CCD_ID_SAT__ccr_allw__cap_cnf_parms_2,
1833 /* 1815*/ CCD_ID_SAT__cc_cmd__dev_ids,
1834 /* 1816*/ CCD_ID_SAT__cc_cmd__addr,
1835 /* 1817*/ CCD_ID_SAT__cc_cmd__ss_string,
1836 /* 1818*/ CCD_ID_SAT__cc_cmd__ussd_string,
1837 /* 1819*/ CCD_ID_SAT__cc_cmd__cap_cnf_parms,
1838 /* 1820*/ CCD_ID_SAT__cc_cmd__subaddr,
1839 /* 1821*/ CCD_ID_SAT__cc_cmd__cc_smc_loc_info,
1840 /* 1822*/ CCD_ID_SAT__cc_cmd__cap_cnf_parms_2,
1841 /* 1823*/ CCD_ID_SAT__smpdu__tpdu_data,
1842 /* 1824*/ CCD_ID_SAT__icon__icon_qu,
1843 /* 1825*/ CCD_ID_SAT__icon__icon_id,
1844 /* 1826*/ CCD_ID_SAT__ev_list__event,
1845 /* 1827*/ CCD_ID_SAT__dtmf_string__bcdDigit,
1846 /* 1828*/ CCD_ID_SAT__ti_oct__ti,
1847 /* 1829*/ CCD_ID_SAT__ti_oct__spare_0,
1848 /* 1830*/ CCD_ID_SAT__ti_list__ti_oct,
1849 /* 1831*/ CCD_ID_SAT__cause__cs,
1850 /* 1832*/ CCD_ID_SAT__sm_addr__noa,
1851 /* 1833*/ CCD_ID_SAT__sm_addr__npi,
1852 /* 1834*/ CCD_ID_SAT__sm_addr__bcdDigit,
1853 /* 1835*/ CCD_ID_SAT__smc_cmd__dev_ids,
1854 /* 1836*/ CCD_ID_SAT__smc_cmd__sm_addr,
1855 /* 1837*/ CCD_ID_SAT__smc_cmd__sm_addr_2,
1856 /* 1838*/ CCD_ID_SAT__smc_cmd__cc_smc_loc_info,
1857 /* 1839*/ CCD_ID_SAT__smcr_allw__sm_addr,
1858 /* 1840*/ CCD_ID_SAT__smcr_allw__sm_addr_2,
1859 /* 1841*/ CCD_ID_SAT__smcr_allw__alpha_id,
1860 /* 1842*/ CCD_ID_SAT__at_resp__text_str,
1861 /* 1843*/ CCD_ID_SAT__chan_data__ch_dat_str,
1862 /* 1844*/ CCD_ID_SAT__other_addr__oth_addr_type,
1863 /* 1845*/ CCD_ID_SAT__other_addr__ipv4_addr,
1864 /* 1846*/ CCD_ID_SAT__other_addr__ipv6_addr,
1865 /* 1847*/ CCD_ID_SAT__if_transp_lev__trans_prot_type,
1866 /* 1848*/ CCD_ID_SAT__if_transp_lev__port_number,
1867 /* 1849*/ CCD_ID_SAT__browser_id__browser,
1868 /* 1850*/ CCD_ID_SAT__url__url_value,
1869 /* 1851*/ CCD_ID_SAT__prov_file_ref__prov_file_id,
1870 /* 1852*/ CCD_ID_SAT__brows_term_cause__brows_term_s,
1871 /* 1853*/ CCD_ID_SAT__chan_stat__chan_stat_link,
1872 /* 1854*/ CCD_ID_SAT__chan_stat__chan_stat_inf1,
1873 /* 1855*/ CCD_ID_SAT__chan_stat__chan_id,
1874 /* 1856*/ CCD_ID_SAT__chan_stat__chan_stat_inf2,
1875 /* 1857*/ CCD_ID_SAT__evd_cmd__ev_list,
1876 /* 1858*/ CCD_ID_SAT__evd_cmd__dev_ids,
1877 /* 1859*/ CCD_ID_SAT__evd_cmd__ti_list,
1878 /* 1860*/ CCD_ID_SAT__evd_cmd__addr,
1879 /* 1861*/ CCD_ID_SAT__evd_cmd__subaddr,
1880 /* 1862*/ CCD_ID_SAT__evd_cmd__cause,
1881 /* 1863*/ CCD_ID_SAT__evd_cmd__loc_state,
1882 /* 1864*/ CCD_ID_SAT__evd_cmd__cc_smc_loc_info,
1883 /* 1865*/ CCD_ID_SAT__evd_cmd__brows_term_cause,
1884 /* 1866*/ CCD_ID_SAT__evd_cmd__chan_stat,
1885 /* 1867*/ CCD_ID_SAT__evd_cmd__chan_dat_lth,
1886 /* 1868*/ CCD_ID_SAT__csd_bear_prm__csd_speed,
1887 /* 1869*/ CCD_ID_SAT__csd_bear_prm__csd_name,
1888 /* 1870*/ CCD_ID_SAT__csd_bear_prm__csd_ce,
1889 /* 1871*/ CCD_ID_SAT__gprs_bear_prm__gprs_prec,
1890 /* 1872*/ CCD_ID_SAT__gprs_bear_prm__gprs_delay,
1891 /* 1873*/ CCD_ID_SAT__gprs_bear_prm__gprs_rely,
1892 /* 1874*/ CCD_ID_SAT__gprs_bear_prm__gprs_peak,
1893 /* 1875*/ CCD_ID_SAT__gprs_bear_prm__gprs_mean,
1894 /* 1876*/ CCD_ID_SAT__gprs_bear_prm__gprs_pdp_type,
1895 /* 1877*/ CCD_ID_SAT__bear_desc__bear_type,
1896 /* 1878*/ CCD_ID_SAT__bear_desc__csd_bear_prm,
1897 /* 1879*/ CCD_ID_SAT__bear_desc__gprs_bear_prm,
1898 /* 1880*/ CCD_ID_SAT__nan_buf__n_acc_name,
1899 /* 1881*/ CCD_ID_SAT__dtt__text_str,
1900 /* 1882*/ CCD_ID_SAT__lang__lang_buf,
1901 /* 1883*/ CCD_ID_SAT__STK_CMD__msg_type,
1902 /* 1884*/ CCD_ID_SAT__STK_CMD__pas_cmd,
1903 /* 1885*/ CCD_ID_SAT__SEND_SS__msg_type,
1904 /* 1886*/ CCD_ID_SAT__SEND_SS__alpha_id,
1905 /* 1887*/ CCD_ID_SAT__SEND_SS__ss_string,
1906 /* 1888*/ CCD_ID_SAT__SEND_SS__icon,
1907 /* 1889*/ CCD_ID_SAT__SETUP_CALL__msg_type,
1908 /* 1890*/ CCD_ID_SAT__SETUP_CALL__alpha_id,
1909 /* 1891*/ CCD_ID_SAT__SETUP_CALL__addr,
1910 /* 1892*/ CCD_ID_SAT__SETUP_CALL__cap_cnf_parms,
1911 /* 1893*/ CCD_ID_SAT__SETUP_CALL__subaddr,
1912 /* 1894*/ CCD_ID_SAT__SETUP_CALL__dur,
1913 /* 1895*/ CCD_ID_SAT__SETUP_CALL__icon,
1914 /* 1896*/ CCD_ID_SAT__SETUP_CALL__alpha_id_2,
1915 /* 1897*/ CCD_ID_SAT__SETUP_CALL__icon_2,
1916 /* 1898*/ CCD_ID_SAT__SEND_SM__msg_type,
1917 /* 1899*/ CCD_ID_SAT__SEND_SM__alpha_id,
1918 /* 1900*/ CCD_ID_SAT__SEND_SM__addr,
1919 /* 1901*/ CCD_ID_SAT__SEND_SM__smpdu,
1920 /* 1902*/ CCD_ID_SAT__SEND_SM__icon,
1921 /* 1903*/ CCD_ID_SAT__SEND_USSD__msg_type,
1922 /* 1904*/ CCD_ID_SAT__SEND_USSD__alpha_id,
1923 /* 1905*/ CCD_ID_SAT__SEND_USSD__ussd_string,
1924 /* 1906*/ CCD_ID_SAT__SEND_USSD__icon,
1925 /* 1907*/ CCD_ID_SAT__SEND_DTMF__msg_type,
1926 /* 1908*/ CCD_ID_SAT__SEND_DTMF__alpha_id,
1927 /* 1909*/ CCD_ID_SAT__SEND_DTMF__dtmf_string,
1928 /* 1910*/ CCD_ID_SAT__SEND_DTMF__icon,
1929 /* 1911*/ CCD_ID_SAT__SETUP_EVENT__msg_type,
1930 /* 1912*/ CCD_ID_SAT__SETUP_EVENT__ev_list,
1931 /* 1913*/ CCD_ID_SAT__TERM_RESP__msg_type,
1932 /* 1914*/ CCD_ID_SAT__TERM_RESP__cmd_details,
1933 /* 1915*/ CCD_ID_SAT__TERM_RESP__dev_ids,
1934 /* 1916*/ CCD_ID_SAT__TERM_RESP__res,
1935 /* 1917*/ CCD_ID_SAT__TERM_RESP__dur,
1936 /* 1918*/ CCD_ID_SAT__TERM_RESP__text,
1937 /* 1919*/ CCD_ID_SAT__TERM_RESP__item_id,
1938 /* 1920*/ CCD_ID_SAT__TERM_RESP__cc_smc_loc_info,
1939 /* 1921*/ CCD_ID_SAT__TERM_RESP__imei,
1940 /* 1922*/ CCD_ID_SAT__TERM_RESP__ntw_msr_res,
1941 /* 1923*/ CCD_ID_SAT__TERM_RESP__bcch_list,
1942 /* 1924*/ CCD_ID_SAT__TERM_RESP__dtt,
1943 /* 1925*/ CCD_ID_SAT__TERM_RESP__cc_req_act,
1944 /* 1926*/ CCD_ID_SAT__TERM_RESP__res_2,
1945 /* 1927*/ CCD_ID_SAT__TERM_RESP__at_resp,
1946 /* 1928*/ CCD_ID_SAT__TERM_RESP__chan_data,
1947 /* 1929*/ CCD_ID_SAT__TERM_RESP__chan_stat,
1948 /* 1930*/ CCD_ID_SAT__TERM_RESP__chan_dat_lth,
1949 /* 1931*/ CCD_ID_SAT__TERM_RESP__bear_desc,
1950 /* 1932*/ CCD_ID_SAT__TERM_RESP__buffer_size,
1951 /* 1933*/ CCD_ID_SAT__TERM_RESP__lang,
1952 /* 1934*/ CCD_ID_SAT__ENV_CMD__msg_type,
1953 /* 1935*/ CCD_ID_SAT__ENV_CMD__cbd_cmd,
1954 /* 1936*/ CCD_ID_SAT__ENV_CMD__cc_cmd,
1955 /* 1937*/ CCD_ID_SAT__ENV_CMD__smc_cmd,
1956 /* 1938*/ CCD_ID_SAT__ENV_CMD__evd_cmd,
1957 /* 1939*/ CCD_ID_SAT__ENV_RES__msg_type,
1958 /* 1940*/ CCD_ID_SAT__ENV_RES__ccr_allw,
1959 /* 1941*/ CCD_ID_SAT__ENV_RES__ccr_not_allw,
1960 /* 1942*/ CCD_ID_SAT__ENV_RES__ccr_allw_mdfy,
1961 /* 1943*/ CCD_ID_SAT__ENV_RES_SMC__msg_type,
1962 /* 1944*/ CCD_ID_SAT__ENV_RES_SMC__smcr_allw,
1963 /* 1945*/ CCD_ID_SAT__ENV_RES_SMC__smcr_not_allw,
1964 /* 1946*/ CCD_ID_SAT__ENV_RES_SMC__smcr_allw_mdfy,
1965 /* 1947*/ CCD_ID_SAT__RUN_AT__msg_type,
1966 /* 1948*/ CCD_ID_SAT__RUN_AT__alpha_id,
1967 /* 1949*/ CCD_ID_SAT__RUN_AT__at_string,
1968 /* 1950*/ CCD_ID_SAT__RUN_AT__icon,
1969 /* 1951*/ CCD_ID_SAT__OPEN_CHANNEL__msg_type,
1970 /* 1952*/ CCD_ID_SAT__OPEN_CHANNEL__alpha_id,
1971 /* 1953*/ CCD_ID_SAT__OPEN_CHANNEL__icon,
1972 /* 1954*/ CCD_ID_SAT__OPEN_CHANNEL__addr,
1973 /* 1955*/ CCD_ID_SAT__OPEN_CHANNEL__subaddr,
1974 /* 1956*/ CCD_ID_SAT__OPEN_CHANNEL__dur,
1975 /* 1957*/ CCD_ID_SAT__OPEN_CHANNEL__dur2,
1976 /* 1958*/ CCD_ID_SAT__OPEN_CHANNEL__bear_desc,
1977 /* 1959*/ CCD_ID_SAT__OPEN_CHANNEL__buffer_size,
1978 /* 1960*/ CCD_ID_SAT__OPEN_CHANNEL__nan_buf,
1979 /* 1961*/ CCD_ID_SAT__OPEN_CHANNEL__other_addr,
1980 /* 1962*/ CCD_ID_SAT__OPEN_CHANNEL__text,
1981 /* 1963*/ CCD_ID_SAT__OPEN_CHANNEL__text2,
1982 /* 1964*/ CCD_ID_SAT__OPEN_CHANNEL__if_transp_lev,
1983 /* 1965*/ CCD_ID_SAT__OPEN_CHANNEL__data_dest_addr,
1984 /* 1966*/ CCD_ID_SAT__CLOSE_CHANNEL__msg_type,
1985 /* 1967*/ CCD_ID_SAT__CLOSE_CHANNEL__alpha_id,
1986 /* 1968*/ CCD_ID_SAT__CLOSE_CHANNEL__icon,
1987 /* 1969*/ CCD_ID_SAT__RECEIVE_DATA__msg_type,
1988 /* 1970*/ CCD_ID_SAT__RECEIVE_DATA__alpha_id,
1989 /* 1971*/ CCD_ID_SAT__RECEIVE_DATA__icon,
1990 /* 1972*/ CCD_ID_SAT__RECEIVE_DATA__chan_dat_lth,
1991 /* 1973*/ CCD_ID_SAT__SEND_DATA__msg_type,
1992 /* 1974*/ CCD_ID_SAT__SEND_DATA__alpha_id,
1993 /* 1975*/ CCD_ID_SAT__SEND_DATA__icon,
1994 /* 1976*/ CCD_ID_SAT__SEND_DATA__chan_data,
1995 /* 1977*/ CCD_ID_SAT__GET_CHA_STAT__msg_type,
1996 /* 1978*/ CCD_ID_SAT__LAUNCH_BROWSER__msg_type,
1997 /* 1979*/ CCD_ID_SAT__LAUNCH_BROWSER__browser_id,
1998 /* 1980*/ CCD_ID_SAT__LAUNCH_BROWSER__url,
1999 /* 1981*/ CCD_ID_SAT__LAUNCH_BROWSER__bearer,
2000 /* 1982*/ CCD_ID_SAT__LAUNCH_BROWSER__prov_file_ref,
2001 /* 1983*/ CCD_ID_SAT__LAUNCH_BROWSER__text,
2002 /* 1984*/ CCD_ID_SAT__LAUNCH_BROWSER__alpha_id,
2003 /* 1985*/ CCD_ID_SAT__LAUNCH_BROWSER__icon,
2004 /* 1986*/ CCD_ID_T30__cap0_rcv__spare_0,
2005 /* 1987*/ CCD_ID_T30__cap0_rcv__v8,
2006 /* 1988*/ CCD_ID_T30__cap0_rcv__n_byte,
2007 /* 1989*/ CCD_ID_T30__cap0_rcv__spare_1,
2008 /* 1990*/ CCD_ID_T30__cap0_rcv__ready_tx_fax,
2009 /* 1991*/ CCD_ID_T30__cap0_rcv__rec_fax_op,
2010 /* 1992*/ CCD_ID_T30__cap0_rcv__data_sig_rate,
2011 /* 1993*/ CCD_ID_T30__cap0_rcv__R8_lines_pels,
2012 /* 1994*/ CCD_ID_T30__cap0_rcv__two_dim_coding,
2013 /* 1995*/ CCD_ID_T30__cap0_rcv__rec_width,
2014 /* 1996*/ CCD_ID_T30__cap0_rcv__max_rec_len,
2015 /* 1997*/ CCD_ID_T30__cap0_rcv__min_scan_time,
2016 /* 1998*/ CCD_ID_T30__cap1_rcv__spare_0,
2017 /* 1999*/ CCD_ID_T30__cap1_rcv__uncomp_mode,
2018 /* 2000*/ CCD_ID_T30__cap1_rcv__err_corr_mode,
2019 /* 2001*/ CCD_ID_T30__cap1_rcv__spare_1,
2020 /* 2002*/ CCD_ID_T30__cap1_rcv__t6_coding,
2021 /* 2003*/ CCD_ID_T30__cap2_rcv__spare_0,
2022 /* 2004*/ CCD_ID_T30__cap3_rcv__R8_lines,
2023 /* 2005*/ CCD_ID_T30__cap3_rcv__r_300_pels,
2024 /* 2006*/ CCD_ID_T30__cap3_rcv__R16_lines_pels,
2025 /* 2007*/ CCD_ID_T30__cap3_rcv__i_res_pref,
2026 /* 2008*/ CCD_ID_T30__cap3_rcv__m_res_pref,
2027 /* 2009*/ CCD_ID_T30__cap3_rcv__min_scan_time_hr,
2028 /* 2010*/ CCD_ID_T30__cap3_rcv__sel_polling,
2029 /* 2011*/ CCD_ID_T30__cap4_rcv__subaddr,
2030 /* 2012*/ CCD_ID_T30__cap4_rcv__password,
2031 /* 2013*/ CCD_ID_T30__cap4_rcv__ready_tx_doc,
2032 /* 2014*/ CCD_ID_T30__cap4_rcv__spare_0,
2033 /* 2015*/ CCD_ID_T30__cap4_rcv__bft,
2034 /* 2016*/ CCD_ID_T30__cap4_rcv__dtm,
2035 /* 2017*/ CCD_ID_T30__cap4_rcv__edi,
2036 /* 2018*/ CCD_ID_T30__cap5_rcv__btm,
2037 /* 2019*/ CCD_ID_T30__cap5_rcv__spare_0,
2038 /* 2020*/ CCD_ID_T30__cap5_rcv__ready_tx_mixed,
2039 /* 2021*/ CCD_ID_T30__cap5_rcv__char_mode,
2040 /* 2022*/ CCD_ID_T30__cap5_rcv__spare_1,
2041 /* 2023*/ CCD_ID_T30__cap5_rcv__mixed_mode,
2042 /* 2024*/ CCD_ID_T30__cap5_rcv__spare_2,
2043 /* 2025*/ CCD_ID_T30__cap6_rcv__proc_mode_26,
2044 /* 2026*/ CCD_ID_T30__cap6_rcv__dig_network_cap,
2045 /* 2027*/ CCD_ID_T30__cap6_rcv__duplex,
2046 /* 2028*/ CCD_ID_T30__cap6_rcv__jpeg,
2047 /* 2029*/ CCD_ID_T30__cap6_rcv__full_colour,
2048 /* 2030*/ CCD_ID_T30__cap6_rcv__spare_0,
2049 /* 2031*/ CCD_ID_T30__cap6_rcv__r_12_bits_pel_comp,
2050 /* 2032*/ CCD_ID_T30__cap7_rcv__no_subsamp,
2051 /* 2033*/ CCD_ID_T30__cap7_rcv__cust_illum,
2052 /* 2034*/ CCD_ID_T30__cap7_rcv__cust_gamut,
2053 /* 2035*/ CCD_ID_T30__cap7_rcv__na_letter,
2054 /* 2036*/ CCD_ID_T30__cap7_rcv__na_legal,
2055 /* 2037*/ CCD_ID_T30__cap7_rcv__sing_prog_seq_coding_basic,
2056 /* 2038*/ CCD_ID_T30__cap7_rcv__sing_prog_seq_coding_L0,
2057 /* 2039*/ CCD_ID_T30__cap0_snd__spare_0,
2058 /* 2040*/ CCD_ID_T30__cap0_snd__rec_fax_op,
2059 /* 2041*/ CCD_ID_T30__cap0_snd__data_sig_rate,
2060 /* 2042*/ CCD_ID_T30__cap0_snd__R8_lines_pels,
2061 /* 2043*/ CCD_ID_T30__cap0_snd__two_dim_coding,
2062 /* 2044*/ CCD_ID_T30__cap0_snd__rec_width,
2063 /* 2045*/ CCD_ID_T30__cap0_snd__max_rec_len,
2064 /* 2046*/ CCD_ID_T30__cap0_snd__min_scan_time,
2065 /* 2047*/ CCD_ID_T30__cap1_snd__spare_0,
2066 /* 2048*/ CCD_ID_T30__cap1_snd__uncomp_mode,
2067 /* 2049*/ CCD_ID_T30__cap1_snd__err_corr_mode,
2068 /* 2050*/ CCD_ID_T30__cap1_snd__frame_size,
2069 /* 2051*/ CCD_ID_T30__cap1_snd__spare_1,
2070 /* 2052*/ CCD_ID_T30__cap1_snd__t6_coding,
2071 /* 2053*/ CCD_ID_T30__cap2_snd__spare_0,
2072 /* 2054*/ CCD_ID_T30__cap3_snd__R8_lines,
2073 /* 2055*/ CCD_ID_T30__cap3_snd__r_300_pels,
2074 /* 2056*/ CCD_ID_T30__cap3_snd__R16_lines_pels,
2075 /* 2057*/ CCD_ID_T30__cap3_snd__resolution_type,
2076 /* 2058*/ CCD_ID_T30__cap3_snd__spare_0,
2077 /* 2059*/ CCD_ID_T30__cap4_snd__subaddr,
2078 /* 2060*/ CCD_ID_T30__cap4_snd__password,
2079 /* 2061*/ CCD_ID_T30__cap4_snd__spare_0,
2080 /* 2062*/ CCD_ID_T30__cap4_snd__bft,
2081 /* 2063*/ CCD_ID_T30__cap4_snd__dtm,
2082 /* 2064*/ CCD_ID_T30__cap4_snd__edi,
2083 /* 2065*/ CCD_ID_T30__cap5_snd__btm,
2084 /* 2066*/ CCD_ID_T30__cap5_snd__spare_0,
2085 /* 2067*/ CCD_ID_T30__cap5_snd__char_mode,
2086 /* 2068*/ CCD_ID_T30__cap5_snd__spare_1,
2087 /* 2069*/ CCD_ID_T30__cap5_snd__mixed_mode,
2088 /* 2070*/ CCD_ID_T30__cap5_snd__spare_2,
2089 /* 2071*/ CCD_ID_T30__cap6_snd__proc_mode_26,
2090 /* 2072*/ CCD_ID_T30__cap6_snd__dig_network_cap,
2091 /* 2073*/ CCD_ID_T30__cap6_snd__duplex,
2092 /* 2074*/ CCD_ID_T30__cap6_snd__jpeg,
2093 /* 2075*/ CCD_ID_T30__cap6_snd__full_colour,
2094 /* 2076*/ CCD_ID_T30__cap6_snd__huffman_tables,
2095 /* 2077*/ CCD_ID_T30__cap6_snd__r_12_bits_pel_comp,
2096 /* 2078*/ CCD_ID_T30__cap7_snd__no_subsamp,
2097 /* 2079*/ CCD_ID_T30__cap7_snd__cust_illum,
2098 /* 2080*/ CCD_ID_T30__cap7_snd__cust_gamut,
2099 /* 2081*/ CCD_ID_T30__cap7_snd__na_letter,
2100 /* 2082*/ CCD_ID_T30__cap7_snd__na_legal,
2101 /* 2083*/ CCD_ID_T30__cap7_snd__sing_prog_seq_coding_basic,
2102 /* 2084*/ CCD_ID_T30__cap7_snd__sing_prog_seq_coding_L0,
2103 /* 2085*/ CCD_ID_T30__BCS_DIS__fcf,
2104 /* 2086*/ CCD_ID_T30__BCS_DIS__cap0_rcv,
2105 /* 2087*/ CCD_ID_T30__BCS_DIS__cap1_rcv,
2106 /* 2088*/ CCD_ID_T30__BCS_DIS__cap2_rcv,
2107 /* 2089*/ CCD_ID_T30__BCS_DIS__cap3_rcv,
2108 /* 2090*/ CCD_ID_T30__BCS_DIS__cap4_rcv,
2109 /* 2091*/ CCD_ID_T30__BCS_DIS__cap5_rcv,
2110 /* 2092*/ CCD_ID_T30__BCS_DIS__cap6_rcv,
2111 /* 2093*/ CCD_ID_T30__BCS_DIS__cap7_rcv,
2112 /* 2094*/ CCD_ID_T30__BCS_CSI__fcf,
2113 /* 2095*/ CCD_ID_T30__BCS_CSI__cld_sub_nr,
2114 /* 2096*/ CCD_ID_T30__BCS_NSF__fcf,
2115 /* 2097*/ CCD_ID_T30__BCS_NSF__non_std_fac,
2116 /* 2098*/ CCD_ID_T30__BCS_DTC__fcf,
2117 /* 2099*/ CCD_ID_T30__BCS_DTC__cap0_rcv,
2118 /* 2100*/ CCD_ID_T30__BCS_DTC__cap1_rcv,
2119 /* 2101*/ CCD_ID_T30__BCS_DTC__cap2_rcv,
2120 /* 2102*/ CCD_ID_T30__BCS_DTC__cap3_rcv,
2121 /* 2103*/ CCD_ID_T30__BCS_DTC__cap4_rcv,
2122 /* 2104*/ CCD_ID_T30__BCS_DTC__cap5_rcv,
2123 /* 2105*/ CCD_ID_T30__BCS_DTC__cap6_rcv,
2124 /* 2106*/ CCD_ID_T30__BCS_DTC__cap7_rcv,
2125 /* 2107*/ CCD_ID_T30__BCS_CIG__fcf,
2126 /* 2108*/ CCD_ID_T30__BCS_CIG__clg_sub_nr,
2127 /* 2109*/ CCD_ID_T30__BCS_NSC__fcf,
2128 /* 2110*/ CCD_ID_T30__BCS_NSC__non_std_fac,
2129 /* 2111*/ CCD_ID_T30__BCS_PWD_POLL__fcf,
2130 /* 2112*/ CCD_ID_T30__BCS_PWD_POLL__pm_pword,
2131 /* 2113*/ CCD_ID_T30__BCS_SEP__fcf,
2132 /* 2114*/ CCD_ID_T30__BCS_SEP__pm_sub_addr,
2133 /* 2115*/ CCD_ID_T30__BCS_DCS__fcf,
2134 /* 2116*/ CCD_ID_T30__BCS_DCS__cap0_snd,
2135 /* 2117*/ CCD_ID_T30__BCS_DCS__cap1_snd,
2136 /* 2118*/ CCD_ID_T30__BCS_DCS__cap2_snd,
2137 /* 2119*/ CCD_ID_T30__BCS_DCS__cap3_snd,
2138 /* 2120*/ CCD_ID_T30__BCS_DCS__cap4_snd,
2139 /* 2121*/ CCD_ID_T30__BCS_DCS__cap5_snd,
2140 /* 2122*/ CCD_ID_T30__BCS_DCS__cap6_snd,
2141 /* 2123*/ CCD_ID_T30__BCS_DCS__cap7_snd,
2142 /* 2124*/ CCD_ID_T30__BCS_TSI__fcf,
2143 /* 2125*/ CCD_ID_T30__BCS_TSI__tra_sub_nr,
2144 /* 2126*/ CCD_ID_T30__BCS_NSS__fcf,
2145 /* 2127*/ CCD_ID_T30__BCS_NSS__non_std_fac,
2146 /* 2128*/ CCD_ID_T30__BCS_SUB__fcf,
2147 /* 2129*/ CCD_ID_T30__BCS_SUB__sub_addr,
2148 /* 2130*/ CCD_ID_T30__BCS_PWD_SND__fcf,
2149 /* 2131*/ CCD_ID_T30__BCS_PWD_SND__sm_pword,
2150 /* 2132*/ CCD_ID_T30__BCS_CFR__fcf,
2151 /* 2133*/ CCD_ID_T30__BCS_FTT__fcf,
2152 /* 2134*/ CCD_ID_T30__BCS_EOM__fcf,
2153 /* 2135*/ CCD_ID_T30__BCS_MPS__fcf,
2154 /* 2136*/ CCD_ID_T30__BCS_EOP__fcf,
2155 /* 2137*/ CCD_ID_T30__BCS_PRI_EOM__fcf,
2156 /* 2138*/ CCD_ID_T30__BCS_PRI_MPS__fcf,
2157 /* 2139*/ CCD_ID_T30__BCS_PRI_EOP__fcf,
2158 /* 2140*/ CCD_ID_T30__BCS_MCF__fcf,
2159 /* 2141*/ CCD_ID_T30__BCS_RTP__fcf,
2160 /* 2142*/ CCD_ID_T30__BCS_RTN__fcf,
2161 /* 2143*/ CCD_ID_T30__BCS_PIP__fcf,
2162 /* 2144*/ CCD_ID_T30__BCS_PIN__fcf,
2163 /* 2145*/ CCD_ID_T30__BCS_DCN__fcf,
2164 /* 2146*/ CCD_ID_T30__BCS_CRP__fcf,
2165 /* 2147*/ CCD_ID_GMM__authentication_parameter_rand__rand_value,
2166 /* 2148*/ CCD_ID_GMM__ciphering_key_sequence_number__spare_0,
2167 /* 2149*/ CCD_ID_GMM__ciphering_key_sequence_number__key_sequence,
2168 /* 2150*/ CCD_ID_GMM__a_c_reference_number__a_c_reference_number_value,
2169 /* 2151*/ CCD_ID_GMM__imeisv_request__spare_0,
2170 /* 2152*/ CCD_ID_GMM__imeisv_request__imeisv_request_value,
2171 /* 2153*/ CCD_ID_GMM__ciphering_algorithm__spare_0,
2172 /* 2154*/ CCD_ID_GMM__ciphering_algorithm__type_of_algorithm,
2173 /* 2155*/ CCD_ID_GMM__authentication_parameter_sres__sres_value,
2174 /* 2156*/ CCD_ID_GMM__identity_type_2__spare_0,
2175 /* 2157*/ CCD_ID_GMM__identity_type_2__type_of_identity_2,
2176 /* 2158*/ CCD_ID_GMM__routing_area_identification__mcc,
2177 /* 2159*/ CCD_ID_GMM__routing_area_identification__mnc,
2178 /* 2160*/ CCD_ID_GMM__routing_area_identification__lac,
2179 /* 2161*/ CCD_ID_GMM__routing_area_identification__rac,
2180 /* 2162*/ CCD_ID_GMM__update_type__spare_0,
2181 /* 2163*/ CCD_ID_GMM__update_type__update_type_value,
2182 /* 2164*/ CCD_ID_GMM__result_gmm__spare_0,
2183 /* 2165*/ CCD_ID_GMM__result_gmm__result_value,
2184 /* 2166*/ CCD_ID_GMM__mobile_identity__type_of_identity,
2185 /* 2167*/ CCD_ID_GMM__mobile_identity__odd_even,
2186 /* 2168*/ CCD_ID_GMM__mobile_identity__identity_digit,
2187 /* 2169*/ CCD_ID_GMM__mobile_identity__spare_0,
2188 /* 2170*/ CCD_ID_GMM__mobile_identity__tmsi,
2189 /* 2171*/ CCD_ID_GMM__mobile_identity__dmy,
2190 /* 2172*/ CCD_ID_GMM__attach_type__spare_0,
2191 /* 2173*/ CCD_ID_GMM__attach_type__type_of_attach,
2192 /* 2174*/ CCD_ID_GMM__d_detach_type__spare_0,
2193 /* 2175*/ CCD_ID_GMM__d_detach_type__d_type_of_detach,
2194 /* 2176*/ CCD_ID_GMM__u_detach_type__power_off,
2195 /* 2177*/ CCD_ID_GMM__u_detach_type__u_type_of_detach,
2196 /* 2178*/ CCD_ID_GMM__drx_parameter__split_pg_cycle_code,
2197 /* 2179*/ CCD_ID_GMM__drx_parameter__spare_0,
2198 /* 2180*/ CCD_ID_GMM__drx_parameter__split_on_ccch,
2199 /* 2181*/ CCD_ID_GMM__drx_parameter__non_drx_timer,
2200 /* 2182*/ CCD_ID_GMM__ready_timer__timer_unit,
2201 /* 2183*/ CCD_ID_GMM__ready_timer__timer_value,
2202 /* 2184*/ CCD_ID_GMM__t3302__timer_unit,
2203 /* 2185*/ CCD_ID_GMM__t3302__timer_value,
2204 /* 2186*/ CCD_ID_GMM__p_tmsi_signature__p_tmsi_signature_value,
2205 /* 2187*/ CCD_ID_GMM__force_to_standby__spare_0,
2206 /* 2188*/ CCD_ID_GMM__force_to_standby__force_to_standby_value,
2207 /* 2189*/ CCD_ID_GMM__radio_priority__spare_0,
2208 /* 2190*/ CCD_ID_GMM__radio_priority__radio_priority_level_value,
2209 /* 2191*/ CCD_ID_GMM__gmm_cause__cause_value,
2210 /* 2192*/ CCD_ID_GMM__receive_n_pdu_number_list_val__nsapi,
2211 /* 2193*/ CCD_ID_GMM__receive_n_pdu_number_list_val__receive_n_pdu_number_val,
2212 /* 2194*/ CCD_ID_GMM__receive_n_pdu_number_list__receive_n_pdu_number_list_val,
2213 /* 2195*/ CCD_ID_GMM__receive_n_pdu_number_list__spare_0,
2214 /* 2196*/ CCD_ID_GMM__full_network_name__spare_0,
2215 /* 2197*/ CCD_ID_GMM__full_network_name__code,
2216 /* 2198*/ CCD_ID_GMM__full_network_name__add_ci,
2217 /* 2199*/ CCD_ID_GMM__full_network_name__nr_sparebits,
2218 /* 2200*/ CCD_ID_GMM__full_network_name__text_string,
2219 /* 2201*/ CCD_ID_GMM__time_zone__time_zone_value,
2220 /* 2202*/ CCD_ID_GMM__time_zone_and_time__year,
2221 /* 2203*/ CCD_ID_GMM__time_zone_and_time__month,
2222 /* 2204*/ CCD_ID_GMM__time_zone_and_time__day,
2223 /* 2205*/ CCD_ID_GMM__time_zone_and_time__hour,
2224 /* 2206*/ CCD_ID_GMM__time_zone_and_time__minute,
2225 /* 2207*/ CCD_ID_GMM__time_zone_and_time__second,
2226 /* 2208*/ CCD_ID_GMM__time_zone_and_time__time_zone_value,
2227 /* 2209*/ CCD_ID_GMM__tmsi_status__spare_0,
2228 /* 2210*/ CCD_ID_GMM__tmsi_status__tmsi_flag,
2229 /* 2211*/ CCD_ID_GMM__ext_gea_bits__gea_2,
2230 /* 2212*/ CCD_ID_GMM__ext_gea_bits__gea_3,
2231 /* 2213*/ CCD_ID_GMM__ext_gea_bits__gea_4,
2232 /* 2214*/ CCD_ID_GMM__ext_gea_bits__gea_5,
2233 /* 2215*/ CCD_ID_GMM__ext_gea_bits__gea_6,
2234 /* 2216*/ CCD_ID_GMM__ext_gea_bits__gea_7,
2235 /* 2217*/ CCD_ID_GMM__ms_network_capability__gea_1,
2236 /* 2218*/ CCD_ID_GMM__ms_network_capability__sm_capabilities_gsm,
2237 /* 2219*/ CCD_ID_GMM__ms_network_capability__sm_capabilities_gprs,
2238 /* 2220*/ CCD_ID_GMM__ms_network_capability__ucs2_support,
2239 /* 2221*/ CCD_ID_GMM__ms_network_capability__ss_screening_indicator,
2240 /* 2222*/ CCD_ID_GMM__ms_network_capability__solsa_capability,
2241 /* 2223*/ CCD_ID_GMM__ms_network_capability__rev_level_ind,
2242 /* 2224*/ CCD_ID_GMM__ms_network_capability__pfc_feature_mode,
2243 /* 2225*/ CCD_ID_GMM__ms_network_capability__ext_gea_bits,
2244 /* 2226*/ CCD_ID_GMM__ms_network_capability__spare_0,
2245 /* 2227*/ CCD_ID_GMM__eqv_plmn__mcc,
2246 /* 2228*/ CCD_ID_GMM__eqv_plmn__mnc,
2247 /* 2229*/ CCD_ID_GMM__eqv_plmn_list__eqv_plmn,
2248 /* 2230*/ CCD_ID_GMM__ATTACH_REQUEST__msg_type,
2249 /* 2231*/ CCD_ID_GMM__ATTACH_REQUEST__ms_network_capability,
2250 /* 2232*/ CCD_ID_GMM__ATTACH_REQUEST__attach_type,
2251 /* 2233*/ CCD_ID_GMM__ATTACH_REQUEST__ciphering_key_sequence_number,
2252 /* 2234*/ CCD_ID_GMM__ATTACH_REQUEST__drx_parameter,
2253 /* 2235*/ CCD_ID_GMM__ATTACH_REQUEST__gmobile_identity,
2254 /* 2236*/ CCD_ID_GMM__ATTACH_REQUEST__routing_area_identification,
2255 /* 2237*/ CCD_ID_GMM__ATTACH_REQUEST__ra_cap,
2256 /* 2238*/ CCD_ID_GMM__ATTACH_REQUEST__p_tmsi_signature,
2257 /* 2239*/ CCD_ID_GMM__ATTACH_REQUEST__ready_timer,
2258 /* 2240*/ CCD_ID_GMM__ATTACH_REQUEST__tmsi_status,
2259 /* 2241*/ CCD_ID_GMM__ATTACH_ACCEPT__msg_type,
2260 /* 2242*/ CCD_ID_GMM__ATTACH_ACCEPT__result_gmm,
2261 /* 2243*/ CCD_ID_GMM__ATTACH_ACCEPT__force_to_standby,
2262 /* 2244*/ CCD_ID_GMM__ATTACH_ACCEPT__rau_timer,
2263 /* 2245*/ CCD_ID_GMM__ATTACH_ACCEPT__radio_priority,
2264 /* 2246*/ CCD_ID_GMM__ATTACH_ACCEPT__spare_0,
2265 /* 2247*/ CCD_ID_GMM__ATTACH_ACCEPT__routing_area_identification,
2266 /* 2248*/ CCD_ID_GMM__ATTACH_ACCEPT__p_tmsi_signature,
2267 /* 2249*/ CCD_ID_GMM__ATTACH_ACCEPT__ready_timer,
2268 /* 2250*/ CCD_ID_GMM__ATTACH_ACCEPT__gmobile_identity,
2269 /* 2251*/ CCD_ID_GMM__ATTACH_ACCEPT__mobile_identity,
2270 /* 2252*/ CCD_ID_GMM__ATTACH_ACCEPT__gmm_cause,
2271 /* 2253*/ CCD_ID_GMM__ATTACH_ACCEPT__t3302,
2272 /* 2254*/ CCD_ID_GMM__ATTACH_ACCEPT__cell_notification,
2273 /* 2255*/ CCD_ID_GMM__ATTACH_ACCEPT__eqv_plmn_list,
2274 /* 2256*/ CCD_ID_GMM__ATTACH_COMPLETE__msg_type,
2275 /* 2257*/ CCD_ID_GMM__ATTACH_REJECT__msg_type,
2276 /* 2258*/ CCD_ID_GMM__ATTACH_REJECT__gmm_cause,
2277 /* 2259*/ CCD_ID_GMM__D_DETACH_REQUEST__msg_type,
2278 /* 2260*/ CCD_ID_GMM__D_DETACH_REQUEST__d_detach_type,
2279 /* 2261*/ CCD_ID_GMM__D_DETACH_REQUEST__force_to_standby,
2280 /* 2262*/ CCD_ID_GMM__D_DETACH_REQUEST__gmm_cause,
2281 /* 2263*/ CCD_ID_GMM__U_DETACH_REQUEST__msg_type,
2282 /* 2264*/ CCD_ID_GMM__U_DETACH_REQUEST__u_detach_type,
2283 /* 2265*/ CCD_ID_GMM__U_DETACH_REQUEST__spare_0,
2284 /* 2266*/ CCD_ID_GMM__U_DETACH_ACCEPT__msg_type,
2285 /* 2267*/ CCD_ID_GMM__D_DETACH_ACCEPT__msg_type,
2286 /* 2268*/ CCD_ID_GMM__D_DETACH_ACCEPT__force_to_standby,
2287 /* 2269*/ CCD_ID_GMM__D_DETACH_ACCEPT__spare_0,
2288 /* 2270*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_REQUEST__msg_type,
2289 /* 2271*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_REQUEST__update_type,
2290 /* 2272*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_REQUEST__ciphering_key_sequence_number,
2291 /* 2273*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_REQUEST__routing_area_identification,
2292 /* 2274*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_REQUEST__ra_cap,
2293 /* 2275*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_REQUEST__p_tmsi_signature,
2294 /* 2276*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_REQUEST__ready_timer,
2295 /* 2277*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_REQUEST__drx_parameter,
2296 /* 2278*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_REQUEST__tmsi_status,
2297 /* 2279*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_ACCEPT__msg_type,
2298 /* 2280*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_ACCEPT__force_to_standby,
2299 /* 2281*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_ACCEPT__result_gmm,
2300 /* 2282*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_ACCEPT__rau_timer,
2301 /* 2283*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_ACCEPT__routing_area_identification,
2302 /* 2284*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_ACCEPT__p_tmsi_signature,
2303 /* 2285*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_ACCEPT__gmobile_identity,
2304 /* 2286*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_ACCEPT__mobile_identity,
2305 /* 2287*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_ACCEPT__receive_n_pdu_number_list,
2306 /* 2288*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_ACCEPT__ready_timer,
2307 /* 2289*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_ACCEPT__gmm_cause,
2308 /* 2290*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_ACCEPT__t3302,
2309 /* 2291*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_ACCEPT__cell_notification,
2310 /* 2292*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_ACCEPT__eqv_plmn_list,
2311 /* 2293*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_COMPLETE__msg_type,
2312 /* 2294*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_COMPLETE__receive_n_pdu_number_list,
2313 /* 2295*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_REJECT__msg_type,
2314 /* 2296*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_REJECT__gmm_cause,
2315 /* 2297*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_REJECT__force_to_standby,
2316 /* 2298*/ CCD_ID_GMM__ROUTING_AREA_UPDATE_REJECT__spare_0,
2317 /* 2299*/ CCD_ID_GMM__P_TMSI_REALLOCATION_COMMAND__msg_type,
2318 /* 2300*/ CCD_ID_GMM__P_TMSI_REALLOCATION_COMMAND__gmobile_identity,
2319 /* 2301*/ CCD_ID_GMM__P_TMSI_REALLOCATION_COMMAND__routing_area_identification,
2320 /* 2302*/ CCD_ID_GMM__P_TMSI_REALLOCATION_COMMAND__force_to_standby,
2321 /* 2303*/ CCD_ID_GMM__P_TMSI_REALLOCATION_COMMAND__spare_0,
2322 /* 2304*/ CCD_ID_GMM__P_TMSI_REALLOCATION_COMMAND__p_tmsi_signature,
2323 /* 2305*/ CCD_ID_GMM__P_TMSI_REALLOCATION_COMPLETE__msg_type,
2324 /* 2306*/ CCD_ID_GMM__AUTHENTICATION_AND_CIPHERING_REQUEST__msg_type,
2325 /* 2307*/ CCD_ID_GMM__AUTHENTICATION_AND_CIPHERING_REQUEST__ciphering_algorithm,
2326 /* 2308*/ CCD_ID_GMM__AUTHENTICATION_AND_CIPHERING_REQUEST__imeisv_request,
2327 /* 2309*/ CCD_ID_GMM__AUTHENTICATION_AND_CIPHERING_REQUEST__force_to_standby,
2328 /* 2310*/ CCD_ID_GMM__AUTHENTICATION_AND_CIPHERING_REQUEST__a_c_reference_number,
2329 /* 2311*/ CCD_ID_GMM__AUTHENTICATION_AND_CIPHERING_REQUEST__authentication_parameter_rand,
2330 /* 2312*/ CCD_ID_GMM__AUTHENTICATION_AND_CIPHERING_REQUEST__ciphering_key_sequence_number,
2331 /* 2313*/ CCD_ID_GMM__AUTHENTICATION_AND_CIPHERING_RESPONSE__msg_type,
2332 /* 2314*/ CCD_ID_GMM__AUTHENTICATION_AND_CIPHERING_RESPONSE__a_c_reference_number,
2333 /* 2315*/ CCD_ID_GMM__AUTHENTICATION_AND_CIPHERING_RESPONSE__spare_0,
2334 /* 2316*/ CCD_ID_GMM__AUTHENTICATION_AND_CIPHERING_RESPONSE__authentication_parameter_sres,
2335 /* 2317*/ CCD_ID_GMM__AUTHENTICATION_AND_CIPHERING_RESPONSE__gmobile_identity,
2336 /* 2318*/ CCD_ID_GMM__AUTHENTICATION_AND_CIPHERING_REJECT__msg_type,
2337 /* 2319*/ CCD_ID_GMM__IDENTITY_REQUEST__msg_type,
2338 /* 2320*/ CCD_ID_GMM__IDENTITY_REQUEST__identity_type_2,
2339 /* 2321*/ CCD_ID_GMM__IDENTITY_REQUEST__force_to_standby,
2340 /* 2322*/ CCD_ID_GMM__IDENTITY_RESPONSE__msg_type,
2341 /* 2323*/ CCD_ID_GMM__IDENTITY_RESPONSE__gmobile_identity,
2342 /* 2324*/ CCD_ID_GMM__GMM_STATUS__msg_type,
2343 /* 2325*/ CCD_ID_GMM__GMM_STATUS__gmm_cause,
2344 /* 2326*/ CCD_ID_GMM__GMM_INFORMATION__msg_type,
2345 /* 2327*/ CCD_ID_GMM__GMM_INFORMATION__full_network_name,
2346 /* 2328*/ CCD_ID_GMM__GMM_INFORMATION__short_network_name,
2347 /* 2329*/ CCD_ID_GMM__GMM_INFORMATION__time_zone,
2348 /* 2330*/ CCD_ID_GMM__GMM_INFORMATION__time_zone_and_time,
2349 /* 2331*/ CCD_ID_TST__pdu_description__spare_0,
2350 /* 2332*/ CCD_ID_TST__pdu_description__no_of_pdus,
2351 /* 2333*/ CCD_ID_TST__pdu_description_ie__pdu_description,
2352 /* 2334*/ CCD_ID_TST__mode_flag__spare_0,
2353 /* 2335*/ CCD_ID_TST__mode_flag__dl_timeslot_offset,
2354 /* 2336*/ CCD_ID_TST__mode_flag__mode_flag_val,
2355 /* 2337*/ CCD_ID_TST__GPRS_TEST_MODE_CMD__msg_type,
2356 /* 2338*/ CCD_ID_TST__GPRS_TEST_MODE_CMD__pdu_description_ie,
2357 /* 2339*/ CCD_ID_TST__GPRS_TEST_MODE_CMD__mode_flag,
2358 /* 2340*/ CCD_ID_GRLC__glob_tfi__flag,
2359 /* 2341*/ CCD_ID_GRLC__glob_tfi__ul_tfi,
2360 /* 2342*/ CCD_ID_GRLC__glob_tfi__dl_tfi,
2361 /* 2343*/ CCD_ID_GRLC__chan_req_des__peak_thr_class,
2362 /* 2344*/ CCD_ID_GRLC__chan_req_des__radio_prio,
2363 /* 2345*/ CCD_ID_GRLC__chan_req_des__rlc_mode,
2364 /* 2346*/ CCD_ID_GRLC__chan_req_des__llc_pdu_type,
2365 /* 2347*/ CCD_ID_GRLC__chan_req_des__rlc_octet_cnt,
2366 /* 2348*/ CCD_ID_GRLC__block_struct__bl_o_bl_per,
2367 /* 2349*/ CCD_ID_GRLC__block_struct__a_map_len,
2368 /* 2350*/ CCD_ID_GRLC__block_struct__alloc_map,
2369 /* 2351*/ CCD_ID_GRLC__ext_bits__ext_len,
2370 /* 2352*/ CCD_ID_GRLC__ext_bits__spare_ext,
2371 /* 2353*/ CCD_ID_GRLC__ilev__ilev0,
2372 /* 2354*/ CCD_ID_GRLC__ilev__ilev1,
2373 /* 2355*/ CCD_ID_GRLC__ilev__ilev2,
2374 /* 2356*/ CCD_ID_GRLC__ilev__ilev3,
2375 /* 2357*/ CCD_ID_GRLC__ilev__ilev4,
2376 /* 2358*/ CCD_ID_GRLC__ilev__ilev5,
2377 /* 2359*/ CCD_ID_GRLC__ilev__ilev6,
2378 /* 2360*/ CCD_ID_GRLC__ilev__ilev7,
2379 /* 2361*/ CCD_ID_GRLC__chan_qual_rep__c_value,
2380 /* 2362*/ CCD_ID_GRLC__chan_qual_rep__rxqual,
2381 /* 2363*/ CCD_ID_GRLC__chan_qual_rep__signvar,
2382 /* 2364*/ CCD_ID_GRLC__chan_qual_rep__ilev,
2383 /* 2365*/ CCD_ID_GRLC__ack_nack_des__f_ack_ind,
2384 /* 2366*/ CCD_ID_GRLC__ack_nack_des__ssn,
2385 /* 2367*/ CCD_ID_GRLC__ack_nack_des__rbb,
2386 /* 2368*/ CCD_ID_GRLC__abs__t1,
2387 /* 2369*/ CCD_ID_GRLC__abs__t3,
2388 /* 2370*/ CCD_ID_GRLC__abs__t2,
2389 /* 2371*/ CCD_ID_GRLC__tbf_s_time__flag,
2390 /* 2372*/ CCD_ID_GRLC__tbf_s_time__rel,
2391 /* 2373*/ CCD_ID_GRLC__tbf_s_time__abs,
2392 /* 2374*/ CCD_ID_GRLC__fa_s2__tbf_s_time,
2393 /* 2375*/ CCD_ID_GRLC__fa_s2__ts_alloc,
2394 /* 2376*/ CCD_ID_GRLC__fa_s2__spare_0,
2395 /* 2377*/ CCD_ID_GRLC__fa_s2__flag,
2396 /* 2378*/ CCD_ID_GRLC__fa_s2__block_struct,
2397 /* 2379*/ CCD_ID_GRLC__fa_s2__alloc_map,
2398 /* 2380*/ CCD_ID_GRLC__f_alloc_ack__final_alloc,
2399 /* 2381*/ CCD_ID_GRLC__f_alloc_ack__flag,
2400 /* 2382*/ CCD_ID_GRLC__f_alloc_ack__ts_overr,
2401 /* 2383*/ CCD_ID_GRLC__f_alloc_ack__fa_s2,
2402 /* 2384*/ CCD_ID_GRLC__gamma_tn__gamma,
2403 /* 2385*/ CCD_ID_GRLC__pwr_par__alpha,
2404 /* 2386*/ CCD_ID_GRLC__pwr_par__gamma_tn,
2405 /* 2387*/ CCD_ID_GRLC__ta_index_tn__ta_index,
2406 /* 2388*/ CCD_ID_GRLC__ta_index_tn__ta_tn,
2407 /* 2389*/ CCD_ID_GRLC__pta__ta_value,
2408 /* 2390*/ CCD_ID_GRLC__pta__ta_index_tn,
2409 /* 2391*/ CCD_ID_GRLC__U_GRLC_RESOURCE_REQ__msg_type,
2410 /* 2392*/ CCD_ID_GRLC__U_GRLC_RESOURCE_REQ__access_type,
2411 /* 2393*/ CCD_ID_GRLC__U_GRLC_RESOURCE_REQ__flag,
2412 /* 2394*/ CCD_ID_GRLC__U_GRLC_RESOURCE_REQ__glob_tfi,
2413 /* 2395*/ CCD_ID_GRLC__U_GRLC_RESOURCE_REQ__tlli_value,
2414 /* 2396*/ CCD_ID_GRLC__U_GRLC_RESOURCE_REQ__ra_cap,
2415 /* 2397*/ CCD_ID_GRLC__U_GRLC_RESOURCE_REQ__chan_req_des,
2416 /* 2398*/ CCD_ID_GRLC__U_GRLC_RESOURCE_REQ__ma_ch_mark,
2417 /* 2399*/ CCD_ID_GRLC__U_GRLC_RESOURCE_REQ__c_value,
2418 /* 2400*/ CCD_ID_GRLC__U_GRLC_RESOURCE_REQ__signvar,
2419 /* 2401*/ CCD_ID_GRLC__U_GRLC_RESOURCE_REQ__ilev,
2420 /* 2402*/ CCD_ID_GRLC__U_GRLC_RESOURCE_REQ__spare_0,
2421 /* 2403*/ CCD_ID_GRLC__U_GRLC_DL_ACK__msg_type,
2422 /* 2404*/ CCD_ID_GRLC__U_GRLC_DL_ACK__dl_tfi,
2423 /* 2405*/ CCD_ID_GRLC__U_GRLC_DL_ACK__ack_nack_des,
2424 /* 2406*/ CCD_ID_GRLC__U_GRLC_DL_ACK__chan_req_des,
2425 /* 2407*/ CCD_ID_GRLC__U_GRLC_DL_ACK__chan_qual_rep,
2426 /* 2408*/ CCD_ID_GRLC__U_GRLC_DL_ACK__spare_0,
2427 /* 2409*/ CCD_ID_GRLC__D_GRLC_UL_ACK__msg_type,
2428 /* 2410*/ CCD_ID_GRLC__D_GRLC_UL_ACK__page_mode,
2429 /* 2411*/ CCD_ID_GRLC__D_GRLC_UL_ACK__spare_0,
2430 /* 2412*/ CCD_ID_GRLC__D_GRLC_UL_ACK__ul_tfi,
2431 /* 2413*/ CCD_ID_GRLC__D_GRLC_UL_ACK__spare_1,
2432 /* 2414*/ CCD_ID_GRLC__D_GRLC_UL_ACK__chan_coding_cmd,
2433 /* 2415*/ CCD_ID_GRLC__D_GRLC_UL_ACK__ack_nack_des,
2434 /* 2416*/ CCD_ID_GRLC__D_GRLC_UL_ACK__cr_tlli,
2435 /* 2417*/ CCD_ID_GRLC__D_GRLC_UL_ACK__pta,
2436 /* 2418*/ CCD_ID_GRLC__D_GRLC_UL_ACK__pwr_par,
2437 /* 2419*/ CCD_ID_GRLC__D_GRLC_UL_ACK__ext_bits,
2438 /* 2420*/ CCD_ID_GRLC__D_GRLC_UL_ACK__f_alloc_ack,
2439 /* 2421*/ CCD_ID_GRLC__D_GRLC_UL_ACK__spare_2,
2440 /* 2422*/ CCD_ID_GRLC__U_GRLC_CTRL_ACK__msg_type,
2441 /* 2423*/ CCD_ID_GRLC__U_GRLC_CTRL_ACK__tlli_value,
2442 /* 2424*/ CCD_ID_GRLC__U_GRLC_CTRL_ACK__pctrl_ack,
2443 /* 2425*/ CCD_ID_GRLC__U_GRLC_CTRL_ACK__spare_0,
2444 /* 2426*/ CCD_ID_GRLC__U_GRLC_UL_DUMMY__msg_type,
2445 /* 2427*/ CCD_ID_GRLC__U_GRLC_UL_DUMMY__tlli_value,
2446 /* 2428*/ CCD_ID_GRLC__U_GRLC_UL_DUMMY__spare_0,
2447 /* 2429*/ CCD_ID_GRR__wait__ind,
2448 /* 2430*/ CCD_ID_GRR__wait__waitsize,
2449 /* 2431*/ CCD_ID_GRR__bts_pwr_ctrl__p0,
2450 /* 2432*/ CCD_ID_GRR__bts_pwr_ctrl__mode,
2451 /* 2433*/ CCD_ID_GRR__bts_pwr_ctrl__pr_mode,
2452 /* 2434*/ CCD_ID_GRR__psi_des__msg_type,
2453 /* 2435*/ CCD_ID_GRR__psi_des__psix_cm,
2454 /* 2436*/ CCD_ID_GRR__psi_des__flag,
2455 /* 2437*/ CCD_ID_GRR__psi_des__psix_cnt,
2456 /* 2438*/ CCD_ID_GRR__psi_des__inst_bitmap,
2457 /* 2439*/ CCD_ID_GRR__psi_des__add_msg_type,
2458 /* 2440*/ CCD_ID_GRR__received_psi__psi_des,
2459 /* 2441*/ CCD_ID_GRR__received_psi__add_msg_type,
2460 /* 2442*/ CCD_ID_GRR__unknown_psi__msg_type,
2461 /* 2443*/ CCD_ID_GRR__unknown_psi__add_msg_type,
2462 /* 2444*/ CCD_ID_GRR__glob_tfi__flag,
2463 /* 2445*/ CCD_ID_GRR__glob_tfi__ul_tfi,
2464 /* 2446*/ CCD_ID_GRR__glob_tfi__dl_tfi,
2465 /* 2447*/ CCD_ID_GRR__add2__flag,
2466 /* 2448*/ CCD_ID_GRR__add2__glob_tfi,
2467 /* 2449*/ CCD_ID_GRR__add2__flag2,
2468 /* 2450*/ CCD_ID_GRR__add2__tlli_value,
2469 /* 2451*/ CCD_ID_GRR__add2__spare_0,
2470 /* 2452*/ CCD_ID_GRR__add2__tqi,
2471 /* 2453*/ CCD_ID_GRR__add1__flag,
2472 /* 2454*/ CCD_ID_GRR__add1__glob_tfi,
2473 /* 2455*/ CCD_ID_GRR__add1__spare_0,
2474 /* 2456*/ CCD_ID_GRR__add1__tlli_value,
2475 /* 2457*/ CCD_ID_GRR__chan_req_des__peak_thr_class,
2476 /* 2458*/ CCD_ID_GRR__chan_req_des__radio_prio,
2477 /* 2459*/ CCD_ID_GRR__chan_req_des__rlc_mode,
2478 /* 2460*/ CCD_ID_GRR__chan_req_des__llc_pdu_type,
2479 /* 2461*/ CCD_ID_GRR__chan_req_des__rlc_octet_cnt,
2480 /* 2462*/ CCD_ID_GRR__gpta__ta_value,
2481 /* 2463*/ CCD_ID_GRR__gpta__flag,
2482 /* 2464*/ CCD_ID_GRR__gpta__ul_ta_index,
2483 /* 2465*/ CCD_ID_GRR__gpta__ul_ta_tn,
2484 /* 2466*/ CCD_ID_GRR__gpta__flag2,
2485 /* 2467*/ CCD_ID_GRR__gpta__dl_ta_index,
2486 /* 2468*/ CCD_ID_GRR__gpta__dl_ta_tn,
2487 /* 2469*/ CCD_ID_GRR__chamge_ma_sub__cm1,
2488 /* 2470*/ CCD_ID_GRR__chamge_ma_sub__cm2,
2489 /* 2471*/ CCD_ID_GRR__indi_encod__maio,
2490 /* 2472*/ CCD_ID_GRR__indi_encod__ma_num,
2491 /* 2473*/ CCD_ID_GRR__indi_encod__chamge_ma_sub,
2492 /* 2474*/ CCD_ID_GRR__di_encod2__maio,
2493 /* 2475*/ CCD_ID_GRR__di_encod2__hsn,
2494 /* 2476*/ CCD_ID_GRR__di_encod2__len_ma_list,
2495 /* 2477*/ CCD_ID_GRR__di_encod2__ma_list,
2496 /* 2478*/ CCD_ID_GRR__block_struct__bl_o_bl_per,
2497 /* 2479*/ CCD_ID_GRR__block_struct__a_map_len,
2498 /* 2480*/ CCD_ID_GRR__block_struct__alloc_map,
2499 /* 2481*/ CCD_ID_GRR__g_pwr_par__alpha,
2500 /* 2482*/ CCD_ID_GRR__g_pwr_par__t_avg_w,
2501 /* 2483*/ CCD_ID_GRR__g_pwr_par__t_avg_t,
2502 /* 2484*/ CCD_ID_GRR__g_pwr_par__pb,
2503 /* 2485*/ CCD_ID_GRR__g_pwr_par__pc_meas_chan,
2504 /* 2486*/ CCD_ID_GRR__g_pwr_par__imeas_chan_list,
2505 /* 2487*/ CCD_ID_GRR__g_pwr_par__n_avg_i,
2506 /* 2488*/ CCD_ID_GRR__pan_struct__dec,
2507 /* 2489*/ CCD_ID_GRR__pan_struct__inc,
2508 /* 2490*/ CCD_ID_GRR__pan_struct__pmax,
2509 /* 2491*/ CCD_ID_GRR__ext_bits__ext_len,
2510 /* 2492*/ CCD_ID_GRR__ext_bits__spare_ext,
2511 /* 2493*/ CCD_ID_GRR__gprs_cell_opt__nmo,
2512 /* 2494*/ CCD_ID_GRR__gprs_cell_opt__t3168,
2513 /* 2495*/ CCD_ID_GRR__gprs_cell_opt__t3192,
2514 /* 2496*/ CCD_ID_GRR__gprs_cell_opt__drx_t_max,
2515 /* 2497*/ CCD_ID_GRR__gprs_cell_opt__ab_type,
2516 /* 2498*/ CCD_ID_GRR__gprs_cell_opt__ctrl_ack_type,
2517 /* 2499*/ CCD_ID_GRR__gprs_cell_opt__bs_cv_max,
2518 /* 2500*/ CCD_ID_GRR__gprs_cell_opt__pan_struct,
2519 /* 2501*/ CCD_ID_GRR__gprs_cell_opt__ext_bits,
2520 /* 2502*/ CCD_ID_GRR__pccch_org_par__bs_pcc_rel,
2521 /* 2503*/ CCD_ID_GRR__pccch_org_par__bs_pbcch_blks,
2522 /* 2504*/ CCD_ID_GRR__pccch_org_par__bs_pag_blks,
2523 /* 2505*/ CCD_ID_GRR__pccch_org_par__bs_prach_blks,
2524 /* 2506*/ CCD_ID_GRR__loc_area_ident__mcc,
2525 /* 2507*/ CCD_ID_GRR__loc_area_ident__mnc,
2526 /* 2508*/ CCD_ID_GRR__loc_area_ident__lac,
2527 /* 2509*/ CCD_ID_GRR__cell_id__loc_area_ident,
2528 /* 2510*/ CCD_ID_GRR__cell_id__rac,
2529 /* 2511*/ CCD_ID_GRR__cell_id__cell_id_ie,
2530 /* 2512*/ CCD_ID_GRR__non_gprs_opt__att,
2531 /* 2513*/ CCD_ID_GRR__non_gprs_opt__t3212,
2532 /* 2514*/ CCD_ID_GRR__non_gprs_opt__neci,
2533 /* 2515*/ CCD_ID_GRR__non_gprs_opt__pwcr,
2534 /* 2516*/ CCD_ID_GRR__non_gprs_opt__dtx,
2535 /* 2517*/ CCD_ID_GRR__non_gprs_opt__rl_timeout,
2536 /* 2518*/ CCD_ID_GRR__non_gprs_opt__bs_ag_blks_res,
2537 /* 2519*/ CCD_ID_GRR__non_gprs_opt__ccch_conf,
2538 /* 2520*/ CCD_ID_GRR__non_gprs_opt__bs_pa_mfrms,
2539 /* 2521*/ CCD_ID_GRR__non_gprs_opt__max_retrans,
2540 /* 2522*/ CCD_ID_GRR__non_gprs_opt__tx_integer,
2541 /* 2523*/ CCD_ID_GRR__non_gprs_opt__ec,
2542 /* 2524*/ CCD_ID_GRR__non_gprs_opt__txpwr_max_cch,
2543 /* 2525*/ CCD_ID_GRR__non_gprs_opt__ext_bits,
2544 /* 2526*/ CCD_ID_GRR__rfl_num_list__rfl_num,
2545 /* 2527*/ CCD_ID_GRR__rfl_cont__flist,
2546 /* 2528*/ CCD_ID_GRR__rfl__rfl_num,
2547 /* 2529*/ CCD_ID_GRR__rfl__rfl_cont_len,
2548 /* 2530*/ CCD_ID_GRR__rfl__rfl_cont,
2549 /* 2531*/ CCD_ID_GRR__cell_alloc__rfl_num,
2550 /* 2532*/ CCD_ID_GRR__ma_struct__ma_len,
2551 /* 2533*/ CCD_ID_GRR__ma_struct__ma_map,
2552 /* 2534*/ CCD_ID_GRR__arfcn_index_list__arfcn_index,
2553 /* 2535*/ CCD_ID_GRR__gprs_ms_alloc_ie__hsn,
2554 /* 2536*/ CCD_ID_GRR__gprs_ms_alloc_ie__rfl_num_list,
2555 /* 2537*/ CCD_ID_GRR__gprs_ms_alloc_ie__flag,
2556 /* 2538*/ CCD_ID_GRR__gprs_ms_alloc_ie__ma_struct,
2557 /* 2539*/ CCD_ID_GRR__gprs_ms_alloc_ie__arfcn_index_list,
2558 /* 2540*/ CCD_ID_GRR__gprs_ms_alloc__ma_num,
2559 /* 2541*/ CCD_ID_GRR__gprs_ms_alloc__gprs_ms_alloc_ie,
2560 /* 2542*/ CCD_ID_GRR__di_encod1__maio,
2561 /* 2543*/ CCD_ID_GRR__di_encod1__gprs_ms_alloc_ie,
2562 /* 2544*/ CCD_ID_GRR__freq_par__tsc,
2563 /* 2545*/ CCD_ID_GRR__freq_par__flag,
2564 /* 2546*/ CCD_ID_GRR__freq_par__flag2,
2565 /* 2547*/ CCD_ID_GRR__freq_par__arfcn,
2566 /* 2548*/ CCD_ID_GRR__freq_par__indi_encod,
2567 /* 2549*/ CCD_ID_GRR__freq_par__di_encod1,
2568 /* 2550*/ CCD_ID_GRR__freq_par__di_encod2,
2569 /* 2551*/ CCD_ID_GRR__pbcch_des__pb,
2570 /* 2552*/ CCD_ID_GRR__pbcch_des__tsc,
2571 /* 2553*/ CCD_ID_GRR__pbcch_des__tn,
2572 /* 2554*/ CCD_ID_GRR__pbcch_des__flag,
2573 /* 2555*/ CCD_ID_GRR__pbcch_des__flag2,
2574 /* 2556*/ CCD_ID_GRR__pbcch_des__arfcn,
2575 /* 2557*/ CCD_ID_GRR__pbcch_des__maio,
2576 /* 2558*/ CCD_ID_GRR__h_pccch_c__maio,
2577 /* 2559*/ CCD_ID_GRR__h_pccch_c__ts_alloc,
2578 /* 2560*/ CCD_ID_GRR__nh_pccch_c__arfcn,
2579 /* 2561*/ CCD_ID_GRR__nh_pccch_c__ts_alloc,
2580 /* 2562*/ CCD_ID_GRR__ma_h_s1__ma_num,
2581 /* 2563*/ CCD_ID_GRR__ma_h_s1__h_pccch_c,
2582 /* 2564*/ CCD_ID_GRR__pccch_des__tsc,
2583 /* 2565*/ CCD_ID_GRR__pccch_des__flag,
2584 /* 2566*/ CCD_ID_GRR__pccch_des__nh_pccch_c,
2585 /* 2567*/ CCD_ID_GRR__pccch_des__ma_h_s1,
2586 /* 2568*/ CCD_ID_GRR__gen_cell_par__gprs_c_hyst,
2587 /* 2569*/ CCD_ID_GRR__gen_cell_par__c31_hyst,
2588 /* 2570*/ CCD_ID_GRR__gen_cell_par__c32_qual,
2589 /* 2571*/ CCD_ID_GRR__gen_cell_par__ra_retry,
2590 /* 2572*/ CCD_ID_GRR__gen_cell_par__t_resel,
2591 /* 2573*/ CCD_ID_GRR__gen_cell_par__ra_re_hyst,
2592 /* 2574*/ CCD_ID_GRR__hcs_par__gprs_prio_class,
2593 /* 2575*/ CCD_ID_GRR__hcs_par__gprs_hcs_thr,
2594 /* 2576*/ CCD_ID_GRR__scell_par__cell_ba,
2595 /* 2577*/ CCD_ID_GRR__scell_par__exc_acc,
2596 /* 2578*/ CCD_ID_GRR__scell_par__gprs_rxlev_access_min,
2597 /* 2579*/ CCD_ID_GRR__scell_par__txpwr_max_cch,
2598 /* 2580*/ CCD_ID_GRR__scell_par__hcs_par,
2599 /* 2581*/ CCD_ID_GRR__scell_par__multi_band_rep,
2600 /* 2582*/ CCD_ID_GRR__si13_pbcch_s1__pbcch_loc,
2601 /* 2583*/ CCD_ID_GRR__si13_pbcch_s1__psi1_rep_per,
2602 /* 2584*/ CCD_ID_GRR__si13_pbcch__flag,
2603 /* 2585*/ CCD_ID_GRR__si13_pbcch__si13_loc,
2604 /* 2586*/ CCD_ID_GRR__si13_pbcch__si13_pbcch_s1,
2605 /* 2587*/ CCD_ID_GRR__cs_par_s1__gprs_rxlev_access_min,
2606 /* 2588*/ CCD_ID_GRR__cs_par_s1__txpwr_max_cch,
2607 /* 2589*/ CCD_ID_GRR__cs_par_s2__gprs_temp_offset,
2608 /* 2590*/ CCD_ID_GRR__cs_par_s2__gprs_penalty_time,
2609 /* 2591*/ CCD_ID_GRR__cs_par__cell_ba,
2610 /* 2592*/ CCD_ID_GRR__cs_par__exc_acc,
2611 /* 2593*/ CCD_ID_GRR__cs_par__same_ra_scell,
2612 /* 2594*/ CCD_ID_GRR__cs_par__cs_par_s1,
2613 /* 2595*/ CCD_ID_GRR__cs_par__cs_par_s2,
2614 /* 2596*/ CCD_ID_GRR__cs_par__gprs_resel_off,
2615 /* 2597*/ CCD_ID_GRR__cs_par__hcs_par,
2616 /* 2598*/ CCD_ID_GRR__cs_par__si13_pbcch,
2617 /* 2599*/ CCD_ID_GRR__ncell_par2_set__ncc,
2618 /* 2600*/ CCD_ID_GRR__ncell_par2_set__exc_acc,
2619 /* 2601*/ CCD_ID_GRR__ncell_par2_set__gprs_rxlev_access_min,
2620 /* 2602*/ CCD_ID_GRR__ncell_par2_set__txpwr_max_cch,
2621 /* 2603*/ CCD_ID_GRR__ncell_par2_set__gprs_prio_class,
2622 /* 2604*/ CCD_ID_GRR__ncell_par2_set__gprs_hcs_thr,
2623 /* 2605*/ CCD_ID_GRR__ncell_par2_set__si13_pbcch,
2624 /* 2606*/ CCD_ID_GRR__ncell_par2_set__gprs_temp_offset,
2625 /* 2607*/ CCD_ID_GRR__ncell_par2_set__gprs_penalty_time,
2626 /* 2608*/ CCD_ID_GRR__ncell_par2_set__gprs_resel_off,
2627 /* 2609*/ CCD_ID_GRR__ma_num_maio__ma_num,
2628 /* 2610*/ CCD_ID_GRR__ma_num_maio__maio,
2629 /* 2611*/ CCD_ID_GRR__chan_group__flag,
2630 /* 2612*/ CCD_ID_GRR__chan_group__arfcn,
2631 /* 2613*/ CCD_ID_GRR__chan_group__ma_num_maio,
2632 /* 2614*/ CCD_ID_GRR__chan_group__ts_alloc,
2633 /* 2615*/ CCD_ID_GRR__chan_list2__chan_group,
2634 /* 2616*/ CCD_ID_GRR__chan_list_imeas__chan_group,
2635 /* 2617*/ CCD_ID_GRR__chan_list_imeas__chan_list2,
2636 /* 2618*/ CCD_ID_GRR__list_rf__num_rfreq,
2637 /* 2619*/ CCD_ID_GRR__list_rf__rfreq_index,
2638 /* 2620*/ CCD_ID_GRR__si13_cm_gprs_alloc__si13_cm,
2639 /* 2621*/ CCD_ID_GRR__si13_cm_gprs_alloc__gprs_ms_alloc_ie,
2640 /* 2622*/ CCD_ID_GRR__psi13_pwr_par__alpha,
2641 /* 2623*/ CCD_ID_GRR__psi13_pwr_par__t_avg_w,
2642 /* 2624*/ CCD_ID_GRR__psi13_pwr_par__t_avg_t,
2643 /* 2625*/ CCD_ID_GRR__psi13_pwr_par__pc_meas_chan,
2644 /* 2626*/ CCD_ID_GRR__psi13_pwr_par__n_avg_i,
2645 /* 2627*/ CCD_ID_GRR__pbcch_n_pres__rac,
2646 /* 2628*/ CCD_ID_GRR__pbcch_n_pres__spgc_ccch_sup,
2647 /* 2629*/ CCD_ID_GRR__pbcch_n_pres__prio_acc_thr,
2648 /* 2630*/ CCD_ID_GRR__pbcch_n_pres__ctrl_order,
2649 /* 2631*/ CCD_ID_GRR__pbcch_n_pres__gprs_cell_opt,
2650 /* 2632*/ CCD_ID_GRR__pbcch_n_pres__psi13_pwr_par,
2651 /* 2633*/ CCD_ID_GRR__nc_meas_s1__freq_n,
2652 /* 2634*/ CCD_ID_GRR__nc_meas_s1__bsic,
2653 /* 2635*/ CCD_ID_GRR__nc_meas_s1__rxlev_n,
2654 /* 2636*/ CCD_ID_GRR__nc_meas_rep__nc_mode,
2655 /* 2637*/ CCD_ID_GRR__nc_meas_rep__rxlev_scell,
2656 /* 2638*/ CCD_ID_GRR__nc_meas_rep__i_scell,
2657 /* 2639*/ CCD_ID_GRR__nc_meas_rep__num_nc_meas,
2658 /* 2640*/ CCD_ID_GRR__nc_meas_rep__nc_meas_s1,
2659 /* 2641*/ CCD_ID_GRR__ilev__ilev0,
2660 /* 2642*/ CCD_ID_GRR__ilev__ilev1,
2661 /* 2643*/ CCD_ID_GRR__ilev__ilev2,
2662 /* 2644*/ CCD_ID_GRR__ilev__ilev3,
2663 /* 2645*/ CCD_ID_GRR__ilev__ilev4,
2664 /* 2646*/ CCD_ID_GRR__ilev__ilev5,
2665 /* 2647*/ CCD_ID_GRR__ilev__ilev6,
2666 /* 2648*/ CCD_ID_GRR__ilev__ilev7,
2667 /* 2649*/ CCD_ID_GRR__chan_qual_rep__c_value,
2668 /* 2650*/ CCD_ID_GRR__chan_qual_rep__rxqual,
2669 /* 2651*/ CCD_ID_GRR__chan_qual_rep__signvar,
2670 /* 2652*/ CCD_ID_GRR__chan_qual_rep__ilev,
2671 /* 2653*/ CCD_ID_GRR__ilev_abs__ilevabs0,
2672 /* 2654*/ CCD_ID_GRR__ilev_abs__ilevabs1,
2673 /* 2655*/ CCD_ID_GRR__ilev_abs__ilevabs2,
2674 /* 2656*/ CCD_ID_GRR__ilev_abs__ilevabs3,
2675 /* 2657*/ CCD_ID_GRR__ilev_abs__ilevabs4,
2676 /* 2658*/ CCD_ID_GRR__ilev_abs__ilevabs5,
2677 /* 2659*/ CCD_ID_GRR__ilev_abs__ilevabs6,
2678 /* 2660*/ CCD_ID_GRR__ilev_abs__ilevabs7,
2679 /* 2661*/ CCD_ID_GRR__ext_mp_s1__freq_n,
2680 /* 2662*/ CCD_ID_GRR__ext_mp_s1__bsic,
2681 /* 2663*/ CCD_ID_GRR__ext_mp_s1__rxlev_n,
2682 /* 2664*/ CCD_ID_GRR__xmeas_rep__xrep_type,
2683 /* 2665*/ CCD_ID_GRR__xmeas_rep__ilev_abs,
2684 /* 2666*/ CCD_ID_GRR__xmeas_rep__num_meas,
2685 /* 2667*/ CCD_ID_GRR__xmeas_rep__ext_mp_s1,
2686 /* 2668*/ CCD_ID_GRR__tn_alloc__usf,
2687 /* 2669*/ CCD_ID_GRR__usf_g__usf,
2688 /* 2670*/ CCD_ID_GRR__usf_g__gamma,
2689 /* 2671*/ CCD_ID_GRR__pers_lev__plev,
2690 /* 2672*/ CCD_ID_GRR__prach_ctrl_par__ac_class,
2691 /* 2673*/ CCD_ID_GRR__prach_ctrl_par__max_retrans,
2692 /* 2674*/ CCD_ID_GRR__prach_ctrl_par__s_prach,
2693 /* 2675*/ CCD_ID_GRR__prach_ctrl_par__tx_int,
2694 /* 2676*/ CCD_ID_GRR__prach_ctrl_par__pers_lev,
2695 /* 2677*/ CCD_ID_GRR__ack_nack_des__f_ack_ind,
2696 /* 2678*/ CCD_ID_GRR__ack_nack_des__ssn,
2697 /* 2679*/ CCD_ID_GRR__ack_nack_des__rbb,
2698 /* 2680*/ CCD_ID_GRR__ms_id__ms_id_len,
2699 /* 2681*/ CCD_ID_GRR__ms_id__ident_digit,
2700 /* 2682*/ CCD_ID_GRR__rep_page_s2__flag,
2701 /* 2683*/ CCD_ID_GRR__rep_page_s2__tmsi_field,
2702 /* 2684*/ CCD_ID_GRR__rep_page_s2__ms_id,
2703 /* 2685*/ CCD_ID_GRR__rep_page_s2__chan_need,
2704 /* 2686*/ CCD_ID_GRR__rep_page_s2__emlpp_prio,
2705 /* 2687*/ CCD_ID_GRR__rep_page_s1__flag,
2706 /* 2688*/ CCD_ID_GRR__rep_page_s1__ptmsi,
2707 /* 2689*/ CCD_ID_GRR__rep_page_s1__ms_id,
2708 /* 2690*/ CCD_ID_GRR__rep_page_info__flag,
2709 /* 2691*/ CCD_ID_GRR__rep_page_info__rep_page_s1,
2710 /* 2692*/ CCD_ID_GRR__rep_page_info__rep_page_s2,
2711 /* 2693*/ CCD_ID_GRR__abs__t1,
2712 /* 2694*/ CCD_ID_GRR__abs__t3,
2713 /* 2695*/ CCD_ID_GRR__abs__t2,
2714 /* 2696*/ CCD_ID_GRR__tbf_s_time__flag,
2715 /* 2697*/ CCD_ID_GRR__tbf_s_time__rel,
2716 /* 2698*/ CCD_ID_GRR__tbf_s_time__abs,
2717 /* 2699*/ CCD_ID_GRR__meas_map__meas_start_grr,
2718 /* 2700*/ CCD_ID_GRR__meas_map__meas_inter,
2719 /* 2701*/ CCD_ID_GRR__meas_map__meas_bitmap,
2720 /* 2702*/ CCD_ID_GRR__fa_s2__tbf_s_time,
2721 /* 2703*/ CCD_ID_GRR__fa_s2__ts_alloc,
2722 /* 2704*/ CCD_ID_GRR__fa_s2__spare_0,
2723 /* 2705*/ CCD_ID_GRR__fa_s2__flag,
2724 /* 2706*/ CCD_ID_GRR__fa_s2__block_struct,
2725 /* 2707*/ CCD_ID_GRR__fa_s2__alloc_map,
2726 /* 2708*/ CCD_ID_GRR__f_alloc_ack__final_alloc,
2727 /* 2709*/ CCD_ID_GRR__f_alloc_ack__flag,
2728 /* 2710*/ CCD_ID_GRR__f_alloc_ack__ts_overr,
2729 /* 2711*/ CCD_ID_GRR__f_alloc_ack__fa_s2,
2730 /* 2712*/ CCD_ID_GRR__req_ref_p__access_info,
2731 /* 2713*/ CCD_ID_GRR__req_ref_p__fn_mod,
2732 /* 2714*/ CCD_ID_GRR__add3__flag,
2733 /* 2715*/ CCD_ID_GRR__add3__glob_tfi,
2734 /* 2716*/ CCD_ID_GRR__add3__flag2,
2735 /* 2717*/ CCD_ID_GRR__add3__tlli_value,
2736 /* 2718*/ CCD_ID_GRR__add3__flag3,
2737 /* 2719*/ CCD_ID_GRR__add3__tqi,
2738 /* 2720*/ CCD_ID_GRR__add3__req_ref_p,
2739 /* 2721*/ CCD_ID_GRR__req_ref_tfi__flag,
2740 /* 2722*/ CCD_ID_GRR__req_ref_tfi__req_ref_p,
2741 /* 2723*/ CCD_ID_GRR__req_ref_tfi__glob_tfi,
2742 /* 2724*/ CCD_ID_GRR__reject__flag,
2743 /* 2725*/ CCD_ID_GRR__reject__tlli_value,
2744 /* 2726*/ CCD_ID_GRR__reject__req_ref_tfi,
2745 /* 2727*/ CCD_ID_GRR__reject__wait,
2746 /* 2728*/ CCD_ID_GRR__gamma_tn__gamma,
2747 /* 2729*/ CCD_ID_GRR__pwr_par__alpha,
2748 /* 2730*/ CCD_ID_GRR__pwr_par__gamma_tn,
2749 /* 2731*/ CCD_ID_GRR__f_alloc_ul__ul_tfi_assign,
2750 /* 2732*/ CCD_ID_GRR__f_alloc_ul__final_alloc,
2751 /* 2733*/ CCD_ID_GRR__f_alloc_ul__dl_ctrl_ts,
2752 /* 2734*/ CCD_ID_GRR__f_alloc_ul__bts_pwr_ctrl,
2753 /* 2735*/ CCD_ID_GRR__f_alloc_ul__flag,
2754 /* 2736*/ CCD_ID_GRR__f_alloc_ul__ts_alloc,
2755 /* 2737*/ CCD_ID_GRR__f_alloc_ul__pwr_par,
2756 /* 2738*/ CCD_ID_GRR__f_alloc_ul__half_dupelx,
2757 /* 2739*/ CCD_ID_GRR__f_alloc_ul__tbf_s_time,
2758 /* 2740*/ CCD_ID_GRR__f_alloc_ul__spare_0,
2759 /* 2741*/ CCD_ID_GRR__f_alloc_ul__flag2,
2760 /* 2742*/ CCD_ID_GRR__f_alloc_ul__block_struct,
2761 /* 2743*/ CCD_ID_GRR__f_alloc_ul__alloc_map,
2762 /* 2744*/ CCD_ID_GRR__f_alloc_re__flag,
2763 /* 2745*/ CCD_ID_GRR__f_alloc_re__ul_ts_alloc,
2764 /* 2746*/ CCD_ID_GRR__f_alloc_re__pwr_par,
2765 /* 2747*/ CCD_ID_GRR__f_alloc_re__final_alloc,
2766 /* 2748*/ CCD_ID_GRR__f_alloc_re__dl_ctrl_ts,
2767 /* 2749*/ CCD_ID_GRR__f_alloc_re__bts_pwr_ctrl,
2768 /* 2750*/ CCD_ID_GRR__f_alloc_re__meas_map,
2769 /* 2751*/ CCD_ID_GRR__f_alloc_re__tbf_s_time,
2770 /* 2752*/ CCD_ID_GRR__f_alloc_re__spare_0,
2771 /* 2753*/ CCD_ID_GRR__f_alloc_re__flag2,
2772 /* 2754*/ CCD_ID_GRR__f_alloc_re__block_struct,
2773 /* 2755*/ CCD_ID_GRR__f_alloc_re__alloc_map,
2774 /* 2756*/ CCD_ID_GRR__usf_array__usf_g,
2775 /* 2757*/ CCD_ID_GRR__tn_alloc_pwr__alpha,
2776 /* 2758*/ CCD_ID_GRR__tn_alloc_pwr__usf_array,
2777 /* 2759*/ CCD_ID_GRR__dyn_alloc_p__xdyn_alloc,
2778 /* 2760*/ CCD_ID_GRR__dyn_alloc_p__flag2,
2779 /* 2761*/ CCD_ID_GRR__dyn_alloc_p__p0,
2780 /* 2762*/ CCD_ID_GRR__dyn_alloc_p__pr_mode,
2781 /* 2763*/ CCD_ID_GRR__dyn_alloc_p__usf_grant,
2782 /* 2764*/ CCD_ID_GRR__dyn_alloc_p__ul_tfi_assign,
2783 /* 2765*/ CCD_ID_GRR__dyn_alloc_p__rlc_db_granted,
2784 /* 2766*/ CCD_ID_GRR__dyn_alloc_p__tbf_s_time,
2785 /* 2767*/ CCD_ID_GRR__dyn_alloc_p__flag,
2786 /* 2768*/ CCD_ID_GRR__dyn_alloc_p__tn_alloc,
2787 /* 2769*/ CCD_ID_GRR__dyn_alloc_p__tn_alloc_pwr,
2788 /* 2770*/ CCD_ID_GRR__alf_gam__alpha,
2789 /* 2771*/ CCD_ID_GRR__alf_gam__gamma,
2790 /* 2772*/ CCD_ID_GRR__sin_alloc__tn,
2791 /* 2773*/ CCD_ID_GRR__sin_alloc__alf_gam,
2792 /* 2774*/ CCD_ID_GRR__sin_alloc__bts_pwr_ctrl,
2793 /* 2775*/ CCD_ID_GRR__sin_alloc__tbf_s_time,
2794 /* 2776*/ CCD_ID_GRR__freq_diff_struct__freq_diff,
2795 /* 2777*/ CCD_ID_GRR__xfreq_list__start_freq,
2796 /* 2778*/ CCD_ID_GRR__xfreq_list__nr_freq,
2797 /* 2779*/ CCD_ID_GRR__xfreq_list__freq_diff_len,
2798 /* 2780*/ CCD_ID_GRR__xfreq_list__freq_diff_struct,
2799 /* 2781*/ CCD_ID_GRR__em1__flag,
2800 /* 2782*/ CCD_ID_GRR__em1__xrep_type,
2801 /* 2783*/ CCD_ID_GRR__em1__ncc_permitted,
2802 /* 2784*/ CCD_ID_GRR__em1__flag2,
2803 /* 2785*/ CCD_ID_GRR__em1__int_freq,
2804 /* 2786*/ CCD_ID_GRR__em1__xrep_per,
2805 /* 2787*/ CCD_ID_GRR__em1__xfreq_list,
2806 /* 2788*/ CCD_ID_GRR__em1__xfreq_list2,
2807 /* 2789*/ CCD_ID_GRR__xmeas_par__xmeas_order,
2808 /* 2790*/ CCD_ID_GRR__xmeas_par__em1,
2809 /* 2791*/ CCD_ID_GRR__ncell_par_rest__freq_diff_struct,
2810 /* 2792*/ CCD_ID_GRR__ncell_par_rest__bsic,
2811 /* 2793*/ CCD_ID_GRR__ncell_par_rest__cs_par,
2812 /* 2794*/ CCD_ID_GRR__ncell_par__start_freq,
2813 /* 2795*/ CCD_ID_GRR__ncell_par__bsic,
2814 /* 2796*/ CCD_ID_GRR__ncell_par__cs_par,
2815 /* 2797*/ CCD_ID_GRR__ncell_par__n_rest,
2816 /* 2798*/ CCD_ID_GRR__ncell_par__freq_diff_len,
2817 /* 2799*/ CCD_ID_GRR__ncell_par__ncell_par_rest,
2818 /* 2800*/ CCD_ID_GRR__ncell_par2_s2__freq_diff_struct,
2819 /* 2801*/ CCD_ID_GRR__ncell_par2_s2__same_ra_scell,
2820 /* 2802*/ CCD_ID_GRR__ncell_par2_s2__cell_ba,
2821 /* 2803*/ CCD_ID_GRR__ncell_par2_s2__bcc,
2822 /* 2804*/ CCD_ID_GRR__ncell_par2_s1__start_freq,
2823 /* 2805*/ CCD_ID_GRR__ncell_par2_s1__same_ra_scell,
2824 /* 2806*/ CCD_ID_GRR__ncell_par2_s1__cell_ba,
2825 /* 2807*/ CCD_ID_GRR__ncell_par2_s1__bcc,
2826 /* 2808*/ CCD_ID_GRR__ncell_par2_s1__n_r_cells,
2827 /* 2809*/ CCD_ID_GRR__ncell_par2_s1__freq_diff_len,
2828 /* 2810*/ CCD_ID_GRR__ncell_par2_s1__ncell_par2_s2,
2829 /* 2811*/ CCD_ID_GRR__ncell_par2_des__ncell_par2_s1,
2830 /* 2812*/ CCD_ID_GRR__ncell_par2_des__para_ptr,
2831 /* 2813*/ CCD_ID_GRR__ncell_par2__generation,
2832 /* 2814*/ CCD_ID_GRR__ncell_par2__ncell_par2_des,
2833 /* 2815*/ CCD_ID_GRR__ncell_par2__ncell_par2_set,
2834 /* 2816*/ CCD_ID_GRR__afreq_s__freq_diff_struct,
2835 /* 2817*/ CCD_ID_GRR__afreq_s__bsic,
2836 /* 2818*/ CCD_ID_GRR__afreq_s__cs_par,
2837 /* 2819*/ CCD_ID_GRR__list_af__start_freq,
2838 /* 2820*/ CCD_ID_GRR__list_af__bsic,
2839 /* 2821*/ CCD_ID_GRR__list_af__cs_par,
2840 /* 2822*/ CCD_ID_GRR__list_af__nr_freq,
2841 /* 2823*/ CCD_ID_GRR__list_af__freq_diff_len,
2842 /* 2824*/ CCD_ID_GRR__list_af__afreq_s,
2843 /* 2825*/ CCD_ID_GRR__nc_freq_list__list_rf,
2844 /* 2826*/ CCD_ID_GRR__nc_freq_list__list_af,
2845 /* 2827*/ CCD_ID_GRR__dyn_alloc_ts__xdyn_alloc,
2846 /* 2828*/ CCD_ID_GRR__dyn_alloc_ts__flag2,
2847 /* 2829*/ CCD_ID_GRR__dyn_alloc_ts__p0,
2848 /* 2830*/ CCD_ID_GRR__dyn_alloc_ts__pr_mode,
2849 /* 2831*/ CCD_ID_GRR__dyn_alloc_ts__usf_grant,
2850 /* 2832*/ CCD_ID_GRR__dyn_alloc_ts__rlc_db_granted,
2851 /* 2833*/ CCD_ID_GRR__dyn_alloc_ts__tbf_s_time,
2852 /* 2834*/ CCD_ID_GRR__dyn_alloc_ts__flag,
2853 /* 2835*/ CCD_ID_GRR__dyn_alloc_ts__tn_alloc,
2854 /* 2836*/ CCD_ID_GRR__dyn_alloc_ts__tn_alloc_pwr,
2855 /* 2837*/ CCD_ID_GRR__ta_index_tn__ta_index,
2856 /* 2838*/ CCD_ID_GRR__ta_index_tn__ta_tn,
2857 /* 2839*/ CCD_ID_GRR__pta__ta_value,
2858 /* 2840*/ CCD_ID_GRR__pta__ta_index_tn,
2859 /* 2841*/ CCD_ID_GRR__psi1_pbcch_info__psi1_rep_per,
2860 /* 2842*/ CCD_ID_GRR__psi1_pbcch_info__pbcch_des,
2861 /* 2843*/ CCD_ID_GRR__nc_meas_per__non_drx_per,
2862 /* 2844*/ CCD_ID_GRR__nc_meas_per__rep_per_i,
2863 /* 2845*/ CCD_ID_GRR__nc_meas_per__rep_per_t,
2864 /* 2846*/ CCD_ID_GRR__nc_meas_par__ctrl_order,
2865 /* 2847*/ CCD_ID_GRR__nc_meas_par__nc_meas_per,
2866 /* 2848*/ CCD_ID_GRR__nc_meas_par_list__nc_meas_par,
2867 /* 2849*/ CCD_ID_GRR__nc_meas_par_list__nc_freq_list,
2868 /* 2850*/ CCD_ID_GRR__D_ACCESS_REJ__msg_type,
2869 /* 2851*/ CCD_ID_GRR__D_ACCESS_REJ__page_mode,
2870 /* 2852*/ CCD_ID_GRR__D_ACCESS_REJ__reject,
2871 /* 2853*/ CCD_ID_GRR__D_ACCESS_REJ__add_reject,
2872 /* 2854*/ CCD_ID_GRR__D_ACCESS_REJ__spare_0,
2873 /* 2855*/ CCD_ID_GRR__D_QUEUING_NOT__msg_type,
2874 /* 2856*/ CCD_ID_GRR__D_QUEUING_NOT__page_mode,
2875 /* 2857*/ CCD_ID_GRR__D_QUEUING_NOT__spare_0,
2876 /* 2858*/ CCD_ID_GRR__D_QUEUING_NOT__req_ref_p,
2877 /* 2859*/ CCD_ID_GRR__D_QUEUING_NOT__tqi,
2878 /* 2860*/ CCD_ID_GRR__D_QUEUING_NOT__spare_1,
2879 /* 2861*/ CCD_ID_GRR__U_RESOURCE_REQ__msg_type,
2880 /* 2862*/ CCD_ID_GRR__U_RESOURCE_REQ__access_type,
2881 /* 2863*/ CCD_ID_GRR__U_RESOURCE_REQ__flag,
2882 /* 2864*/ CCD_ID_GRR__U_RESOURCE_REQ__glob_tfi,
2883 /* 2865*/ CCD_ID_GRR__U_RESOURCE_REQ__tlli_value,
2884 /* 2866*/ CCD_ID_GRR__U_RESOURCE_REQ__ra_cap,
2885 /* 2867*/ CCD_ID_GRR__U_RESOURCE_REQ__chan_req_des,
2886 /* 2868*/ CCD_ID_GRR__U_RESOURCE_REQ__ma_ch_mark,
2887 /* 2869*/ CCD_ID_GRR__U_RESOURCE_REQ__c_value,
2888 /* 2870*/ CCD_ID_GRR__U_RESOURCE_REQ__signvar,
2889 /* 2871*/ CCD_ID_GRR__U_RESOURCE_REQ__ilev,
2890 /* 2872*/ CCD_ID_GRR__U_RESOURCE_REQ__spare_0,
2891 /* 2873*/ CCD_ID_GRR__D_UL_ASSIGN__msg_type,
2892 /* 2874*/ CCD_ID_GRR__D_UL_ASSIGN__page_mode,
2893 /* 2875*/ CCD_ID_GRR__D_UL_ASSIGN__pers_lev,
2894 /* 2876*/ CCD_ID_GRR__D_UL_ASSIGN__add3,
2895 /* 2877*/ CCD_ID_GRR__D_UL_ASSIGN__spare_0,
2896 /* 2878*/ CCD_ID_GRR__D_UL_ASSIGN__chan_coding_cmd,
2897 /* 2879*/ CCD_ID_GRR__D_UL_ASSIGN__tlli_chan_coding,
2898 /* 2880*/ CCD_ID_GRR__D_UL_ASSIGN__pta,
2899 /* 2881*/ CCD_ID_GRR__D_UL_ASSIGN__freq_par,
2900 /* 2882*/ CCD_ID_GRR__D_UL_ASSIGN__flag,
2901 /* 2883*/ CCD_ID_GRR__D_UL_ASSIGN__flag2,
2902 /* 2884*/ CCD_ID_GRR__D_UL_ASSIGN__dyn_alloc_p,
2903 /* 2885*/ CCD_ID_GRR__D_UL_ASSIGN__sin_alloc,
2904 /* 2886*/ CCD_ID_GRR__D_UL_ASSIGN__f_alloc_ul,
2905 /* 2887*/ CCD_ID_GRR__D_UL_ASSIGN__spare_1,
2906 /* 2888*/ CCD_ID_GRR__D_DL_ASSIGN__msg_type,
2907 /* 2889*/ CCD_ID_GRR__D_DL_ASSIGN__page_mode,
2908 /* 2890*/ CCD_ID_GRR__D_DL_ASSIGN__pers_lev,
2909 /* 2891*/ CCD_ID_GRR__D_DL_ASSIGN__add1,
2910 /* 2892*/ CCD_ID_GRR__D_DL_ASSIGN__spare_0,
2911 /* 2893*/ CCD_ID_GRR__D_DL_ASSIGN__mac_mode,
2912 /* 2894*/ CCD_ID_GRR__D_DL_ASSIGN__rlc_mode,
2913 /* 2895*/ CCD_ID_GRR__D_DL_ASSIGN__ctrl_ack,
2914 /* 2896*/ CCD_ID_GRR__D_DL_ASSIGN__ts_alloc,
2915 /* 2897*/ CCD_ID_GRR__D_DL_ASSIGN__pta,
2916 /* 2898*/ CCD_ID_GRR__D_DL_ASSIGN__bts_pwr_ctrl,
2917 /* 2899*/ CCD_ID_GRR__D_DL_ASSIGN__freq_par,
2918 /* 2900*/ CCD_ID_GRR__D_DL_ASSIGN__dl_tfi_assign,
2919 /* 2901*/ CCD_ID_GRR__D_DL_ASSIGN__pwr_par,
2920 /* 2902*/ CCD_ID_GRR__D_DL_ASSIGN__tbf_s_time,
2921 /* 2903*/ CCD_ID_GRR__D_DL_ASSIGN__meas_map,
2922 /* 2904*/ CCD_ID_GRR__D_DL_ASSIGN__spare_1,
2923 /* 2905*/ CCD_ID_GRR__D_TBF_RELEASE__msg_type,
2924 /* 2906*/ CCD_ID_GRR__D_TBF_RELEASE__page_mode,
2925 /* 2907*/ CCD_ID_GRR__D_TBF_RELEASE__spare_0,
2926 /* 2908*/ CCD_ID_GRR__D_TBF_RELEASE__glob_tfi,
2927 /* 2909*/ CCD_ID_GRR__D_TBF_RELEASE__ul_release,
2928 /* 2910*/ CCD_ID_GRR__D_TBF_RELEASE__dl_release,
2929 /* 2911*/ CCD_ID_GRR__D_TBF_RELEASE__rel_cause,
2930 /* 2912*/ CCD_ID_GRR__D_TBF_RELEASE__spare_1,
2931 /* 2913*/ CCD_ID_GRR__D_PAGING_REQ__msg_type,
2932 /* 2914*/ CCD_ID_GRR__D_PAGING_REQ__page_mode,
2933 /* 2915*/ CCD_ID_GRR__D_PAGING_REQ__pers_lev,
2934 /* 2916*/ CCD_ID_GRR__D_PAGING_REQ__nln,
2935 /* 2917*/ CCD_ID_GRR__D_PAGING_REQ__rep_page_info,
2936 /* 2918*/ CCD_ID_GRR__D_PAGING_REQ__spare_0,
2937 /* 2919*/ CCD_ID_GRR__U_DL_ACK__msg_type,
2938 /* 2920*/ CCD_ID_GRR__U_DL_ACK__dl_tfi,
2939 /* 2921*/ CCD_ID_GRR__U_DL_ACK__ack_nack_des,
2940 /* 2922*/ CCD_ID_GRR__U_DL_ACK__chan_req_des,
2941 /* 2923*/ CCD_ID_GRR__U_DL_ACK__chan_qual_rep,
2942 /* 2924*/ CCD_ID_GRR__U_DL_ACK__spare_0,
2943 /* 2925*/ CCD_ID_GRR__D_UL_ACK__msg_type,
2944 /* 2926*/ CCD_ID_GRR__D_UL_ACK__page_mode,
2945 /* 2927*/ CCD_ID_GRR__D_UL_ACK__spare_0,
2946 /* 2928*/ CCD_ID_GRR__D_UL_ACK__ul_tfi,
2947 /* 2929*/ CCD_ID_GRR__D_UL_ACK__spare_1,
2948 /* 2930*/ CCD_ID_GRR__D_UL_ACK__chan_coding_cmd,
2949 /* 2931*/ CCD_ID_GRR__D_UL_ACK__ack_nack_des,
2950 /* 2932*/ CCD_ID_GRR__D_UL_ACK__cr_tlli,
2951 /* 2933*/ CCD_ID_GRR__D_UL_ACK__pta,
2952 /* 2934*/ CCD_ID_GRR__D_UL_ACK__pwr_par,
2953 /* 2935*/ CCD_ID_GRR__D_UL_ACK__ext_bits,
2954 /* 2936*/ CCD_ID_GRR__D_UL_ACK__f_alloc_ack,
2955 /* 2937*/ CCD_ID_GRR__D_UL_ACK__spare_2,
2956 /* 2938*/ CCD_ID_GRR__PSI_1__msg_type,
2957 /* 2939*/ CCD_ID_GRR__PSI_1__page_mode,
2958 /* 2940*/ CCD_ID_GRR__PSI_1__pbcch_change_ma,
2959 /* 2941*/ CCD_ID_GRR__PSI_1__psi_change_field,
2960 /* 2942*/ CCD_ID_GRR__PSI_1__psi1_rep_per,
2961 /* 2943*/ CCD_ID_GRR__PSI_1__psi_cnt_lr,
2962 /* 2944*/ CCD_ID_GRR__PSI_1__psi_cnt_hr,
2963 /* 2945*/ CCD_ID_GRR__PSI_1__meas_order,
2964 /* 2946*/ CCD_ID_GRR__PSI_1__gprs_cell_opt,
2965 /* 2947*/ CCD_ID_GRR__PSI_1__prach_ctrl_par,
2966 /* 2948*/ CCD_ID_GRR__PSI_1__pccch_org_par,
2967 /* 2949*/ CCD_ID_GRR__PSI_1__g_pwr_par,
2968 /* 2950*/ CCD_ID_GRR__PSI_1__psi_status_ind,
2969 /* 2951*/ CCD_ID_GRR__PSI_1__spare_0,
2970 /* 2952*/ CCD_ID_GRR__PSI_2__msg_type,
2971 /* 2953*/ CCD_ID_GRR__PSI_2__page_mode,
2972 /* 2954*/ CCD_ID_GRR__PSI_2__psi2_cm,
2973 /* 2955*/ CCD_ID_GRR__PSI_2__psi2_ind,
2974 /* 2956*/ CCD_ID_GRR__PSI_2__psi2_cnt,
2975 /* 2957*/ CCD_ID_GRR__PSI_2__cell_id,
2976 /* 2958*/ CCD_ID_GRR__PSI_2__non_gprs_opt,
2977 /* 2959*/ CCD_ID_GRR__PSI_2__rfl,
2978 /* 2960*/ CCD_ID_GRR__PSI_2__cell_alloc,
2979 /* 2961*/ CCD_ID_GRR__PSI_2__gprs_ms_alloc,
2980 /* 2962*/ CCD_ID_GRR__PSI_2__pccch_des,
2981 /* 2963*/ CCD_ID_GRR__PSI_2__spare_0,
2982 /* 2964*/ CCD_ID_GRR__PSI_3__msg_type,
2983 /* 2965*/ CCD_ID_GRR__PSI_3__page_mode,
2984 /* 2966*/ CCD_ID_GRR__PSI_3__psi3_cm,
2985 /* 2967*/ CCD_ID_GRR__PSI_3__psi3bis_cnt,
2986 /* 2968*/ CCD_ID_GRR__PSI_3__scell_par,
2987 /* 2969*/ CCD_ID_GRR__PSI_3__gen_cell_par,
2988 /* 2970*/ CCD_ID_GRR__PSI_3__ncell_par,
2989 /* 2971*/ CCD_ID_GRR__PSI_3__spare_0,
2990 /* 2972*/ CCD_ID_GRR__PSI_3_BIS__msg_type,
2991 /* 2973*/ CCD_ID_GRR__PSI_3_BIS__page_mode,
2992 /* 2974*/ CCD_ID_GRR__PSI_3_BIS__psi3_cm,
2993 /* 2975*/ CCD_ID_GRR__PSI_3_BIS__psi3bis_ind,
2994 /* 2976*/ CCD_ID_GRR__PSI_3_BIS__psi3bis_cnt,
2995 /* 2977*/ CCD_ID_GRR__PSI_3_BIS__ncell_par,
2996 /* 2978*/ CCD_ID_GRR__PSI_3_BIS__ncell_par2,
2997 /* 2979*/ CCD_ID_GRR__PSI_3_BIS__spare_0,
2998 /* 2980*/ CCD_ID_GRR__PSI_4__msg_type,
2999 /* 2981*/ CCD_ID_GRR__PSI_4__page_mode,
3000 /* 2982*/ CCD_ID_GRR__PSI_4__psi4_cm,
3001 /* 2983*/ CCD_ID_GRR__PSI_4__psi4_ind,
3002 /* 2984*/ CCD_ID_GRR__PSI_4__psi4_cnt,
3003 /* 2985*/ CCD_ID_GRR__PSI_4__chan_list_imeas,
3004 /* 2986*/ CCD_ID_GRR__PSI_4__spare_0,
3005 /* 2987*/ CCD_ID_GRR__PSI_5__msg_type,
3006 /* 2988*/ CCD_ID_GRR__PSI_5__page_mode,
3007 /* 2989*/ CCD_ID_GRR__PSI_5__psi5_cm,
3008 /* 2990*/ CCD_ID_GRR__PSI_5__psi5_ind,
3009 /* 2991*/ CCD_ID_GRR__PSI_5__psi5_cnt,
3010 /* 2992*/ CCD_ID_GRR__PSI_5__nc_meas_par,
3011 /* 2993*/ CCD_ID_GRR__PSI_5__xmeas_par,
3012 /* 2994*/ CCD_ID_GRR__PSI_5__spare_0,
3013 /* 2995*/ CCD_ID_GRR__PSI_13__msg_type,
3014 /* 2996*/ CCD_ID_GRR__PSI_13__page_mode,
3015 /* 2997*/ CCD_ID_GRR__PSI_13__bcch_change_ma,
3016 /* 2998*/ CCD_ID_GRR__PSI_13__si_change_ma,
3017 /* 2999*/ CCD_ID_GRR__PSI_13__si13_cm_gprs_alloc,
3018 /* 3000*/ CCD_ID_GRR__PSI_13__flag,
3019 /* 3001*/ CCD_ID_GRR__PSI_13__pbcch_n_pres,
3020 /* 3002*/ CCD_ID_GRR__PSI_13__psi1_pbcch_info,
3021 /* 3003*/ CCD_ID_GRR__PSI_13__spare_0,
3022 /* 3004*/ CCD_ID_GRR__U_CTRL_ACK__msg_type,
3023 /* 3005*/ CCD_ID_GRR__U_CTRL_ACK__tlli_value,
3024 /* 3006*/ CCD_ID_GRR__U_CTRL_ACK__pctrl_ack,
3025 /* 3007*/ CCD_ID_GRR__U_CTRL_ACK__spare_0,
3026 /* 3008*/ CCD_ID_GRR__U_CELL_CHAN_FAILURE__msg_type,
3027 /* 3009*/ CCD_ID_GRR__U_CELL_CHAN_FAILURE__tlli_value,
3028 /* 3010*/ CCD_ID_GRR__U_CELL_CHAN_FAILURE__arfcn,
3029 /* 3011*/ CCD_ID_GRR__U_CELL_CHAN_FAILURE__bsic,
3030 /* 3012*/ CCD_ID_GRR__U_CELL_CHAN_FAILURE__failure_cause,
3031 /* 3013*/ CCD_ID_GRR__U_CELL_CHAN_FAILURE__spare_0,
3032 /* 3014*/ CCD_ID_GRR__D_CELL_CHAN_ORDER__msg_type,
3033 /* 3015*/ CCD_ID_GRR__D_CELL_CHAN_ORDER__page_mode,
3034 /* 3016*/ CCD_ID_GRR__D_CELL_CHAN_ORDER__add1,
3035 /* 3017*/ CCD_ID_GRR__D_CELL_CHAN_ORDER__spare_0,
3036 /* 3018*/ CCD_ID_GRR__D_CELL_CHAN_ORDER__im_rel,
3037 /* 3019*/ CCD_ID_GRR__D_CELL_CHAN_ORDER__arfcn,
3038 /* 3020*/ CCD_ID_GRR__D_CELL_CHAN_ORDER__bsic,
3039 /* 3021*/ CCD_ID_GRR__D_CELL_CHAN_ORDER__nc_meas_par_list,
3040 /* 3022*/ CCD_ID_GRR__D_CELL_CHAN_ORDER__spare_1,
3041 /* 3023*/ CCD_ID_GRR__D_DL_DUMMY__msg_type,
3042 /* 3024*/ CCD_ID_GRR__D_DL_DUMMY__page_mode,
3043 /* 3025*/ CCD_ID_GRR__D_DL_DUMMY__pers_lev,
3044 /* 3026*/ CCD_ID_GRR__D_DL_DUMMY__spare_0,
3045 /* 3027*/ CCD_ID_GRR__U_UL_DUMMY__msg_type,
3046 /* 3028*/ CCD_ID_GRR__U_UL_DUMMY__tlli_value,
3047 /* 3029*/ CCD_ID_GRR__U_UL_DUMMY__spare_0,
3048 /* 3030*/ CCD_ID_GRR__U_MEAS_REPORT__msg_type,
3049 /* 3031*/ CCD_ID_GRR__U_MEAS_REPORT__tlli_value,
3050 /* 3032*/ CCD_ID_GRR__U_MEAS_REPORT__psi5_cm,
3051 /* 3033*/ CCD_ID_GRR__U_MEAS_REPORT__flag,
3052 /* 3034*/ CCD_ID_GRR__U_MEAS_REPORT__nc_meas_rep,
3053 /* 3035*/ CCD_ID_GRR__U_MEAS_REPORT__xmeas_rep,
3054 /* 3036*/ CCD_ID_GRR__U_MEAS_REPORT__spare_0,
3055 /* 3037*/ CCD_ID_GRR__D_MEAS_ORDER__msg_type,
3056 /* 3038*/ CCD_ID_GRR__D_MEAS_ORDER__page_mode,
3057 /* 3039*/ CCD_ID_GRR__D_MEAS_ORDER__add1,
3058 /* 3040*/ CCD_ID_GRR__D_MEAS_ORDER__pmo_index,
3059 /* 3041*/ CCD_ID_GRR__D_MEAS_ORDER__pmo_cnt,
3060 /* 3042*/ CCD_ID_GRR__D_MEAS_ORDER__nc_meas_par_list,
3061 /* 3043*/ CCD_ID_GRR__D_MEAS_ORDER__xmeas_par,
3062 /* 3044*/ CCD_ID_GRR__D_MEAS_ORDER__spare_0,
3063 /* 3045*/ CCD_ID_GRR__U_MS_TBF_STATUS__msg_type,
3064 /* 3046*/ CCD_ID_GRR__U_MS_TBF_STATUS__glob_tfi,
3065 /* 3047*/ CCD_ID_GRR__U_MS_TBF_STATUS__tbf_cause,
3066 /* 3048*/ CCD_ID_GRR__U_MS_TBF_STATUS__msg_type2,
3067 /* 3049*/ CCD_ID_GRR__U_MS_TBF_STATUS__spare_0,
3068 /* 3050*/ CCD_ID_GRR__D_PDCH_RELEASE__msg_type,
3069 /* 3051*/ CCD_ID_GRR__D_PDCH_RELEASE__page_mode,
3070 /* 3052*/ CCD_ID_GRR__D_PDCH_RELEASE__flag,
3071 /* 3053*/ CCD_ID_GRR__D_PDCH_RELEASE__ts_available,
3072 /* 3054*/ CCD_ID_GRR__D_PDCH_RELEASE__spare_0,
3073 /* 3055*/ CCD_ID_GRR__D_POLLING_REQ__msg_type,
3074 /* 3056*/ CCD_ID_GRR__D_POLLING_REQ__page_mode,
3075 /* 3057*/ CCD_ID_GRR__D_POLLING_REQ__add2,
3076 /* 3058*/ CCD_ID_GRR__D_POLLING_REQ__ctrl_ack_type,
3077 /* 3059*/ CCD_ID_GRR__D_POLLING_REQ__spare_0,
3078 /* 3060*/ CCD_ID_GRR__D_CTRL_PWR_TA__msg_type,
3079 /* 3061*/ CCD_ID_GRR__D_CTRL_PWR_TA__page_mode,
3080 /* 3062*/ CCD_ID_GRR__D_CTRL_PWR_TA__add3,
3081 /* 3063*/ CCD_ID_GRR__D_CTRL_PWR_TA__spare_0,
3082 /* 3064*/ CCD_ID_GRR__D_CTRL_PWR_TA__g_pwr_par,
3083 /* 3065*/ CCD_ID_GRR__D_CTRL_PWR_TA__flag,
3084 /* 3066*/ CCD_ID_GRR__D_CTRL_PWR_TA__flag2,
3085 /* 3067*/ CCD_ID_GRR__D_CTRL_PWR_TA__gpta,
3086 /* 3068*/ CCD_ID_GRR__D_CTRL_PWR_TA__pwr_par,
3087 /* 3069*/ CCD_ID_GRR__D_CTRL_PWR_TA__spare_1,
3088 /* 3070*/ CCD_ID_GRR__D_PRACH_PAR__msg_type,
3089 /* 3071*/ CCD_ID_GRR__D_PRACH_PAR__page_mode,
3090 /* 3072*/ CCD_ID_GRR__D_PRACH_PAR__prach_ctrl_par,
3091 /* 3073*/ CCD_ID_GRR__D_PRACH_PAR__spare_0,
3092 /* 3074*/ CCD_ID_GRR__U_PSI_STATUS_MSG__msg_type,
3093 /* 3075*/ CCD_ID_GRR__U_PSI_STATUS_MSG__glob_tfi,
3094 /* 3076*/ CCD_ID_GRR__U_PSI_STATUS_MSG__pbcch_change_ma,
3095 /* 3077*/ CCD_ID_GRR__U_PSI_STATUS_MSG__received_psi,
3096 /* 3078*/ CCD_ID_GRR__U_PSI_STATUS_MSG__unknown_psi,
3097 /* 3079*/ CCD_ID_GRR__U_PSI_STATUS_MSG__spare_0,
3098 /* 3080*/ CCD_ID_GRR__D_TS_RECONFIG__msg_type,
3099 /* 3081*/ CCD_ID_GRR__D_TS_RECONFIG__page_mode,
3100 /* 3082*/ CCD_ID_GRR__D_TS_RECONFIG__spare_0,
3101 /* 3083*/ CCD_ID_GRR__D_TS_RECONFIG__glob_tfi,
3102 /* 3084*/ CCD_ID_GRR__D_TS_RECONFIG__spare_1,
3103 /* 3085*/ CCD_ID_GRR__D_TS_RECONFIG__chan_coding_cmd,
3104 /* 3086*/ CCD_ID_GRR__D_TS_RECONFIG__gpta,
3105 /* 3087*/ CCD_ID_GRR__D_TS_RECONFIG__dl_rlc_mode,
3106 /* 3088*/ CCD_ID_GRR__D_TS_RECONFIG__ctrl_ack,
3107 /* 3089*/ CCD_ID_GRR__D_TS_RECONFIG__dl_tfi,
3108 /* 3090*/ CCD_ID_GRR__D_TS_RECONFIG__ul_tfi,
3109 /* 3091*/ CCD_ID_GRR__D_TS_RECONFIG__dl_tn_alloc,
3110 /* 3092*/ CCD_ID_GRR__D_TS_RECONFIG__freq_par,
3111 /* 3093*/ CCD_ID_GRR__D_TS_RECONFIG__flag,
3112 /* 3094*/ CCD_ID_GRR__D_TS_RECONFIG__dyn_alloc_ts,
3113 /* 3095*/ CCD_ID_GRR__D_TS_RECONFIG__f_alloc_re,
3114 /* 3096*/ CCD_ID_GRR__D_TS_RECONFIG__spare_2,
3115 /* 3097*/ CCD_ID_SM__nsapi__spare_0,
3116 /* 3098*/ CCD_ID_SM__nsapi__nsapi_val,
3117 /* 3099*/ CCD_ID_SM__llc_sapi__spare_0,
3118 /* 3100*/ CCD_ID_SM__llc_sapi__sapi,
3119 /* 3101*/ CCD_ID_SM__qos__spare_0,
3120 /* 3102*/ CCD_ID_SM__qos__delay,
3121 /* 3103*/ CCD_ID_SM__qos__reliability,
3122 /* 3104*/ CCD_ID_SM__qos__peak,
3123 /* 3105*/ CCD_ID_SM__qos__spare_1,
3124 /* 3106*/ CCD_ID_SM__qos__precedence,
3125 /* 3107*/ CCD_ID_SM__qos__spare_2,
3126 /* 3108*/ CCD_ID_SM__qos__mean,
3127 /* 3109*/ CCD_ID_SM__address__spare_0,
3128 /* 3110*/ CCD_ID_SM__address__pdp_type_org,
3129 /* 3111*/ CCD_ID_SM__address__pdp_type_no,
3130 /* 3112*/ CCD_ID_SM__address__add_info,
3131 /* 3113*/ CCD_ID_SM__apn__apn_value,
3132 /* 3114*/ CCD_ID_SM__pco__pco_value,
3133 /* 3115*/ CCD_ID_SM__radio_prio__spare_0,
3134 /* 3116*/ CCD_ID_SM__radio_prio__radio_prio_val,
3135 /* 3117*/ CCD_ID_SM__sm_cause__sm_cause_val,
3136 /* 3118*/ CCD_ID_SM__ACTIVATE_PDP_REQ__msg_type,
3137 /* 3119*/ CCD_ID_SM__ACTIVATE_PDP_REQ__nsapi,
3138 /* 3120*/ CCD_ID_SM__ACTIVATE_PDP_REQ__llc_sapi,
3139 /* 3121*/ CCD_ID_SM__ACTIVATE_PDP_REQ__qos,
3140 /* 3122*/ CCD_ID_SM__ACTIVATE_PDP_REQ__address,
3141 /* 3123*/ CCD_ID_SM__ACTIVATE_PDP_REQ__apn,
3142 /* 3124*/ CCD_ID_SM__ACTIVATE_PDP_REQ__pco,
3143 /* 3125*/ CCD_ID_SM__ACTIVATE_PDP_ACC__msg_type,
3144 /* 3126*/ CCD_ID_SM__ACTIVATE_PDP_ACC__llc_sapi,
3145 /* 3127*/ CCD_ID_SM__ACTIVATE_PDP_ACC__qos,
3146 /* 3128*/ CCD_ID_SM__ACTIVATE_PDP_ACC__radio_prio,
3147 /* 3129*/ CCD_ID_SM__ACTIVATE_PDP_ACC__spare_0,
3148 /* 3130*/ CCD_ID_SM__ACTIVATE_PDP_ACC__address,
3149 /* 3131*/ CCD_ID_SM__ACTIVATE_PDP_ACC__pco,
3150 /* 3132*/ CCD_ID_SM__ACTIVATE_PDP_REJ__msg_type,
3151 /* 3133*/ CCD_ID_SM__ACTIVATE_PDP_REJ__sm_cause,
3152 /* 3134*/ CCD_ID_SM__ACTIVATE_PDP_REJ__pco,
3153 /* 3135*/ CCD_ID_SM__REQ_PDP_ACT__msg_type,
3154 /* 3136*/ CCD_ID_SM__REQ_PDP_ACT__address,
3155 /* 3137*/ CCD_ID_SM__REQ_PDP_ACT__apn,
3156 /* 3138*/ CCD_ID_SM__REQ_PDP_ACT_REJ__msg_type,
3157 /* 3139*/ CCD_ID_SM__REQ_PDP_ACT_REJ__sm_cause,
3158 /* 3140*/ CCD_ID_SM__MOD_PDP_REQ__msg_type,
3159 /* 3141*/ CCD_ID_SM__MOD_PDP_REQ__radio_prio,
3160 /* 3142*/ CCD_ID_SM__MOD_PDP_REQ__spare_0,
3161 /* 3143*/ CCD_ID_SM__MOD_PDP_REQ__llc_sapi,
3162 /* 3144*/ CCD_ID_SM__MOD_PDP_REQ__qos,
3163 /* 3145*/ CCD_ID_SM__MOD_PDP_ACC__msg_type,
3164 /* 3146*/ CCD_ID_SM__DEACT_PDP_REQ__msg_type,
3165 /* 3147*/ CCD_ID_SM__DEACT_PDP_REQ__sm_cause,
3166 /* 3148*/ CCD_ID_SM__DEACT_PDP_ACC__msg_type,
3167 /* 3149*/ CCD_ID_SM__SM_STATUS__msg_type,
3168 /* 3150*/ CCD_ID_SM__SM_STATUS__sm_cause,
3169 /*65535*/ CCD_ID_END = 0x7fffffff
3170 } T_CCD_ID;