FreeCalypso > hg > fc-magnetite

comparison cdg211/cdginc/p_pkt.h @ 4:56abf6cf8a0b

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
cdg211: cdginc/mdf/pdf files from TCS211-20070608
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 26 Sep 2016 01:11:35 +0000
parents
children
comparison
equal deleted inserted replaced
3:93999a60b835 4:56abf6cf8a0b
1 /*
2 +--------------------------------------------------------------------------+
3 | PROJECT : PROTOCOL STACK |
4 | FILE : p_pkt.h |
5 | SOURCE : "__out__\g23m_dfile\prim\pkt.pdf" |
6 | LastModified : "2002-10-17" |
7 | IdAndVersion : "8443.105.02.106" |
8 | SrcFileTime : "Mon Nov 24 15:50:52 2003" |
9 | Generated by CCDGEN_2.5.5 on Fri Jun 08 13:59:15 2007 |
10 | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! |
11 +--------------------------------------------------------------------------+
12 */
13
14 /* PRAGMAS
15 * PREFIX : NONE
16 * COMPATIBILITY_DEFINES : NO (require PREFIX)
17 * ALWAYS_ENUM_IN_VAL_FILE: NO
18 * ENABLE_GROUP: NO
19 * CAPITALIZE_TYPENAME: NO
20 */
21
22
23 #ifndef P_PKT_H
24 #define P_PKT_H
25
26
27 #define CDG_ENTER__P_PKT_H
28
29 #define CDG_ENTER__FILENAME _P_PKT_H
30 #define CDG_ENTER__P_PKT_H__FILE_TYPE CDGINC
31 #define CDG_ENTER__P_PKT_H__LAST_MODIFIED _2002_10_17
32 #define CDG_ENTER__P_PKT_H__ID_AND_VERSION _8443_105_02_106
33
34 #define CDG_ENTER__P_PKT_H__SRC_FILE_TIME _Mon_Nov_24_15_50_52_2003
35
36 #include "CDG_ENTER.h"
37
38 #undef CDG_ENTER__P_PKT_H
39
40 #undef CDG_ENTER__FILENAME
41
42
43 #include "p_pkt.val"
44
45 #ifndef __T_dio_dcb__
46 #define __T_dio_dcb__
47 /*
48 * Device Control Block data
49 * CCDGEN:WriteStruct_Count==1826
50 */
51 typedef struct
52 {
53 U8 convergence; /*< 0: 1> serial data and / or packet data */
54 U8 data_mode; /*< 1: 1> TE will use the device to transmit AT commands or data or both */
55 U8 sleep_mode; /*< 2: 1> describes if the device is able to enter sleep mode */
56 U8 _align0; /*< 3: 1> alignment */
57 U32 mux_configuration; /*< 4: 4> describes the supported configurations of the multiplexer */
58 U16 n1; /*< 8: 2> maximum frame size of a multiplexer frame */
59 U8 n2; /*< 10: 1> maximum number of retransmissions */
60 U8 t1; /*< 11: 1> acknowledgement timer */
61 U8 t2; /*< 12: 1> response timer for the multiplexer control channel */
62 U8 t3; /*< 13: 1> wake up response timer */
63 U8 k; /*< 14: 1> window size for advanced option with error recovery */
64 U8 _align1; /*< 15: 1> alignment */
65 U16 mtu; /*< 16: 2> Maximum Transfer Unit */
66 U8 _align2; /*< 18: 1> alignment */
67 U8 _align3; /*< 19: 1> alignment */
68 U32 baud; /*< 20: 4> supported transmission rates */
69 U8 data_bits; /*< 24: 1> supported numbers of bits per character */
70 U8 stop_bits; /*< 25: 1> supported number of stop bits */
71 U8 parity; /*< 26: 1> supported types of parity checking */
72 U8 _align4; /*< 27: 1> alignment */
73 U16 flow_control; /*< 28: 2> supported types of flow control */
74 U8 xon; /*< 30: 1> XON character */
75 U8 xoff; /*< 31: 1> XOFF character */
76 U8 esc_char; /*< 32: 1> ASCII character which could appear three times as an escape sequence */
77 U8 _align5; /*< 33: 1> alignment */
78 U16 guard_period; /*< 34: 2> minimal duration before and after escape sequence */
79 } T_dio_dcb;
80 #endif
81
82
83 /*
84 * End of substructure section, begin of primitive definition section
85 */
86
87 #ifndef __T_PKT_CONNECT_IND__
88 #define __T_PKT_CONNECT_IND__
89 /*
90 *
91 * CCDGEN:WriteStruct_Count==1830
92 */
93 typedef struct
94 {
95 U8 device_no; /*< 0: 1> Data device number */
96 U8 _align0; /*< 1: 1> alignment */
97 U8 _align1; /*< 2: 1> alignment */
98 U8 _align2; /*< 3: 1> alignment */
99 T_dio_dcb dio_dcb; /*< 4: 36> Device Control Block data */
100 } T_PKT_CONNECT_IND;
101 #endif
102
103 #ifndef __T_PKT_CONNECT_RES__
104 #define __T_PKT_CONNECT_RES__
105 /*
106 *
107 * CCDGEN:WriteStruct_Count==1831
108 */
109 typedef struct
110 {
111 U8 device_no; /*< 0: 1> Data device number */
112 U8 _align0; /*< 1: 1> alignment */
113 U8 _align1; /*< 2: 1> alignment */
114 U8 _align2; /*< 3: 1> alignment */
115 T_dio_dcb dio_dcb; /*< 4: 36> Device Control Block data */
116 } T_PKT_CONNECT_RES;
117 #endif
118
119 #ifndef __T_PKT_CONNECT_REJ__
120 #define __T_PKT_CONNECT_REJ__
121 /*
122 *
123 * CCDGEN:WriteStruct_Count==1832
124 */
125 typedef struct
126 {
127 U8 device_no; /*< 0: 1> Data device number */
128 U8 _align0; /*< 1: 1> alignment */
129 U8 _align1; /*< 2: 1> alignment */
130 U8 _align2; /*< 3: 1> alignment */
131 } T_PKT_CONNECT_REJ;
132 #endif
133
134 #ifndef __T_PKT_DISCONNECT_IND__
135 #define __T_PKT_DISCONNECT_IND__
136 /*
137 *
138 * CCDGEN:WriteStruct_Count==1833
139 */
140 typedef struct
141 {
142 U8 device_no; /*< 0: 1> Data device number */
143 U8 _align0; /*< 1: 1> alignment */
144 U16 cause; /*< 2: 2> Cause value */
145 } T_PKT_DISCONNECT_IND;
146 #endif
147
148 #ifndef __T_PKT_DTI_OPEN_REQ__
149 #define __T_PKT_DTI_OPEN_REQ__
150 /*
151 *
152 * CCDGEN:WriteStruct_Count==1834
153 */
154 typedef struct
155 {
156 U8 device_no; /*< 0: 1> Data device number */
157 U8 _align0; /*< 1: 1> alignment */
158 U8 _align1; /*< 2: 1> alignment */
159 U8 _align2; /*< 3: 1> alignment */
160 U32 peer; /*< 4: 4> Name of peer, to be casted to 'const char *' */
161 U32 link_id; /*< 8: 4> Link identifier */
162 U8 dti_direction; /*< 12: 1> DTI direction */
163 U8 _align3; /*< 13: 1> alignment */
164 U8 _align4; /*< 14: 1> alignment */
165 U8 _align5; /*< 15: 1> alignment */
166 } T_PKT_DTI_OPEN_REQ;
167 #endif
168
169 #ifndef __T_PKT_DTI_OPEN_CNF__
170 #define __T_PKT_DTI_OPEN_CNF__
171 /*
172 *
173 * CCDGEN:WriteStruct_Count==1835
174 */
175 typedef struct
176 {
177 U8 device_no; /*< 0: 1> Data device number */
178 U8 _align0; /*< 1: 1> alignment */
179 U16 cause; /*< 2: 2> Cause value */
180 } T_PKT_DTI_OPEN_CNF;
181 #endif
182
183 #ifndef __T_PKT_MODIFY_REQ__
184 #define __T_PKT_MODIFY_REQ__
185 /*
186 *
187 * CCDGEN:WriteStruct_Count==1836
188 */
189 typedef struct
190 {
191 U8 device_no; /*< 0: 1> Data device number */
192 U8 _align0; /*< 1: 1> alignment */
193 U8 _align1; /*< 2: 1> alignment */
194 U8 _align2; /*< 3: 1> alignment */
195 T_dio_dcb dio_dcb; /*< 4: 36> Device Control Block data */
196 } T_PKT_MODIFY_REQ;
197 #endif
198
199 #ifndef __T_PKT_MODIFY_CNF__
200 #define __T_PKT_MODIFY_CNF__
201 /*
202 *
203 * CCDGEN:WriteStruct_Count==1837
204 */
205 typedef struct
206 {
207 U8 device_no; /*< 0: 1> Data device number */
208 U8 _align0; /*< 1: 1> alignment */
209 U16 cause; /*< 2: 2> Cause value */
210 } T_PKT_MODIFY_CNF;
211 #endif
212
213 #ifndef __T_PKT_DTI_CLOSE_REQ__
214 #define __T_PKT_DTI_CLOSE_REQ__
215 /*
216 *
217 * CCDGEN:WriteStruct_Count==1838
218 */
219 typedef struct
220 {
221 U8 device_no; /*< 0: 1> Data device number */
222 U8 _align0; /*< 1: 1> alignment */
223 U8 _align1; /*< 2: 1> alignment */
224 U8 _align2; /*< 3: 1> alignment */
225 } T_PKT_DTI_CLOSE_REQ;
226 #endif
227
228 #ifndef __T_PKT_DTI_CLOSE_CNF__
229 #define __T_PKT_DTI_CLOSE_CNF__
230 /*
231 *
232 * CCDGEN:WriteStruct_Count==1839
233 */
234 typedef struct
235 {
236 U8 device_no; /*< 0: 1> Data device number */
237 U8 _align0; /*< 1: 1> alignment */
238 U8 _align1; /*< 2: 1> alignment */
239 U8 _align2; /*< 3: 1> alignment */
240 } T_PKT_DTI_CLOSE_CNF;
241 #endif
242
243 #ifndef __T_PKT_DTI_CLOSE_IND__
244 #define __T_PKT_DTI_CLOSE_IND__
245 /*
246 *
247 * CCDGEN:WriteStruct_Count==1840
248 */
249 typedef struct
250 {
251 U8 device_no; /*< 0: 1> Data device number */
252 U8 _align0; /*< 1: 1> alignment */
253 U8 _align1; /*< 2: 1> alignment */
254 U8 _align2; /*< 3: 1> alignment */
255 } T_PKT_DTI_CLOSE_IND;
256 #endif
257
258 #ifndef __T_PKT_SIG_CLEAR_IND__
259 #define __T_PKT_SIG_CLEAR_IND__
260 /*
261 *
262 * CCDGEN:WriteStruct_Count==1841
263 */
264 typedef struct
265 {
266 U8 dummy; /*< 0: 1> no parameters */
267 } T_PKT_SIG_CLEAR_IND;
268 #endif
269
270 #ifndef __T_PKT_SIG_FLUSH_IND__
271 #define __T_PKT_SIG_FLUSH_IND__
272 /*
273 *
274 * CCDGEN:WriteStruct_Count==1842
275 */
276 typedef struct
277 {
278 U8 dummy; /*< 0: 1> no parameters */
279 } T_PKT_SIG_FLUSH_IND;
280 #endif
281
282 #ifndef __T_PKT_SIG_READ_IND__
283 #define __T_PKT_SIG_READ_IND__
284 /*
285 *
286 * CCDGEN:WriteStruct_Count==1843
287 */
288 typedef struct
289 {
290 U8 dummy; /*< 0: 1> no parameters */
291 } T_PKT_SIG_READ_IND;
292 #endif
293
294 #ifndef __T_PKT_SIG_WRITE_IND__
295 #define __T_PKT_SIG_WRITE_IND__
296 /*
297 *
298 * CCDGEN:WriteStruct_Count==1844
299 */
300 typedef struct
301 {
302 U8 dummy; /*< 0: 1> no parameters */
303 } T_PKT_SIG_WRITE_IND;
304 #endif
305
306 #ifndef __T_PKT_SIG_CONNECT_IND__
307 #define __T_PKT_SIG_CONNECT_IND__
308 /*
309 *
310 * CCDGEN:WriteStruct_Count==1845
311 */
312 typedef struct
313 {
314 U8 dummy; /*< 0: 1> no parameters */
315 } T_PKT_SIG_CONNECT_IND;
316 #endif
317
318 #ifndef __T_PKT_SIG_DISCONNECT_IND__
319 #define __T_PKT_SIG_DISCONNECT_IND__
320 /*
321 *
322 * CCDGEN:WriteStruct_Count==1846
323 */
324 typedef struct
325 {
326 U8 dummy; /*< 0: 1> no parameters */
327 } T_PKT_SIG_DISCONNECT_IND;
328 #endif
329
330 #ifndef __T_PKT_DIO_SIGNAL_IND__
331 #define __T_PKT_DIO_SIGNAL_IND__
332 /*
333 *
334 * CCDGEN:WriteStruct_Count==1847
335 */
336 typedef struct
337 {
338 U8 device_no; /*< 0: 1> Data device number */
339 U8 _align0; /*< 1: 1> alignment */
340 U16 signal_type; /*< 2: 2> Signal type */
341 } T_PKT_DIO_SIGNAL_IND;
342 #endif
343
344 #ifndef __T_PKT_DIO_INIT_REQ__
345 #define __T_PKT_DIO_INIT_REQ__
346 /*
347 *
348 * CCDGEN:WriteStruct_Count==1848
349 */
350 typedef struct
351 {
352 U16 drv_handle; /*< 0: 2> Unique handle for this driver */
353 U8 _align0; /*< 2: 1> alignment */
354 U8 _align1; /*< 3: 1> alignment */
355 } T_PKT_DIO_INIT_REQ;
356 #endif
357
358 #ifndef __T_PKT_DIO_INIT_CNF__
359 #define __T_PKT_DIO_INIT_CNF__
360 /*
361 *
362 * CCDGEN:WriteStruct_Count==1849
363 */
364 typedef struct
365 {
366 U16 retval; /*< 0: 2> Return value */
367 U8 _align0; /*< 2: 1> alignment */
368 U8 _align1; /*< 3: 1> alignment */
369 } T_PKT_DIO_INIT_CNF;
370 #endif
371
372 #ifndef __T_PKT_DIO_EXIT_REQ__
373 #define __T_PKT_DIO_EXIT_REQ__
374 /*
375 *
376 * CCDGEN:WriteStruct_Count==1850
377 */
378 typedef struct
379 {
380 U8 dummy; /*< 0: 1> no parameters */
381 } T_PKT_DIO_EXIT_REQ;
382 #endif
383
384 #ifndef __T_PKT_DIO_READ_REQ__
385 #define __T_PKT_DIO_READ_REQ__
386 /*
387 *
388 * CCDGEN:WriteStruct_Count==1851
389 */
390 typedef struct
391 {
392 U8 device_no; /*< 0: 1> Data device number */
393 U8 _align0; /*< 1: 1> alignment */
394 U8 _align1; /*< 2: 1> alignment */
395 U8 _align2; /*< 3: 1> alignment */
396 } T_PKT_DIO_READ_REQ;
397 #endif
398
399 #ifndef __T_PKT_DIO_READ_CNF__
400 #define __T_PKT_DIO_READ_CNF__
401 /*
402 *
403 * CCDGEN:WriteStruct_Count==1852
404 */
405 typedef struct
406 {
407 U16 retval; /*< 0: 2> Return value */
408 U8 _align0; /*< 2: 1> alignment */
409 U8 _align1; /*< 3: 1> alignment */
410 } T_PKT_DIO_READ_CNF;
411 #endif
412
413 #ifndef __T_PKT_DIO_GETDATA_REQ__
414 #define __T_PKT_DIO_GETDATA_REQ__
415 /*
416 *
417 * CCDGEN:WriteStruct_Count==1853
418 */
419 typedef struct
420 {
421 U8 device_no; /*< 0: 1> Data device number */
422 U8 _align0; /*< 1: 1> alignment */
423 U8 _align1; /*< 2: 1> alignment */
424 U8 _align2; /*< 3: 1> alignment */
425 } T_PKT_DIO_GETDATA_REQ;
426 #endif
427
428 #ifndef __T_PKT_DIO_GETDATA_CNF__
429 #define __T_PKT_DIO_GETDATA_CNF__
430 /*
431 *
432 * CCDGEN:WriteStruct_Count==1854
433 */
434 typedef struct
435 {
436 U16 retval; /*< 0: 2> Return value */
437 U8 _align0; /*< 2: 1> alignment */
438 U8 _align1; /*< 3: 1> alignment */
439 U32 state; /*< 4: 4> Line state bits */
440 T_sdu sdu; /*< 8: ? > test data */
441 } T_PKT_DIO_GETDATA_CNF;
442 #endif
443
444 #ifndef __T_PKT_DIO_WRITE_REQ__
445 #define __T_PKT_DIO_WRITE_REQ__
446 /*
447 *
448 * CCDGEN:WriteStruct_Count==1855
449 */
450 typedef struct
451 {
452 U8 device_no; /*< 0: 1> Data device number */
453 U8 _align0; /*< 1: 1> alignment */
454 U8 _align1; /*< 2: 1> alignment */
455 U8 _align2; /*< 3: 1> alignment */
456 U32 state; /*< 4: 4> Line state bits */
457 U32 mask; /*< 8: 4> Line state mask */
458 T_sdu sdu; /*< 12: ? > test data */
459 } T_PKT_DIO_WRITE_REQ;
460 #endif
461
462 #ifndef __T_PKT_DIO_WRITE_CNF__
463 #define __T_PKT_DIO_WRITE_CNF__
464 /*
465 *
466 * CCDGEN:WriteStruct_Count==1856
467 */
468 typedef struct
469 {
470 U16 retval; /*< 0: 2> Return value */
471 U8 _align0; /*< 2: 1> alignment */
472 U8 _align1; /*< 3: 1> alignment */
473 } T_PKT_DIO_WRITE_CNF;
474 #endif
475
476 #ifndef __T_PKT_DIO_GETBUFFER_REQ__
477 #define __T_PKT_DIO_GETBUFFER_REQ__
478 /*
479 *
480 * CCDGEN:WriteStruct_Count==1857
481 */
482 typedef struct
483 {
484 U8 device_no; /*< 0: 1> Data device number */
485 U8 _align0; /*< 1: 1> alignment */
486 U8 _align1; /*< 2: 1> alignment */
487 U8 _align2; /*< 3: 1> alignment */
488 } T_PKT_DIO_GETBUFFER_REQ;
489 #endif
490
491 #ifndef __T_PKT_DIO_GETBUFFER_CNF__
492 #define __T_PKT_DIO_GETBUFFER_CNF__
493 /*
494 *
495 * CCDGEN:WriteStruct_Count==1858
496 */
497 typedef struct
498 {
499 U16 retval; /*< 0: 2> Return value */
500 U8 _align0; /*< 2: 1> alignment */
501 U8 _align1; /*< 3: 1> alignment */
502 } T_PKT_DIO_GETBUFFER_CNF;
503 #endif
504
505 #ifndef __T_PKT_DIO_CLEAR_REQ__
506 #define __T_PKT_DIO_CLEAR_REQ__
507 /*
508 *
509 * CCDGEN:WriteStruct_Count==1859
510 */
511 typedef struct
512 {
513 U8 device_no; /*< 0: 1> Data device number */
514 U8 _align0; /*< 1: 1> alignment */
515 U16 buffer_type; /*< 2: 2> Type of buffer to be cleared */
516 } T_PKT_DIO_CLEAR_REQ;
517 #endif
518
519 #ifndef __T_PKT_DIO_CLEAR_CNF__
520 #define __T_PKT_DIO_CLEAR_CNF__
521 /*
522 *
523 * CCDGEN:WriteStruct_Count==1860
524 */
525 typedef struct
526 {
527 U16 retval; /*< 0: 2> Return value */
528 U8 _align0; /*< 2: 1> alignment */
529 U8 _align1; /*< 3: 1> alignment */
530 } T_PKT_DIO_CLEAR_CNF;
531 #endif
532
533 #ifndef __T_PKT_DIO_FLUSH_REQ__
534 #define __T_PKT_DIO_FLUSH_REQ__
535 /*
536 *
537 * CCDGEN:WriteStruct_Count==1861
538 */
539 typedef struct
540 {
541 U8 device_no; /*< 0: 1> Data device number */
542 U8 _align0; /*< 1: 1> alignment */
543 U8 _align1; /*< 2: 1> alignment */
544 U8 _align2; /*< 3: 1> alignment */
545 } T_PKT_DIO_FLUSH_REQ;
546 #endif
547
548 #ifndef __T_PKT_DIO_FLUSH_CNF__
549 #define __T_PKT_DIO_FLUSH_CNF__
550 /*
551 *
552 * CCDGEN:WriteStruct_Count==1862
553 */
554 typedef struct
555 {
556 U16 retval; /*< 0: 2> Return value */
557 U8 _align0; /*< 2: 1> alignment */
558 U8 _align1; /*< 3: 1> alignment */
559 } T_PKT_DIO_FLUSH_CNF;
560 #endif
561
562 #ifndef __T_PKT_DIO_SETSIGNAL_REQ__
563 #define __T_PKT_DIO_SETSIGNAL_REQ__
564 /*
565 *
566 * CCDGEN:WriteStruct_Count==1863
567 */
568 typedef struct
569 {
570 U16 signal_type; /*< 0: 2> Signal type */
571 U8 _align0; /*< 2: 1> alignment */
572 U8 _align1; /*< 3: 1> alignment */
573 } T_PKT_DIO_SETSIGNAL_REQ;
574 #endif
575
576 #ifndef __T_PKT_DIO_SETSIGNAL_CNF__
577 #define __T_PKT_DIO_SETSIGNAL_CNF__
578 /*
579 *
580 * CCDGEN:WriteStruct_Count==1864
581 */
582 typedef struct
583 {
584 U16 retval; /*< 0: 2> Return value */
585 U8 _align0; /*< 2: 1> alignment */
586 U8 _align1; /*< 3: 1> alignment */
587 } T_PKT_DIO_SETSIGNAL_CNF;
588 #endif
589
590 #ifndef __T_PKT_DIO_RESETSIGNAL_REQ__
591 #define __T_PKT_DIO_RESETSIGNAL_REQ__
592 /*
593 *
594 * CCDGEN:WriteStruct_Count==1865
595 */
596 typedef struct
597 {
598 U16 signal_type; /*< 0: 2> Signal type */
599 U8 _align0; /*< 2: 1> alignment */
600 U8 _align1; /*< 3: 1> alignment */
601 } T_PKT_DIO_RESETSIGNAL_REQ;
602 #endif
603
604 #ifndef __T_PKT_DIO_RESETSIGNAL_CNF__
605 #define __T_PKT_DIO_RESETSIGNAL_CNF__
606 /*
607 *
608 * CCDGEN:WriteStruct_Count==1866
609 */
610 typedef struct
611 {
612 U16 retval; /*< 0: 2> Return value */
613 U8 _align0; /*< 2: 1> alignment */
614 U8 _align1; /*< 3: 1> alignment */
615 } T_PKT_DIO_RESETSIGNAL_CNF;
616 #endif
617
618 #ifndef __T_PKT_DIO_GETCAP_REQ__
619 #define __T_PKT_DIO_GETCAP_REQ__
620 /*
621 *
622 * CCDGEN:WriteStruct_Count==1867
623 */
624 typedef struct
625 {
626 U8 device_no; /*< 0: 1> Data device number */
627 U8 _align0; /*< 1: 1> alignment */
628 U8 _align1; /*< 2: 1> alignment */
629 U8 _align2; /*< 3: 1> alignment */
630 } T_PKT_DIO_GETCAP_REQ;
631 #endif
632
633 #ifndef __T_PKT_DIO_GETCAP_CNF__
634 #define __T_PKT_DIO_GETCAP_CNF__
635 /*
636 *
637 * CCDGEN:WriteStruct_Count==1868
638 */
639 typedef struct
640 {
641 U16 retval; /*< 0: 2> Return value */
642 U8 _align0; /*< 2: 1> alignment */
643 U8 _align1; /*< 3: 1> alignment */
644 T_dio_dcb dio_dcb; /*< 4: 36> Device Control Block data */
645 } T_PKT_DIO_GETCAP_CNF;
646 #endif
647
648 #ifndef __T_PKT_DIO_SETCONFIG_REQ__
649 #define __T_PKT_DIO_SETCONFIG_REQ__
650 /*
651 *
652 * CCDGEN:WriteStruct_Count==1869
653 */
654 typedef struct
655 {
656 U8 device_no; /*< 0: 1> Data device number */
657 U8 _align0; /*< 1: 1> alignment */
658 U8 _align1; /*< 2: 1> alignment */
659 U8 _align2; /*< 3: 1> alignment */
660 T_dio_dcb dio_dcb; /*< 4: 36> Device Control Block data */
661 } T_PKT_DIO_SETCONFIG_REQ;
662 #endif
663
664 #ifndef __T_PKT_DIO_SETCONFIG_CNF__
665 #define __T_PKT_DIO_SETCONFIG_CNF__
666 /*
667 *
668 * CCDGEN:WriteStruct_Count==1870
669 */
670 typedef struct
671 {
672 U16 retval; /*< 0: 2> Return value */
673 U8 _align0; /*< 2: 1> alignment */
674 U8 _align1; /*< 3: 1> alignment */
675 } T_PKT_DIO_SETCONFIG_CNF;
676 #endif
677
678 #ifndef __T_PKT_DIO_GETCONFIG_REQ__
679 #define __T_PKT_DIO_GETCONFIG_REQ__
680 /*
681 *
682 * CCDGEN:WriteStruct_Count==1871
683 */
684 typedef struct
685 {
686 U8 device_no; /*< 0: 1> Data device number */
687 U8 _align0; /*< 1: 1> alignment */
688 U8 _align1; /*< 2: 1> alignment */
689 U8 _align2; /*< 3: 1> alignment */
690 } T_PKT_DIO_GETCONFIG_REQ;
691 #endif
692
693 #ifndef __T_PKT_DIO_GETCONFIG_CNF__
694 #define __T_PKT_DIO_GETCONFIG_CNF__
695 /*
696 *
697 * CCDGEN:WriteStruct_Count==1872
698 */
699 typedef struct
700 {
701 U16 retval; /*< 0: 2> Return value */
702 U8 _align0; /*< 2: 1> alignment */
703 U8 _align1; /*< 3: 1> alignment */
704 } T_PKT_DIO_GETCONFIG_CNF;
705 #endif
706
707 #ifndef __T_PKT_DIO_CLOSEDEVICE_REQ__
708 #define __T_PKT_DIO_CLOSEDEVICE_REQ__
709 /*
710 *
711 * CCDGEN:WriteStruct_Count==1873
712 */
713 typedef struct
714 {
715 U8 device_no; /*< 0: 1> Data device number */
716 U8 _align0; /*< 1: 1> alignment */
717 U8 _align1; /*< 2: 1> alignment */
718 U8 _align2; /*< 3: 1> alignment */
719 } T_PKT_DIO_CLOSEDEVICE_REQ;
720 #endif
721
722 #ifndef __T_PKT_DIO_CLOSEDEVICE_CNF__
723 #define __T_PKT_DIO_CLOSEDEVICE_CNF__
724 /*
725 *
726 * CCDGEN:WriteStruct_Count==1874
727 */
728 typedef struct
729 {
730 U16 retval; /*< 0: 2> Return value */
731 U8 _align0; /*< 2: 1> alignment */
732 U8 _align1; /*< 3: 1> alignment */
733 } T_PKT_DIO_CLOSEDEVICE_CNF;
734 #endif
735
736
737 #include "CDG_LEAVE.h"
738
739
740 #endif