comparison cdg211/msg/grlc.mdf @ 4:56abf6cf8a0b

cdg211: cdginc/mdf/pdf files from TCS211-20070608
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 26 Sep 2016 01:11:35 +0000
parents
children
comparison
equal deleted inserted replaced
3:93999a60b835 4:56abf6cf8a0b
1 ;********************************************************************************
2 ;*** File : grlc.mdf
3 ;*** Creation : Fri Jun 08 13:59:04 CST 2007
4 ;*** XSLT Processor : Apache Software Foundation / http://xml.apache.org/xalan-j / supports XSLT-Ver: 1
5 ;*** Copyright : (c) Texas Instruments AG, Berlin Germany 2002
6 ;********************************************************************************
7 ;*** Document Type : Air Interface Message Specification
8 ;*** Document Name : grlc
9 ;*** Document No. : 8441.601.99.001
10 ;*** Document Date : 2003-03-26
11 ;*** Document Status: BEING_PROCESSED
12 ;*** Document Author: Adnan
13 ;********************************************************************************
14
15
16
17 PRAGMA SRC_FILE_TIME "Thu Feb 17 14:27:10 2005"
18 PRAGMA LAST_MODIFIED "2003-03-26"
19 PRAGMA ID_AND_VERSION "8441.601.99.001"
20
21
22
23
24
25
26 VALTAB VAL_final_alloc
27 VAL 0 NO "not present"
28 VAL 1 YES "present"
29
30 VALTAB VAL_msg_type
31 VAL 0b000101 U_GRLC_RESOURCE_REQ_c "Packet Resource Request"
32 VAL 0b000010 U_GRLC_DL_ACK_c "Packet Downlink Ack/Nack"
33 VAL 0b001001 D_GRLC_UL_ACK_c "Packet Uplink Ack/Nack"
34 VAL 0b000001 U_GRLC_CTRL_ACK_c "Packet Control Acknowledgement"
35 VAL 0b000011 U_GRLC_UL_DUMMY_c "Packet Uplink Dummy Control Block"
36
37 VALTAB VAL_page_mode
38 VAL 0b00 NORMAL_PAGING "Normal Paging"
39 VAL 0b01 EXT_PAGING "Extended Paging"
40 VAL 0b10 REORG_PAGING "Paging Reorganisation"
41 VAL 0b11 SAME_PAGING "Same as before"
42
43 VALTAB VAL_access_type
44 VAL 0b00 TWO_PHASE "Two Phase Access Request"
45 VAL 0b01 PAGE "Page Response"
46 VAL 0b10 CELL_UPDATE "Cell Update"
47 VAL 0b11 MM_PROC "Mobility Management procedure"
48
49 VALTAB VAL_chan_coding_cmd
50 VAL 0b00 "CS-1"
51 VAL 0b01 "CS-2"
52 VAL 0b10 "CS-3"
53 VAL 0b11 "CS-4"
54
55 VALTAB VAL_rlc_mode
56 VAL 0 "RLC acknowledged mode"
57 VAL 1 "RLC unacknowledged mode"
58
59 VALTAB VAL_pctrl_ack
60 VAL 0 "reserved - this value shall not be sent. If received it shall be interpreted as bit value '1'."
61 VAL 1 "the MS received an RLC/MAC control block addressed to itself and with RBSN = 1, and did not receive an RLC/MAC control block with the same RTI value and RBSN = 0."
62 VAL 2 "the MS received an RLC/MAC control block addressed to itself and with RBSN = 0, and did not receive an RLC/MAC control block with the same RTI value and RBSN = 1. This value is sent irrespective of the value of the FS bit."
63 VAL 3 "the MS received two RLC/MAC blocks with the same RTI value, one with RBSN = 0 and the other with RBSN = 1."
64
65 VALTAB VAL_alpha
66 VAL 0b0000 "Alpha = 0.0"
67 VAL 0b0001 "Alpha = 0.1"
68 VAL 0b0010 "Alpha = 0.2"
69 VAL 0b0011 "Alpha = 0.3"
70 VAL 0b0100 "Alpha = 0.4"
71 VAL 0b0101 "Alpha = 0.5"
72 VAL 0b0110 "Alpha = 0.6"
73 VAL 0b0111 "Alpha = 0.7"
74 VAL 0b1000 "Alpha = 0.8"
75 VAL 0b1001 "Alpha = 0.9"
76 VAL 0b1010 "Alpha = 1.0"
77
78 VALTAB VAL_radio_prio
79 VAL 0 "Radio Priority 1 (Highest priority)"
80 VAL 1 "Radio Priority 2"
81 VAL 2 "Radio Priority 3"
82 VAL 3 "Radio Priority 4 (Lower priority)"
83
84 VALTAB VAL_llc_pdu_type
85 VAL 0 "LLC PDU is SACK or ACK"
86 VAL 1 "LLC PDU is not SACK or ACK"
87
88 VALTAB VAL_bl_o_bl_per
89 VAL 0 BLOCKS "ALLOCATION_BITMAP is to be interpreted as blocks"
90 VAL 1 BLOCK_PERIODS "ALLOCATION_BITMAP is to be interpreted as block periods"
91
92 VALTAB VAL_rbb
93 VAL 0 INVALID "Negative Ack of the RLC data block with BSN=(SSN-bit_nr)mod128"
94 VAL 1 RECEIVED "Positive Ack of the RLC data block with BSN=(SSN-bit_nr)mod128"
95
96 VALTAB VAL_f_ack_ind
97 VAL 0 "retransmission are requested and the TBF is incomplete"
98 VAL 1 "no retransmissions are requested and this message indicates acknowledgement of all RLC data in the TBF"
99
100
101
102
103 VAR final_alloc "FINAL_ALLOCATION"
104 1
105
106 VAL @m_grlc - VAL_final_alloc@
107
108 VAR flag "Flag"
109 1
110
111 VAL @m_grlc - VAL_final_alloc@
112
113 VAR flag2 "Flag2"
114 1
115
116 VAL @m_grlc - VAL_final_alloc@
117
118 VAR msg_type "Message Type"
119 6
120
121 VAL @m_grlc - VAL_msg_type@
122
123 VAR msg_type2 "Message Type"
124 6
125
126 VAL @m_grlc - VAL_msg_type@
127
128 VAR page_mode "Page Mode"
129 2
130
131 VAL @m_grlc - VAL_page_mode@
132
133 VAR access_type "Access Type"
134 2
135
136 VAL @m_grlc - VAL_access_type@
137
138 VAR tlli_value "TLLI"
139 32
140
141
142 VAR cr_tlli "CONTENTION_RESOLUTION_TLLI"
143 32
144
145
146 VAR ma_ch_mark "MA_CHANGE_MARK"
147 2
148
149
150 VAR c_value "C_VALUE"
151 6
152
153
154 VAR rxqual "RXQUAL"
155 3
156
157
158 VAR signvar "SIGN_VAR"
159 6
160
161
162 VAR ilev0 "I_LEVEL_TNO"
163 4
164
165
166 VAR ilev1 "I_LEVEL_TN1"
167 4
168
169
170 VAR ilev2 "I_LEVEL_TN2"
171 4
172
173
174 VAR ilev3 "I_LEVEL_TN3"
175 4
176
177
178 VAR ilev4 "I_LEVEL_TN4"
179 4
180
181
182 VAR ilev5 "I_LEVEL_TN5"
183 4
184
185
186 VAR ilev6 "I_LEVEL_TN6"
187 4
188
189
190 VAR ilev7 "I_LEVEL_TN7"
191 4
192
193
194 VAR chan_coding_cmd "CHANNEL_CODING_COMMAND"
195 2
196
197 VAL @m_grlc - VAL_chan_coding_cmd@
198
199 VAR rlc_mode "RLC_MODE"
200 1
201
202 VAL @m_grlc - VAL_rlc_mode@
203
204 VAR pctrl_ack "P_CONTROL_ACK"
205 2
206
207 VAL @m_grlc - VAL_pctrl_ack@
208
209 VAR dl_tfi_assign "DOWNLINK_TFI_ASSIGNMENT"
210 5
211
212
213 VAR ul_tfi_assign "UPLINK_TFI_ASSIGNMENT"
214 5
215
216
217 VAR ul_tfi "Uplink TFI"
218 5
219
220
221 VAR dl_tfi "Downlink TFI"
222 5
223
224
225 VAR alpha "Alpha"
226 4
227
228 VAL @m_grlc - VAL_alpha@
229
230 VAR gamma "GAMMA_TN"
231 5
232
233
234 VAR ta_value "TIMING_ADVANCE_VALUE"
235 6
236
237
238 VAR ta_index "TA_INDEX"
239 4
240
241
242 VAR ta_tn "TIMING_ADVANCE_TIMESLOT_NUMBER"
243 3
244
245
246 VAR ext_len "Extension Length"
247 6
248
249
250 VAR spare_ext "Extension Spare Bits"
251 1
252
253
254 VAR peak_thr_class "PEAK_THROUGHPUT_CLASS"
255 4
256
257
258 VAR radio_prio "RADIO_PRIORITY"
259 2
260
261 VAL @m_grlc - VAL_radio_prio@
262
263 VAR llc_pdu_type "LLC_PDU_TYPE"
264 1
265
266 VAL @m_grlc - VAL_llc_pdu_type@
267
268 VAR rlc_octet_cnt "RLC_OCTET_COUNT"
269 16
270
271
272 VAR ts_alloc "TIMESLOT_ALLOCATION"
273 8
274
275
276 VAR alloc_map "ALLOCATION_BITMAP"
277 1
278
279
280 VAR a_map_len "ALLOCATION_BITMAP_LENGTH"
281 7
282
283
284 VAR bl_o_bl_per "BLOCKS_OR_BLOCK_PERIODS"
285 1
286
287 VAL @m_grlc - VAL_bl_o_bl_per@
288
289 VAR ts_overr "TS_OVERRIDE"
290 8
291
292
293 VAR rel "TBF Starting Time Relative"
294 13
295
296
297 VAR rbb "RECEIVE_BLOCK_BITMAP"
298 1
299
300 VAL @m_grlc - VAL_rbb@
301
302 VAR f_ack_ind "FINAL_ACK_INDICATION"
303 1
304
305 VAL @m_grlc - VAL_f_ack_ind@
306
307 VAR ssn "STARTING_SEQUENCE_NUMBER"
308 7
309
310
311 VAR t1 "T1'"
312 5
313
314
315 VAR t2 "T2"
316 5
317
318
319 VAR t3 "T3"
320 6
321
322
323
324
325
326 COMP glob_tfi "Global TFI"
327 {
328 flag ; Flag
329 < (flag=0) ul_tfi > ; Uplink TFI
330 < (flag=1) dl_tfi > ; Downlink TFI
331 }
332
333
334
335 COMP chan_req_des "Channel Request Description"
336 {
337 peak_thr_class ; PEAK_THROUGHPUT_CLASS
338 radio_prio ; RADIO_PRIORITY
339 rlc_mode ; RLC_MODE
340 llc_pdu_type ; LLC_ PDU_TYPE
341 rlc_octet_cnt ; RLC_OCTET_COUNT
342 }
343
344
345
346 COMP block_struct "Blocks Structure"
347 {
348 bl_o_bl_per ; BLOCKS_OR_BLOCK_PERIODS
349 a_map_len ; ALLOCATION_BITMAP_LENGTH
350 alloc_map [a_map_len..127] ; ALLOCATION_BITMAP
351 }
352
353
354
355 COMP ext_bits "Extensions Bits IE"
356 {
357 ext_len ; extension length
358 spare_ext [ext_len+1..64] ; spare bit extensions IE
359 }
360
361
362
363 COMP ilev "I_LEVEL Structure"
364 {
365 CSN1_S1 ilev0 ; I_LEVEL_TN0
366 CSN1_S1 ilev1 ; I_LEVEL_TN1
367 CSN1_S1 ilev2 ; I_LEVEL_TN2
368 CSN1_S1 ilev3 ; I_LEVEL_TN3
369 CSN1_S1 ilev4 ; I_LEVEL_TN4
370 CSN1_S1 ilev5 ; I_LEVEL_TN5
371 CSN1_S1 ilev6 ; I_LEVEL_TN6
372 CSN1_S1 ilev7 ; I_LEVEL_TN7
373 }
374
375
376
377 COMP chan_qual_rep "Channel Quality Report"
378 {
379 c_value ; C_VALUE
380 rxqual ; RXQUAL
381 signvar ; SIGN_VAR
382 ilev ; I_LEVEL Structure
383 }
384
385
386
387 COMP ack_nack_des "Ack/Nack Description"
388 {
389 f_ack_ind ; FINAL_ACK_INDICATION
390 ssn ; STARTING_SEQUENCE_NUMBER
391 rbb [64] ; RECEIVED_BLOCK_BITMAP
392 }
393
394
395
396 COMP abs "TBF Starting Time Absolute"
397 {
398 t1 ; T1'
399 t3 ; T3
400 t2 ; T2
401 }
402
403
404
405 COMP tbf_s_time "TBF Starting Time"
406 {
407 flag ; Flag
408 < (flag=1) rel > ; TBF Starting Time Relative
409 < (flag=0) abs > ; TBF Starting Time Absolute
410 }
411
412
413
414 COMP fa_s2 "FA Sub2"
415 {
416 tbf_s_time ; TBF_STARTING_TIME
417 CSN1_S1 ts_alloc ; TIMESLOT_ALLOCATION
418 .0 ; spare
419 flag ; Flag
420 < (flag=0) block_struct > ; Block Structure
421 < (flag=1) alloc_map [0..127] > ; ALLOCATION_BITMAP
422 }
423
424
425
426 COMP f_alloc_ack "Fixed Allocation Uplink Ack/Nack"
427 {
428 final_alloc ; FINAL_ALLOCATION
429 flag ; Flag
430 < (flag=0) ts_overr > ; TS_OVERRIDE
431 < (flag=1) fa_s2 > ; FA Sub2
432 }
433
434
435
436 COMP gamma_tn "Gamma Array"
437 {
438 CSN1_S1 gamma ; GAMMA_TN
439 }
440
441
442
443 COMP pwr_par "Power Control Parameters"
444 {
445 alpha ; Alpha
446 gamma_tn [8] ; GAMMA Array
447 }
448
449
450
451 COMP ta_index_tn "TA index and timeslot structure"
452 {
453 ta_index ; TA_INDEX
454 ta_tn ; TA_TIMESLOT
455 }
456
457
458
459 COMP pta "Packet Timing Advance"
460 {
461 CSN1_S1 ta_value ; TIMING_ADVANCE_VALUE
462 CSN1_S1 ta_index_tn ; TA index and timeslot structure
463 }
464
465
466
467
468
469
470 MSG u_grlc_resource_req uplink 0b000101 ; Packet Resource Request
471 {
472 msg_type ; Message Type
473 CSN1_S1 access_type ; Access Type
474 flag ; Flag
475 < (flag=0) glob_tfi > ; Global TFI
476 < (flag=1) tlli_value > ; TLLI
477 CSN1_S1 EXTERN @m_rr_com - ra_cap@ ra_cap ; MS Radio Access Capability
478 chan_req_des ; Channel Request Description
479 CSN1_S1 ma_ch_mark ; MA_CHANGE_MARK
480 c_value ; C_VALUE
481 CSN1_S1 signvar ; SIGN_VAR
482 ilev ; I_LEVEL Structure
483 S_PADDING_0 .00101011 (22) ; Spare Padding
484 }
485
486
487
488 MSG u_grlc_dl_ack uplink 0b000010 ; Packet Downlink Ack/Nack
489 {
490 msg_type ; Message Type
491 dl_tfi ; DOWNLINK_TFI
492 ack_nack_des ; Ack/Nack Description
493 CSN1_S1 chan_req_des ; Channel Request Description
494 chan_qual_rep ; Channel Quality Report
495 S_PADDING_0 .00101011 (22) ; Spare Padding
496 }
497
498
499
500 MSG d_grlc_ul_ack downlink 0b001001 ; Packet Uplink Ack/Nack
501 {
502 msg_type ; Message Type
503 page_mode ; PAGE_MODE
504 .00 ; spare
505 ul_tfi ; UPLINK_TFI
506 .0 ; spare
507 chan_coding_cmd ; CHANNEL_CODING_COMMAND
508 ack_nack_des ; Ack/Nack Description
509 CSN1_S1 cr_tlli ; CONTENTION_RESOLUTION_TLLI :
510 CSN1_S1 pta ; Packet Timing Advance
511 CSN1_S1 pwr_par ; Power Control Parameters
512 CSN1_S1 ext_bits ; Extension Structure
513 CSN1_S1 f_alloc_ack ; Fixed Allocation Uplink Ack/Nack
514 S_PADDING_0 .00101011 (22) ; Spare Padding
515 }
516
517
518
519 MSG u_grlc_ctrl_ack uplink 0b000001 ; Packet Control Acknowledgement
520 {
521 msg_type ; Message Type
522 tlli_value ; TLLI
523 pctrl_ack ; P_CTRL_ACK
524 S_PADDING_0 .00101011 (22) ; Spare Padding
525 }
526
527
528
529 MSG u_grlc_ul_dummy uplink 0b000011 ; Packet Uplink Dummy Control Block
530 {
531 msg_type ; Message Type
532 tlli_value ; TLLI
533 S_PADDING_0 .00101011 (22) ; Spare Padding
534 }
535
536
537
538
539
540