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comparison cdg3/cdginc-locosto/p_uart.h @ 16:c15047b3d00d

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cdg3: import from freecalypso-citrine/cdg
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 27 Sep 2016 16:27:34 +0000
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15:c8bdae60fcb1 16:c15047b3d00d
1 /*
2 +--------------------------------------------------------------------------+
3 | PROJECT : PROTOCOL STACK |
4 | FILE : p_uart.h |
5 | SOURCE : "sap\uart.pdf" |
6 | LastModified : "2002-03-11" |
7 | IdAndVersion : "8441.117.99.014" |
8 | SrcFileTime : "Thu Nov 29 09:56:02 2007" |
9 | Generated by CCDGEN_2.5.5A on Thu Sep 25 09:18:53 2014 |
10 | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! |
11 +--------------------------------------------------------------------------+
12 */
13
14 /* PRAGMAS
15 * PREFIX : NONE
16 * COMPATIBILITY_DEFINES : NO (require PREFIX)
17 * ALWAYS_ENUM_IN_VAL_FILE: NO
18 * ENABLE_GROUP: NO
19 * CAPITALIZE_TYPENAME: NO
20 */
21
22
23 #ifndef P_UART_H
24 #define P_UART_H
25
26
27 #define CDG_ENTER__P_UART_H
28
29 #define CDG_ENTER__FILENAME _P_UART_H
30 #define CDG_ENTER__P_UART_H__FILE_TYPE CDGINC
31 #define CDG_ENTER__P_UART_H__LAST_MODIFIED _2002_03_11
32 #define CDG_ENTER__P_UART_H__ID_AND_VERSION _8441_117_99_014
33
34 #define CDG_ENTER__P_UART_H__SRC_FILE_TIME _Thu_Nov_29_09_56_02_2007
35
36 #include "CDG_ENTER.h"
37
38 #undef CDG_ENTER__P_UART_H
39
40 #undef CDG_ENTER__FILENAME
41
42
43 #include "p_uart.val"
44
45 #ifndef __T_comPar__
46 #define __T_comPar__
47 /*
48 * Parameters of serial link
49 * CCDGEN:WriteStruct_Count==3110
50 */
51 typedef struct
52 {
53 U8 speed; /*< 0: 1> baud rate */
54 U8 bpc; /*< 1: 1> bits per character */
55 U8 nsb; /*< 2: 1> stop bits */
56 U8 parity; /*< 3: 1> parity of serial link */
57 U8 flow_rx; /*< 4: 1> flow control mode RX */
58 U8 flow_tx; /*< 5: 1> flow control mode TX */
59 U8 xon_valid; /*< 6: 1> indicator whether xon is valid */
60 U8 xon; /*< 7: 1> XOn character for XON/XOFF flow control */
61 U8 xoff_valid; /*< 8: 1> indicator whether xoff is valid */
62 U8 xoff; /*< 9: 1> XOff character for XON/XOFF flow control */
63 U8 esc_valid; /*< 10: 1> indicator whether esc_char and esc_gp are valid */
64 U8 esc_char; /*< 11: 1> escape character */
65 U16 esc_gp; /*< 12: 2> guard period */
66 U8 _align0; /*< 14: 1> alignment */
67 U8 _align1; /*< 15: 1> alignment */
68 } T_comPar;
69 #endif
70
71
72 /*
73 * End of substructure section, begin of primitive definition section
74 */
75
76 #ifndef __T_UART_PARAMETERS_REQ__
77 #define __T_UART_PARAMETERS_REQ__
78 /*
79 *
80 * CCDGEN:WriteStruct_Count==3111
81 */
82 typedef struct
83 {
84 U8 device; /*< 0: 1> device number */
85 U8 _align0; /*< 1: 1> alignment */
86 U8 _align1; /*< 2: 1> alignment */
87 U8 _align2; /*< 3: 1> alignment */
88 T_comPar comPar; /*< 4: 16> Parameters of serial link */
89 } T_UART_PARAMETERS_REQ;
90 #endif
91
92 #ifndef __T_UART_PARAMETERS_CNF__
93 #define __T_UART_PARAMETERS_CNF__
94 /*
95 *
96 * CCDGEN:WriteStruct_Count==3112
97 */
98 typedef struct
99 {
100 U8 device; /*< 0: 1> device number */
101 U8 _align0; /*< 1: 1> alignment */
102 U8 _align1; /*< 2: 1> alignment */
103 U8 _align2; /*< 3: 1> alignment */
104 } T_UART_PARAMETERS_CNF;
105 #endif
106
107 #ifndef __T_UART_PARAMETERS_IND__
108 #define __T_UART_PARAMETERS_IND__
109 /*
110 *
111 * CCDGEN:WriteStruct_Count==3113
112 */
113 typedef struct
114 {
115 U8 uart_instances; /*< 0: 1> number of UART instances */
116 U8 _align0; /*< 1: 1> alignment */
117 U8 _align1; /*< 2: 1> alignment */
118 U8 _align2; /*< 3: 1> alignment */
119 } T_UART_PARAMETERS_IND;
120 #endif
121
122 #ifndef __T_UART_DTI_REQ__
123 #define __T_UART_DTI_REQ__
124 /*
125 *
126 * CCDGEN:WriteStruct_Count==3114
127 */
128 typedef struct
129 {
130 U8 dti_conn; /*< 0: 1> DTI connect */
131 U8 device; /*< 1: 1> device number */
132 U8 dlci; /*< 2: 1> data link connection identifier */
133 U8 direction; /*< 3: 1> direction of the DTI link */
134 U32 link_id; /*< 4: 4> identifier of DTI connection */
135 U32 entity_name; /*< 8: 4> communication entity name */
136 } T_UART_DTI_REQ;
137 #endif
138
139 #ifndef __T_UART_DTI_CNF__
140 #define __T_UART_DTI_CNF__
141 /*
142 *
143 * CCDGEN:WriteStruct_Count==3115
144 */
145 typedef struct
146 {
147 U8 dti_conn; /*< 0: 1> DTI connect */
148 U8 device; /*< 1: 1> device number */
149 U8 dlci; /*< 2: 1> data link connection identifier */
150 U8 _align0; /*< 3: 1> alignment */
151 } T_UART_DTI_CNF;
152 #endif
153
154 #ifndef __T_UART_DTI_IND__
155 #define __T_UART_DTI_IND__
156 /*
157 *
158 * CCDGEN:WriteStruct_Count==3116
159 */
160 typedef struct
161 {
162 U8 dti_conn; /*< 0: 1> DTI connect */
163 U8 device; /*< 1: 1> device number */
164 U8 dlci; /*< 2: 1> data link connection identifier */
165 U8 _align0; /*< 3: 1> alignment */
166 } T_UART_DTI_IND;
167 #endif
168
169 #ifndef __T_UART_DISABLE_REQ__
170 #define __T_UART_DISABLE_REQ__
171 /*
172 *
173 * CCDGEN:WriteStruct_Count==3117
174 */
175 typedef struct
176 {
177 U8 device; /*< 0: 1> device number */
178 U8 _align0; /*< 1: 1> alignment */
179 U8 _align1; /*< 2: 1> alignment */
180 U8 _align2; /*< 3: 1> alignment */
181 } T_UART_DISABLE_REQ;
182 #endif
183
184 #ifndef __T_UART_DISABLE_CNF__
185 #define __T_UART_DISABLE_CNF__
186 /*
187 *
188 * CCDGEN:WriteStruct_Count==3118
189 */
190 typedef struct
191 {
192 U8 device; /*< 0: 1> device number */
193 U8 _align0; /*< 1: 1> alignment */
194 U8 _align1; /*< 2: 1> alignment */
195 U8 _align2; /*< 3: 1> alignment */
196 } T_UART_DISABLE_CNF;
197 #endif
198
199 #ifndef __T_UART_RING_REQ__
200 #define __T_UART_RING_REQ__
201 /*
202 *
203 * CCDGEN:WriteStruct_Count==3119
204 */
205 typedef struct
206 {
207 U8 device; /*< 0: 1> device number */
208 U8 dlci; /*< 1: 1> data link connection identifier */
209 U8 line_state; /*< 2: 1> state of line */
210 U8 _align0; /*< 3: 1> alignment */
211 } T_UART_RING_REQ;
212 #endif
213
214 #ifndef __T_UART_RING_CNF__
215 #define __T_UART_RING_CNF__
216 /*
217 *
218 * CCDGEN:WriteStruct_Count==3120
219 */
220 typedef struct
221 {
222 U8 device; /*< 0: 1> device number */
223 U8 dlci; /*< 1: 1> data link connection identifier */
224 U8 _align0; /*< 2: 1> alignment */
225 U8 _align1; /*< 3: 1> alignment */
226 } T_UART_RING_CNF;
227 #endif
228
229 #ifndef __T_UART_DCD_REQ__
230 #define __T_UART_DCD_REQ__
231 /*
232 *
233 * CCDGEN:WriteStruct_Count==3121
234 */
235 typedef struct
236 {
237 U8 device; /*< 0: 1> device number */
238 U8 dlci; /*< 1: 1> data link connection identifier */
239 U8 line_state; /*< 2: 1> state of line */
240 U8 _align0; /*< 3: 1> alignment */
241 } T_UART_DCD_REQ;
242 #endif
243
244 #ifndef __T_UART_DCD_CNF__
245 #define __T_UART_DCD_CNF__
246 /*
247 *
248 * CCDGEN:WriteStruct_Count==3122
249 */
250 typedef struct
251 {
252 U8 device; /*< 0: 1> device number */
253 U8 dlci; /*< 1: 1> data link connection identifier */
254 U8 _align0; /*< 2: 1> alignment */
255 U8 _align1; /*< 3: 1> alignment */
256 } T_UART_DCD_CNF;
257 #endif
258
259 #ifndef __T_UART_ESCAPE_REQ__
260 #define __T_UART_ESCAPE_REQ__
261 /*
262 *
263 * CCDGEN:WriteStruct_Count==3123
264 */
265 typedef struct
266 {
267 U8 device; /*< 0: 1> device number */
268 U8 dlci; /*< 1: 1> data link connection identifier */
269 U8 detection; /*< 2: 1> escape sequence detection */
270 U8 _align0; /*< 3: 1> alignment */
271 } T_UART_ESCAPE_REQ;
272 #endif
273
274 #ifndef __T_UART_ESCAPE_CNF__
275 #define __T_UART_ESCAPE_CNF__
276 /*
277 *
278 * CCDGEN:WriteStruct_Count==3124
279 */
280 typedef struct
281 {
282 U8 device; /*< 0: 1> device number */
283 U8 dlci; /*< 1: 1> data link connection identifier */
284 U8 _align0; /*< 2: 1> alignment */
285 U8 _align1; /*< 3: 1> alignment */
286 } T_UART_ESCAPE_CNF;
287 #endif
288
289 #ifndef __T_UART_DETECTED_IND__
290 #define __T_UART_DETECTED_IND__
291 /*
292 *
293 * CCDGEN:WriteStruct_Count==3125
294 */
295 typedef struct
296 {
297 U8 device; /*< 0: 1> device number */
298 U8 dlci; /*< 1: 1> data link connection identifier */
299 U8 cause; /*< 2: 1> cause of indication */
300 U8 _align0; /*< 3: 1> alignment */
301 } T_UART_DETECTED_IND;
302 #endif
303
304 #ifndef __T_UART_ERROR_IND__
305 #define __T_UART_ERROR_IND__
306 /*
307 *
308 * CCDGEN:WriteStruct_Count==3126
309 */
310 typedef struct
311 {
312 U8 device; /*< 0: 1> device number */
313 U8 dlci; /*< 1: 1> data link connection identifier */
314 U8 error; /*< 2: 1> error code */
315 U8 _align0; /*< 3: 1> alignment */
316 } T_UART_ERROR_IND;
317 #endif
318
319 #ifndef __T_UART_MUX_START_REQ__
320 #define __T_UART_MUX_START_REQ__
321 /*
322 *
323 * CCDGEN:WriteStruct_Count==3127
324 */
325 typedef struct
326 {
327 U8 device; /*< 0: 1> device number */
328 U8 mode; /*< 1: 1> transparency mechanism */
329 U8 frame_type; /*< 2: 1> type of frame */
330 U8 _align0; /*< 3: 1> alignment */
331 U16 n1; /*< 4: 2> maximum frame size */
332 U8 t1; /*< 6: 1> acknowledgement timer */
333 U8 n2; /*< 7: 1> maximum numer of retransmissions */
334 U8 t2; /*< 8: 1> response timer for the multiplexer control channel */
335 U8 t3; /*< 9: 1> wake up response timer */
336 U8 _align1; /*< 10: 1> alignment */
337 U8 _align2; /*< 11: 1> alignment */
338 } T_UART_MUX_START_REQ;
339 #endif
340
341 #ifndef __T_UART_MUX_START_CNF__
342 #define __T_UART_MUX_START_CNF__
343 /*
344 *
345 * CCDGEN:WriteStruct_Count==3128
346 */
347 typedef struct
348 {
349 U8 device; /*< 0: 1> device number */
350 U8 _align0; /*< 1: 1> alignment */
351 U8 _align1; /*< 2: 1> alignment */
352 U8 _align2; /*< 3: 1> alignment */
353 } T_UART_MUX_START_CNF;
354 #endif
355
356 #ifndef __T_UART_MUX_DLC_ESTABLISH_IND__
357 #define __T_UART_MUX_DLC_ESTABLISH_IND__
358 /*
359 *
360 * CCDGEN:WriteStruct_Count==3129
361 */
362 typedef struct
363 {
364 U8 device; /*< 0: 1> device number */
365 U8 dlci; /*< 1: 1> data link connection identifier */
366 U8 convergence; /*< 2: 1> convergence layer */
367 U8 _align0; /*< 3: 1> alignment */
368 U16 n1; /*< 4: 2> maximum frame size */
369 U8 service; /*< 6: 1> service on DLC */
370 U8 _align1; /*< 7: 1> alignment */
371 } T_UART_MUX_DLC_ESTABLISH_IND;
372 #endif
373
374 #ifndef __T_UART_MUX_DLC_ESTABLISH_RES__
375 #define __T_UART_MUX_DLC_ESTABLISH_RES__
376 /*
377 *
378 * CCDGEN:WriteStruct_Count==3130
379 */
380 typedef struct
381 {
382 U8 device; /*< 0: 1> device number */
383 U8 dlci; /*< 1: 1> data link connection identifier */
384 U16 n1; /*< 2: 2> maximum frame size */
385 } T_UART_MUX_DLC_ESTABLISH_RES;
386 #endif
387
388 #ifndef __T_UART_MUX_DLC_RELEASE_REQ__
389 #define __T_UART_MUX_DLC_RELEASE_REQ__
390 /*
391 *
392 * CCDGEN:WriteStruct_Count==3131
393 */
394 typedef struct
395 {
396 U8 device; /*< 0: 1> device number */
397 U8 dlci; /*< 1: 1> data link connection identifier */
398 U8 _align0; /*< 2: 1> alignment */
399 U8 _align1; /*< 3: 1> alignment */
400 } T_UART_MUX_DLC_RELEASE_REQ;
401 #endif
402
403 #ifndef __T_UART_MUX_DLC_RELEASE_IND__
404 #define __T_UART_MUX_DLC_RELEASE_IND__
405 /*
406 *
407 * CCDGEN:WriteStruct_Count==3132
408 */
409 typedef struct
410 {
411 U8 device; /*< 0: 1> device number */
412 U8 dlci; /*< 1: 1> data link connection identifier */
413 U8 _align0; /*< 2: 1> alignment */
414 U8 _align1; /*< 3: 1> alignment */
415 } T_UART_MUX_DLC_RELEASE_IND;
416 #endif
417
418 #ifndef __T_UART_MUX_SLEEP_REQ__
419 #define __T_UART_MUX_SLEEP_REQ__
420 /*
421 *
422 * CCDGEN:WriteStruct_Count==3133
423 */
424 typedef struct
425 {
426 U8 device; /*< 0: 1> device number */
427 U8 _align0; /*< 1: 1> alignment */
428 U8 _align1; /*< 2: 1> alignment */
429 U8 _align2; /*< 3: 1> alignment */
430 } T_UART_MUX_SLEEP_REQ;
431 #endif
432
433 #ifndef __T_UART_MUX_SLEEP_IND__
434 #define __T_UART_MUX_SLEEP_IND__
435 /*
436 *
437 * CCDGEN:WriteStruct_Count==3134
438 */
439 typedef struct
440 {
441 U8 device; /*< 0: 1> device number */
442 U8 _align0; /*< 1: 1> alignment */
443 U8 _align1; /*< 2: 1> alignment */
444 U8 _align2; /*< 3: 1> alignment */
445 } T_UART_MUX_SLEEP_IND;
446 #endif
447
448 #ifndef __T_UART_MUX_WAKEUP_REQ__
449 #define __T_UART_MUX_WAKEUP_REQ__
450 /*
451 *
452 * CCDGEN:WriteStruct_Count==3135
453 */
454 typedef struct
455 {
456 U8 device; /*< 0: 1> device number */
457 U8 _align0; /*< 1: 1> alignment */
458 U8 _align1; /*< 2: 1> alignment */
459 U8 _align2; /*< 3: 1> alignment */
460 } T_UART_MUX_WAKEUP_REQ;
461 #endif
462
463 #ifndef __T_UART_MUX_WAKEUP_IND__
464 #define __T_UART_MUX_WAKEUP_IND__
465 /*
466 *
467 * CCDGEN:WriteStruct_Count==3136
468 */
469 typedef struct
470 {
471 U8 device; /*< 0: 1> device number */
472 U8 _align0; /*< 1: 1> alignment */
473 U8 _align1; /*< 2: 1> alignment */
474 U8 _align2; /*< 3: 1> alignment */
475 } T_UART_MUX_WAKEUP_IND;
476 #endif
477
478 #ifndef __T_UART_MUX_CLOSE_REQ__
479 #define __T_UART_MUX_CLOSE_REQ__
480 /*
481 *
482 * CCDGEN:WriteStruct_Count==3137
483 */
484 typedef struct
485 {
486 U8 device; /*< 0: 1> device number */
487 U8 _align0; /*< 1: 1> alignment */
488 U8 _align1; /*< 2: 1> alignment */
489 U8 _align2; /*< 3: 1> alignment */
490 } T_UART_MUX_CLOSE_REQ;
491 #endif
492
493 #ifndef __T_UART_MUX_CLOSE_IND__
494 #define __T_UART_MUX_CLOSE_IND__
495 /*
496 *
497 * CCDGEN:WriteStruct_Count==3138
498 */
499 typedef struct
500 {
501 U8 device; /*< 0: 1> device number */
502 U8 _align0; /*< 1: 1> alignment */
503 U8 _align1; /*< 2: 1> alignment */
504 U8 _align2; /*< 3: 1> alignment */
505 } T_UART_MUX_CLOSE_IND;
506 #endif
507
508 #ifndef __T_UART_DRIVER_SENT_IND__
509 #define __T_UART_DRIVER_SENT_IND__
510 /*
511 *
512 * CCDGEN:WriteStruct_Count==3139
513 */
514 typedef struct
515 {
516 U32 devId; /*< 0: 4> device ID */
517 } T_UART_DRIVER_SENT_IND;
518 #endif
519
520 #ifndef __T_UART_DRIVER_RECEIVED_IND__
521 #define __T_UART_DRIVER_RECEIVED_IND__
522 /*
523 *
524 * CCDGEN:WriteStruct_Count==3140
525 */
526 typedef struct
527 {
528 U32 devId; /*< 0: 4> device ID */
529 } T_UART_DRIVER_RECEIVED_IND;
530 #endif
531
532 #ifndef __T_UART_DRIVER_FLUSHED_IND__
533 #define __T_UART_DRIVER_FLUSHED_IND__
534 /*
535 *
536 * CCDGEN:WriteStruct_Count==3141
537 */
538 typedef struct
539 {
540 U32 devId; /*< 0: 4> device ID */
541 } T_UART_DRIVER_FLUSHED_IND;
542 #endif
543
544 #ifndef __T_UART_DRIVER_CONNECT_IND__
545 #define __T_UART_DRIVER_CONNECT_IND__
546 /*
547 *
548 * CCDGEN:WriteStruct_Count==3142
549 */
550 typedef struct
551 {
552 U32 devId; /*< 0: 4> device ID */
553 } T_UART_DRIVER_CONNECT_IND;
554 #endif
555
556 #ifndef __T_UART_DRIVER_DISCONNECT_IND__
557 #define __T_UART_DRIVER_DISCONNECT_IND__
558 /*
559 *
560 * CCDGEN:WriteStruct_Count==3143
561 */
562 typedef struct
563 {
564 U32 devId; /*< 0: 4> device ID */
565 } T_UART_DRIVER_DISCONNECT_IND;
566 #endif
567
568 #ifndef __T_UART_DRIVER_CLEAR_IND__
569 #define __T_UART_DRIVER_CLEAR_IND__
570 /*
571 *
572 * CCDGEN:WriteStruct_Count==3144
573 */
574 typedef struct
575 {
576 U32 devId; /*< 0: 4> device ID */
577 } T_UART_DRIVER_CLEAR_IND;
578 #endif
579
580
581 #include "CDG_LEAVE.h"
582
583
584 #endif