FreeCalypso > hg > fc-magnetite
comparison cdg3/sap/cgrlc.pdf @ 16:c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Tue, 27 Sep 2016 16:27:34 +0000 |
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1 ;******************************************************************************** | |
2 ;*** File : cgrlc.pdf | |
3 ;*** Creation : Wed Mar 11 09:58:07 CST 2009 | |
4 ;*** XSLT Processor : Apache Software Foundation / http://xml.apache.org/xalan-j / supports XSLT-Ver: 1 | |
5 ;*** Copyright : (c) Texas Instruments AG, Berlin Germany 2002 | |
6 ;******************************************************************************** | |
7 ;*** Document Type : Service Access Point Specification | |
8 ;*** Document Name : cgrlc | |
9 ;*** Document No. : 8010.119.008.04 | |
10 ;*** Document Date : 2004-05-17 | |
11 ;*** Document Status: BEING_PROCESSED | |
12 ;*** Document Author: SAB | |
13 ;******************************************************************************** | |
14 | |
15 | |
16 | |
17 PRAGMA SRC_FILE_TIME "Thu Nov 29 09:38:02 2007" | |
18 PRAGMA LAST_MODIFIED "2004-05-17" | |
19 PRAGMA ID_AND_VERSION "8010.119.008.04" | |
20 PRAGMA PREFIX CGRLC ; Prefix for this document | |
21 PRAGMA ALLWAYS_ENUM_IN_VAL_FILE NO ; Adds enumerations in the .val file. | |
22 PRAGMA ENABLE_GROUP NO ; Disable h-file grouping | |
23 PRAGMA COMPATIBILITY_DEFINES NO ; Compatible to the old #defines | |
24 | |
25 | |
26 | |
27 CONST MAX_CTRL_MSG_SIZE 23 ; Maximum size of a control message in bytes. | |
28 CONST MAX_TIMESLOTS 8 ; Maximum number of timeslots | |
29 | |
30 | |
31 | |
32 VALTAB VAL_access_type | |
33 VAL 0 AT_NULL "No access is required" | |
34 VAL 1 AT_ONE_PHASE "One phase access requested." | |
35 VAL 2 AT_TWO_PHASE "Two phase access requested." | |
36 VAL 3 AT_SHORT_ACCESS "Short access requested." | |
37 VAL 4 AT_PAGE_RESPONSE "Page response requested." | |
38 VAL 5 AT_CELL_UPDATE "Access for cell update primitive requested." | |
39 VAL 6 AT_MM_PROCEDURE "Access for MM/GMM primitive requested." | |
40 VAL 7 AT_SINGLE_BLOCK "Only used in GRR: access for single block without TBF" | |
41 | |
42 VALTAB VAL_dl_timeslot_offset | |
43 VAL 0 TEST_TN0 "Downlink timeslot offset 0." | |
44 VAL 1 TEST_TN1 "Downlink timeslot offset 1." | |
45 VAL 2 TEST_TN2 "Downlink timeslot offset 2." | |
46 VAL 3 TEST_TN3 "Downlink timeslot offset 3." | |
47 VAL 4 TEST_TN4 "Downlink timeslot offset 4." | |
48 VAL 5 TEST_TN5 "Downlink timeslot offset 5." | |
49 VAL 6 TEST_TN6 "Downlink timeslot offset 6." | |
50 VAL 7 TEST_TN7 "Downlink timeslot offset 7." | |
51 | |
52 VALTAB VAL_failure | |
53 VAL 0 ACCESS_2_NETWORK_NOT_ALLOWED "Access to the network is not allowed." | |
54 VAL 1 PACKET_ACCESS_FAILURE "Failure during packet access procedure, e.g. T3162 expired." | |
55 VAL 2 RLC_MAC_ERROR "T3168 expires during contention resolution." | |
56 VAL 3 TLLI_MISMATCH "TLLI mismatch has occurred." | |
57 VAL 4 TBF_ESTABLISHMENT_FAILURE "T3164 expires or failure occurs due to any other reason." | |
58 VAL 5 RESUMPTION_FAILURE "Resumption failure after dedicated mode was left." | |
59 VAL 6 CONTENTION_RESOLUTION_FAILED "Contention Resolution has failed." | |
60 | |
61 VALTAB VAL_prim_status | |
62 VAL 0 PRIM_STATUS_NULL "No primitives shall be deleted." | |
63 VAL 1 PRIM_STATUS_ONE "One primitive shall be deleted." | |
64 VAL 2 PRIM_STATUS_TBF "All primitives, which belongs to the current TBF, shall be deleted." | |
65 VAL 0xFF PRIM_STATUS_ALL "All primitives shall be deleted." | |
66 | |
67 VALTAB VAL_prim_type | |
68 VAL 0 PRIM_TYPE_GMM "At least one GMM primitive was confirmed." | |
69 VAL 1 PRIM_TYPE_OTHER "No GMM primitive was confirmed. Other User data was confirmed." | |
70 | |
71 VALTAB VAL_tbf_rel_cause | |
72 VAL 0 TBF_REL_NORMAL "Normal TBF release is or shall be performed." | |
73 VAL 1 TBF_REL_ABNORMAL "Abnormal TBF release is or shall be performed." | |
74 VAL 2 TBF_REL_CR_FAILED "Contention resolution failed" | |
75 VAL 3 TBF_REL_WITH_CELL_RESELECT "TBF release with cell reselection" | |
76 | |
77 VALTAB VAL_starting_time | |
78 VAL 0xFFFFFFFF STARTING_TIME_NOT_PRESENT "No TBF starting time present." | |
79 | |
80 VALTAB VAL_test_mode_flag | |
81 VAL 0 TEST_RANDOM "Pseudo random data." | |
82 VAL 1 LOOP "Loop back." | |
83 VAL 0xFE TEST_MODE_RELEASE "used in GRLC, intermediate status during release procedure" | |
84 VAL 0xFF NO_TEST_MODE "No testmode active" | |
85 | |
86 VALTAB VAL_ti | |
87 VAL 0 TLLI_NOT_PRESENT "TLLI shall not be sent in the RLC data block." | |
88 VAL 1 TLLI_PRESENT "TLLI shall be sent in the RLC data block." | |
89 | |
90 VALTAB VAL_cs_mode | |
91 VAL 0 CS_MODE_1 "Coding scheme 1." | |
92 VAL 1 CS_MODE_2 "Coding scheme 2." | |
93 VAL 2 CS_MODE_3 "Coding scheme 3." | |
94 VAL 3 CS_MODE_4 "Coding scheme 4." | |
95 | |
96 VALTAB VAL_tlli_cs_mode | |
97 VAL 0 TLLI_CS_MODE_1 "CS 1 shall be used during Contention resolution." | |
98 VAL 1 TLLI_CS_MODE_DEF "Default coding scheme shall be used during Contention resolution." | |
99 | |
100 VALTAB VAL_mac_mode | |
101 VAL 0 MAC_MODE_DA "Dynamic allocation." | |
102 VAL 1 MAC_MODE_EDA "Extended dynamic allocation." | |
103 VAL 2 MAC_MODE_FA "Fixed allocation." | |
104 VAL 3 MAC_MODE_FA_HD "Fixed allocation, half duplex mode." | |
105 | |
106 VALTAB VAL_queue_mode | |
107 VAL 0 QUEUE_MODE_DEFAULT "Use current queue." | |
108 VAL 1 QUEUE_MODE_GMM "Use GMM queue (RAU procedure)." | |
109 VAL 2 QUEUE_MODE_LLC "Use LLC queue." | |
110 | |
111 VALTAB VAL_rlc_mode | |
112 VAL 0 RLC_MODE_ACK "RLC acknowledged mode." | |
113 VAL 1 RLC_MODE_UACK "RLC unacknowledged mode." | |
114 | |
115 VALTAB VAL_tbf_mode | |
116 VAL 0 TBF_MODE_NULL "No tbf active, used in GRR" | |
117 VAL 1 TBF_MODE_ACCESS_FAILED "Access has failed. GRLC handles prim queue." | |
118 VAL 2 TBF_MODE_DL "Downlink TBF is assigned/released." | |
119 VAL 3 TBF_MODE_UL "Uplink TBF is assigned/released." | |
120 VAL 4 TBF_MODE_TMA "Uplink TBF for Testmode A is assigned." | |
121 VAL 5 TBF_MODE_TMB "Uplink TBF for Testmode B is assigned." | |
122 VAL 6 TBF_MODE_DL_UL "Uplink and Downlink TBF assigned/released." | |
123 VAL 7 TBF_MODE_ESTABLISHMENT_FAILURE "T3164 expires or failure occurs due to any other reason" | |
124 VAL 8 TBF_MODE_2PA %REL99 AND TI_PS_FF_TBF_EST_PACCH% "2 Phase access mode during TBF est on PACCH" | |
125 | |
126 VALTAB VAL_rxlev | |
127 VAL 0x00 RXLEV_MIN "Minimum receive signal level value." | |
128 VAL 0x3F RXLEV_MAX "Maximum receive signal level value." | |
129 VAL 0x80 RXLEV_NONE "Specific value used to indicate that no new RX value is present or RX value is invalid." | |
130 | |
131 VALTAB VAL_alpha | |
132 VAL 0xFF ALPHA_INVALID "No alpha value is available." | |
133 | |
134 VALTAB VAL_pc_meas_chan | |
135 VAL 0 MEAS_CHAN_BCCH "Downlink measurements for power control shall be made on BCCH." | |
136 VAL 1 MEAS_CHAN_PDCH "Downlink measurements for power control shall be made on PDCH." | |
137 | |
138 VALTAB VAL_gamma_ch | |
139 VAL 0xFF GAMMA_INVALID "No GCH is available." | |
140 | |
141 VALTAB VAL_disable_class | |
142 VAL 0 DISABLE_CLASS_NULL "Initial state of the disable class" | |
143 VAL 1 DISABLE_CLASS_OTHER "Any other cause for disable class" | |
144 VAL 2 DISABLE_CLASS_CR "Disable cause is cell reselection" | |
145 | |
146 VALTAB VAL_poll_b_type | |
147 VAL 0 POLL_NONE "No poll position present,only in grlc" | |
148 VAL 1 POLL_COLLISION "Collision detected, only in grlc" | |
149 VAL 2 POLL_DATA "Poll for dl ack/nack, only in grlc" | |
150 VAL 3 POLL_UACK "Poll for pca uplink tbf relaase" | |
151 VAL 4 POLL_CTRL "Default poll for control msg." | |
152 VAL 5 POLL_RES_NB "Poll for normal burst with packet polling req" | |
153 VAL 6 POLL_RES_AB "Poll for access burst with packet polling req" | |
154 VAL 7 POLL_RE_ASS %REL99 AND TI_PS_FF_TBF_EST_PACCH% "Poll for TBF on PACCH for sendong PCA or PRR " | |
155 | |
156 VALTAB VAL_burst_type | |
157 VAL 0 BURST_TYPE_AB "Access burst" | |
158 VAL 1 BURST_TYPE_NB "Normal burst" | |
159 | |
160 VALTAB VAL_ab_type | |
161 VAL 0 AB_8_BIT "8 bit access burst" | |
162 VAL 1 AB_11_BIT "11 bit access burst" | |
163 | |
164 VALTAB VAL_blk_owner | |
165 VAL 0 BLK_OWNER_CTRL "Owner is service ctrl (GRR)." | |
166 VAL 1 BLK_OWNER_CS "Owner is service cs (GRR)." | |
167 VAL 2 BLK_OWNER_TM "Owner is service tm (GRLC)." | |
168 VAL 3 BLK_OWNER_MEAS "Owner is service meas (GRR)." | |
169 VAL 4 BLK_OWNER_NONE "Owner is not specified" | |
170 | |
171 VALTAB VAL_cu_cause | |
172 VAL 0 RA_DEFAULT "No action required" | |
173 VAL 1 RA_CU "Next packet access cause will be cell update" | |
174 | |
175 VALTAB VAL_pmax | |
176 VAL 0xFF NO_UPDATE_N3102 "N3102 shall not be updated" | |
177 | |
178 VALTAB VAL_llc_prim_type | |
179 VAL 0 LLC_PRIM_TYPE_NULL "No primitive available" | |
180 VAL 1 LLC_PRIM_TYPE_DATA_REQ "GRLC_DATA_REQ" | |
181 VAL 2 LLC_PRIM_TYPE_UNITDATA_REQ "GRLC_UNITDATA_REQ" | |
182 | |
183 VALTAB VAL_ac_class | |
184 VAL 0 - 7 "Allowed Radio priority" | |
185 VAL 8 CCCH_AC_NOT_ALLOWED "CCCH access control class not allowed" | |
186 VAL 9 PCCCH_AC_NOT_ALLOWED "PCCCH access control class not allowed" | |
187 VAL 10 PCCCH_AC_ALLOWED "PCCCH access control class allowed" | |
188 | |
189 VALTAB VAL_enable_cause | |
190 VAL 0 ENAC_NORMAL "Normal Operation" | |
191 VAL 1 ENAC_ABNORM_RELEASE_CRESELECT_FAILED "Abnormal Release with Cell Re-Selection has Failed" | |
192 | |
193 VALTAB VAL_rlc_db_granted | |
194 VAL 0 - 255 "Close ended tbf" | |
195 VAL 0 OPEN_ENDED_TBF "Open ended tbf" | |
196 | |
197 VALTAB VAL_t3314_val | |
198 VAL 0x0 - 0xFFFFFFFF "Values Range" | |
199 VAL 0x00000000 STANDBY "MS always in STANDBY state." | |
200 VAL 0x0000ABE0 T3314_DEFAULT "Default timeout value for T3314." | |
201 VAL 0xFFFFFFFF DEACTIVATED "MS always in READY state." | |
202 | |
203 VALTAB VAL_pdch_band | |
204 VAL 0 GSM_400 "GSM 400MHz Band." | |
205 VAL 1 GSM_850 "GSM 850MHz Band." | |
206 VAL 2 GSM_900 "GSM 900MHz Band." | |
207 VAL 3 DCS_1800 "DCS 1800MHz Band." | |
208 VAL 4 PCS_1900 "PCS 1900MHz Band." | |
209 | |
210 VALTAB VAL_ilev | |
211 VAL 0x00 ILEV_MIN "Minimum interference level value." | |
212 VAL 0x3F ILEV_MAX "Maximum interference level value." | |
213 VAL 0x80 ILEV_NONE "Specific value used to indicate that no new interference level value is present or interference level value is invalid." | |
214 | |
215 VALTAB Val_pfi_support %REL99% | |
216 VAL 0 PFI_NOT_SUPPORTED "PFC Not Supported" | |
217 VAL 1 PFI_SUPPORTED "PFC Supported" | |
218 | |
219 | |
220 | |
221 | |
222 VAR access_type "Access Type." B | |
223 | |
224 VAL @p_cgrlc - VAL_access_type@ | |
225 | |
226 VAR data_array "Data Array." B | |
227 | |
228 | |
229 VAR bitmap_array "Bitmap array" B | |
230 | |
231 | |
232 VAR dl_timeslot_offset "Downlink Timeslot Offset." B | |
233 | |
234 VAL @p_cgrlc - VAL_dl_timeslot_offset@ | |
235 | |
236 VAR tn_mask "timeslot mask" B | |
237 | |
238 | |
239 VAR tn "Timeslot number" B | |
240 | |
241 VAL @p_cgrlc - VAL_dl_timeslot_offset@ | |
242 | |
243 VAR failure "Lower layer failure." B | |
244 | |
245 VAL @p_cgrlc - VAL_failure@ | |
246 | |
247 VAR bs_cv_max "Maximum Countdown value." B | |
248 | |
249 | |
250 VAR no_of_pdus "Number of PDUs." S | |
251 | |
252 | |
253 VAR nts_max "Number of Timeslots." B | |
254 | |
255 | |
256 VAR prim_status "Primitive Queue Handler." B | |
257 | |
258 VAL @p_cgrlc - VAL_prim_status@ | |
259 | |
260 VAR prim_type "Type of primitive." B | |
261 | |
262 VAL @p_cgrlc - VAL_prim_type@ | |
263 | |
264 VAR tbf_rel_cause "TBF Release Cause." B | |
265 | |
266 VAL @p_cgrlc - VAL_tbf_rel_cause@ | |
267 | |
268 VAR starting_time "TBF starting time." L | |
269 | |
270 VAL @p_cgrlc - VAL_starting_time@ | |
271 | |
272 VAR rel_fn "Release after Poll with fn." L | |
273 | |
274 VAL @p_cgrlc - VAL_starting_time@ | |
275 | |
276 VAR fn "Received frame number." L | |
277 | |
278 VAL @p_cgrlc - VAL_starting_time@ | |
279 | |
280 VAR poll_fn "Poll frame number." L | |
281 | |
282 VAL @p_cgrlc - VAL_starting_time@ | |
283 | |
284 VAR end_fn "End of bitmap framenumber" L | |
285 | |
286 VAL @p_cgrlc - VAL_starting_time@ | |
287 | |
288 VAR test_mode_flag "Test mode flag." B | |
289 | |
290 VAL @p_cgrlc - VAL_test_mode_flag@ | |
291 | |
292 VAR tfi "TFI value." B | |
293 | |
294 | |
295 VAR ta_value "Timing Advance Value." B | |
296 | |
297 | |
298 VAR ti "TLLI indicator." B | |
299 | |
300 VAL @p_cgrlc - VAL_ti@ | |
301 | |
302 VAR ul_tlli "Uplink TLLI value." L | |
303 | |
304 | |
305 VAR dl_tlli "Downlink TLLI value." L | |
306 | |
307 | |
308 VAR cs_mode "Type of Coding Scheme." B | |
309 | |
310 VAL @p_cgrlc - VAL_cs_mode@ | |
311 | |
312 VAR tlli_cs_mode "Type of Coding Scheme in Contention Resolution." B | |
313 | |
314 VAL @p_cgrlc - VAL_tlli_cs_mode@ | |
315 | |
316 VAR mac_mode "Type of MAC mode." B | |
317 | |
318 VAL @p_cgrlc - VAL_mac_mode@ | |
319 | |
320 VAR queue_mode "Type of Queue Mode." B | |
321 | |
322 VAL @p_cgrlc - VAL_queue_mode@ | |
323 | |
324 VAR rlc_mode "Type of RLC mode." B | |
325 | |
326 VAL @p_cgrlc - VAL_rlc_mode@ | |
327 | |
328 VAR tbf_mode "Type of TBF." B | |
329 | |
330 VAL @p_cgrlc - VAL_tbf_mode@ | |
331 | |
332 VAR t3192_val "Value of T3192." B | |
333 | |
334 | |
335 VAR t3314_val "Value of T3314." L | |
336 | |
337 VAL @p_cgrlc - VAL_t3314_val@ | |
338 | |
339 VAR t3168_val "T3168 Value" B | |
340 | |
341 | |
342 VAR ilev "Interference level" B | |
343 | |
344 VAL @p_cgrlc - VAL_ilev@ | |
345 | |
346 VAR pb "Power reduction value" B | |
347 | |
348 | |
349 VAR alpha "Alpha" B | |
350 | |
351 VAL @p_cgrlc - VAL_alpha@ | |
352 | |
353 VAR pc_meas_chan "PC_MEAS_CHAN" B | |
354 | |
355 VAL @p_cgrlc - VAL_pc_meas_chan@ | |
356 | |
357 VAR t_avg_t "T_AVG_T" B | |
358 | |
359 | |
360 VAR gamma_ch "Gamma" B | |
361 | |
362 VAL @p_cgrlc - VAL_gamma_ch@ | |
363 | |
364 VAR bcch_arfcn "ARFCN of the BCCH" S | |
365 | |
366 | |
367 VAR pdch_hopping "Hopping or no hopping is used on the assigned PDCH" B | |
368 | |
369 | |
370 VAR disable_class "Disable class." B | |
371 | |
372 VAL @p_cgrlc - VAL_disable_class@ | |
373 | |
374 VAR ra_prio "Radio priority" B | |
375 | |
376 | |
377 VAR poll_b_type "Poll burst type" B | |
378 | |
379 VAL @p_cgrlc - VAL_poll_b_type@ | |
380 | |
381 VAR ctrl_ack "Ctrl_ack" B | |
382 | |
383 | |
384 VAR burst_type "Default burst type" B | |
385 | |
386 VAL @p_cgrlc - VAL_burst_type@ | |
387 | |
388 VAR ab_type "Default access burst type" B | |
389 | |
390 VAL @p_cgrlc - VAL_ab_type@ | |
391 | |
392 VAR inc "Pan increment" B | |
393 | |
394 | |
395 VAR dec "Pan decrement" B | |
396 | |
397 | |
398 VAR ctrl_ack_bit "Ctrl ack bit" B | |
399 | |
400 | |
401 VAR blk_owner "Block owner." B | |
402 | |
403 VAL @p_cgrlc - VAL_blk_owner@ | |
404 | |
405 VAR nr_blocks "Number of blocks" B | |
406 | |
407 | |
408 VAR cu_cause "Cell update cause" B | |
409 | |
410 VAL @p_cgrlc - VAL_cu_cause@ | |
411 | |
412 VAR pmax "Pan maximum" B | |
413 | |
414 VAL @p_cgrlc - VAL_pmax@ | |
415 | |
416 VAR llc_prim_type "LLC Primitive type" B | |
417 | |
418 VAL @p_cgrlc - VAL_llc_prim_type@ | |
419 | |
420 VAR peak "Peak value" S | |
421 | |
422 | |
423 VAR polling_bit "Polling bit" B | |
424 | |
425 | |
426 VAR rlc_oct_cnt "Number of bytes for TBF" S | |
427 | |
428 | |
429 VAR r_bit "R bit" B | |
430 | |
431 | |
432 VAR ac_class "Access control class" B | |
433 | |
434 VAL @p_cgrlc - VAL_ac_class@ | |
435 | |
436 VAR pwr_max "Maximum output power of the MS." B | |
437 | |
438 | |
439 VAR c_lev "C-value raw data level" M | |
440 | |
441 | |
442 VAR c_idx "C-value raw data index" S | |
443 | |
444 | |
445 VAR c_acrcy "C-value raw data accuracy" S | |
446 | |
447 | |
448 VAR bitmap_len "Bitmap length" B | |
449 | |
450 | |
451 VAR final_alloc "Final allocation" B | |
452 | |
453 | |
454 VAR enable_cause "Enable Cause" B | |
455 | |
456 VAL @p_cgrlc - VAL_enable_cause@ | |
457 | |
458 VAR change_mark "Change mark value" B | |
459 | |
460 | |
461 VAR rlc_db_granted "RLCdata block granted" S | |
462 | |
463 VAL @p_cgrlc - VAL_rlc_db_granted@ | |
464 | |
465 VAR pdch_band "PDCH band" B | |
466 | |
467 VAL @p_cgrlc - VAL_pdch_band@ | |
468 | |
469 VAR dl_trans_id "DL Assignmnet ID" B | |
470 | |
471 | |
472 VAR nw_rel %REL99% "Network Release Flag" B | |
473 | |
474 | |
475 VAR pfi_support %REL99% "Basic Element" B | |
476 | |
477 VAL @p_cgrlc - Val_pfi_support@ | |
478 | |
479 VAR tbf_est_pacch %REL99 AND TI_PS_FF_TBF_EST_PACCH% "TBF establishment on PACCH" B | |
480 | |
481 | |
482 | |
483 | |
484 | |
485 COMP fix_alloc_struct "Fixed Allocation structure" | |
486 { | |
487 bitmap_len ; Bitmap length | |
488 bitmap_array [127] ; Bitmap array | |
489 end_fn ; End of bitmap framenumber | |
490 final_alloc ; Final allocation | |
491 } | |
492 | |
493 | |
494 | |
495 COMP freq_param "Frequency Parameters" | |
496 { | |
497 bcch_arfcn ; ARFCN of the BCCH | |
498 pdch_hopping ; Hopping or no hopping is used on the assigned PDCH | |
499 pdch_band ; PDCH band | |
500 } | |
501 | |
502 | |
503 | |
504 COMP pwr_ctrl_param "Power Control Parameters" | |
505 { | |
506 alpha ; Alpha value | |
507 gamma_ch [MAX_TIMESLOTS] ; Gamma value for each timeslot | |
508 } | |
509 | |
510 | |
511 | |
512 COMP c_value "C-Value" | |
513 { | |
514 c_lev ; C-value raw data level | |
515 c_idx ; C-value raw data index | |
516 c_acrcy ; C-value raw data accuracy | |
517 } | |
518 | |
519 | |
520 | |
521 COMP pan_struct "Pan Structure" | |
522 { | |
523 inc ; Pan increment | |
524 dec ; Pan decrement | |
525 pmax ; Pan maximum | |
526 } | |
527 | |
528 | |
529 | |
530 COMP glbl_pwr_ctrl_param "Global Power Control Parameters" | |
531 { | |
532 alpha ; Alpha value | |
533 t_avg_t ; T_AVG_T | |
534 pb ; Power reduction value | |
535 pc_meas_chan ; PC_MEAS_CHAN | |
536 pwr_max ; Maximum output power of the MS. | |
537 } | |
538 | |
539 | |
540 | |
541 COMP pwr_ctrl "Power Control Information" | |
542 { | |
543 < () pwr_ctrl_param > ; Power Control Parameters | |
544 < () glbl_pwr_ctrl_param > ; Global Power Control Parameters | |
545 < () freq_param > ; Frequency Parameters | |
546 < () c_value > ; C-Value | |
547 } | |
548 | |
549 | |
550 | |
551 | |
552 | |
553 | |
554 ; CGRLC_ENABLE_REQ 0x80000098 | |
555 ; CGRLC_DISABLE_REQ 0x80010098 | |
556 ; CGRLC_UL_TBF_RES 0x80020098 | |
557 ; CGRLC_DL_TBF_REQ 0x80030098 | |
558 ; CGRLC_TBF_REL_REQ 0x80040098 | |
559 ; CGRLC_TBF_REL_IND 0x80004098 | |
560 ; CGRLC_TBF_REL_RES 0x80050098 | |
561 ; CGRLC_UL_TBF_IND 0x80014098 | |
562 ; CGRLC_DATA_REQ 0x80060098 | |
563 ; CGRLC_DATA_IND 0x80024098 | |
564 ; CGRLC_POLL_REQ 0x80070098 | |
565 ; CGRLC_ACCESS_STATUS_REQ 0x80080098 | |
566 ; CGRLC_CTRL_MSG_SENT_IND 0x80034098 | |
567 ; CGRLC_STARTING_TIME_IND 0x80044098 | |
568 ; CGRLC_T3192_STARTED_IND 0x80054098 | |
569 ; CGRLC_CONT_RES_DONE_IND 0x80064098 | |
570 ; CGRLC_TA_VALUE_IND 0x80074098 | |
571 ; CGRLC_STATUS_IND 0x80084098 | |
572 ; CGRLC_TEST_MODE_REQ 0x80090098 | |
573 ; CGRLC_TEST_MODE_CNF 0x80094098 | |
574 ; CGRLC_TEST_END_REQ 0x800A0098 | |
575 ; CGRLC_TRIGGER_IND 0x800A4098 | |
576 ; CGRLC_STANDBY_STATE_IND 0x800B4098 | |
577 ; CGRLC_READY_STATE_IND 0x800C4098 | |
578 ; CGRLC_TA_VALUE_REQ 0x800B0098 | |
579 ; CGRLC_INT_LEVEL_REQ 0x800C0098 | |
580 ; CGRLC_TEST_MODE_IND 0x800E4098 | |
581 ; CGRLC_READY_TIMER_CONFIG_REQ 0x800E0098 | |
582 ; CGRLC_FORCE_TO_STANDBY_REQ 0x800F0098 | |
583 ; CGRLC_PWR_CTRL_REQ 0x800D0098 | |
584 ; CGRLC_PWR_CTRL_CNF 0x800D4098 | |
585 | |
586 | |
587 | |
588 PRIM CGRLC_ENABLE_REQ 0x80000098 | |
589 { | |
590 enable_cause ; Enable Cause | |
591 ul_tlli ; Uplink TLLI value | |
592 dl_tlli ; Downlink TLLI value | |
593 < () pan_struct > ; Pan Structure | |
594 queue_mode ; Type of Queue Mode | |
595 burst_type ; Default bust type | |
596 ab_type ; Default Access bust type | |
597 t3168_val ; T3168 Value | |
598 cu_cause ; Cell update cause | |
599 ac_class ; Access control class | |
600 change_mark ; Change mark value | |
601 nw_rel %REL99% ; Network Release Flag | |
602 pfi_support %REL99% ; Network PFC Support R99 | |
603 } | |
604 | |
605 | |
606 | |
607 | |
608 | |
609 | |
610 PRIM CGRLC_DISABLE_REQ 0x80010098 | |
611 { | |
612 disable_class ; Disable Class | |
613 prim_status ; Primitive Queue Handler | |
614 } | |
615 | |
616 | |
617 | |
618 | |
619 | |
620 | |
621 PRIM CGRLC_UL_TBF_RES 0x80020098 | |
622 { | |
623 starting_time ; TBF starting time | |
624 tbf_mode ; Type of TBF | |
625 prim_status ; Primitive Queue Handler | |
626 polling_bit ; Polling bit | |
627 cs_mode ; Type of Coding Scheme | |
628 mac_mode ; Type of MAC mode | |
629 nts_max ; Number of Timeslots | |
630 tn_mask ; Timeslot mask | |
631 tfi ; TFI value | |
632 ti ; TLLI indicator | |
633 bs_cv_max ; Maximum Countdown value | |
634 tlli_cs_mode ; Type of Coding Scheme in Contention Resolution | |
635 r_bit ; R bit | |
636 fix_alloc_struct ; Fixed Allocation structure | |
637 rlc_db_granted ; RLCdata block granted | |
638 pwr_ctrl ; Power Control Information | |
639 } | |
640 | |
641 | |
642 | |
643 | |
644 | |
645 | |
646 PRIM CGRLC_DL_TBF_REQ 0x80030098 | |
647 { | |
648 starting_time ; TBF starting time | |
649 rlc_mode ; Type of RLC mode | |
650 cs_mode ; Type of Coding Scheme | |
651 mac_mode ; Type of MAC mode | |
652 nts_max ; Number of Timeslots | |
653 tn_mask ; Timeslot mask | |
654 tfi ; TFI value | |
655 t3192_val ; Value of timer T3192 | |
656 ctrl_ack_bit ; Ctrl ack bit | |
657 polling_bit ; Polling bit | |
658 pwr_ctrl ; Power Control Information | |
659 } | |
660 | |
661 | |
662 | |
663 | |
664 | |
665 | |
666 PRIM CGRLC_TBF_REL_REQ 0x80040098 | |
667 { | |
668 tbf_mode ; Type of TBF | |
669 tbf_rel_cause ; TBF Release Cause | |
670 rel_fn ; Release after Poll with fn | |
671 } | |
672 | |
673 | |
674 | |
675 | |
676 | |
677 | |
678 PRIM CGRLC_TBF_REL_IND 0x80004098 | |
679 { | |
680 tbf_mode ; Type of TBF | |
681 tbf_rel_cause ; TBF Release Cause | |
682 < () c_value > ; Power Control Information | |
683 dl_trans_id ; DL Assignment Id | |
684 } | |
685 | |
686 | |
687 | |
688 | |
689 | |
690 | |
691 PRIM CGRLC_TBF_REL_RES 0x80050098 | |
692 { | |
693 tbf_mode ; Type of TBF | |
694 } | |
695 | |
696 | |
697 | |
698 | |
699 | |
700 | |
701 PRIM CGRLC_UL_TBF_IND 0x80014098 | |
702 { | |
703 access_type ; Access Type | |
704 ra_prio ; Radio Priority | |
705 nr_blocks ; Number of blocks | |
706 llc_prim_type ; LLC Primitive type | |
707 peak ; Peak value | |
708 rlc_oct_cnt ; RLC octet count | |
709 tbf_est_pacch %REL99 AND TI_PS_FF_TBF_EST_PACCH% ; TBF est on PACCH | |
710 } | |
711 | |
712 | |
713 | |
714 | |
715 | |
716 | |
717 PRIM CGRLC_DATA_REQ 0x80060098 | |
718 { | |
719 blk_owner ; Block Owner | |
720 data_array [MAX_CTRL_MSG_SIZE] ; Data array | |
721 } | |
722 | |
723 | |
724 | |
725 | |
726 | |
727 | |
728 PRIM CGRLC_DATA_IND 0x80024098 | |
729 { | |
730 fn ; Received frame number | |
731 tn ; Timeslot number | |
732 data_array [MAX_CTRL_MSG_SIZE] ; Data array | |
733 } | |
734 | |
735 | |
736 | |
737 | |
738 | |
739 | |
740 PRIM CGRLC_POLL_REQ 0x80070098 | |
741 { | |
742 poll_fn ; Poll frame number | |
743 tn ; Timeslot number | |
744 poll_b_type ; Poll burst type | |
745 ctrl_ack ; Ctrl_ack | |
746 } | |
747 | |
748 | |
749 | |
750 | |
751 | |
752 | |
753 PRIM CGRLC_ACCESS_STATUS_REQ 0x80080098 | |
754 { | |
755 } | |
756 | |
757 | |
758 | |
759 | |
760 | |
761 | |
762 PRIM CGRLC_CTRL_MSG_SENT_IND 0x80034098 | |
763 { | |
764 } | |
765 | |
766 | |
767 | |
768 | |
769 | |
770 | |
771 PRIM CGRLC_STARTING_TIME_IND 0x80044098 | |
772 { | |
773 tbf_mode ; Type of TBF | |
774 tfi ; TFI value | |
775 } | |
776 | |
777 | |
778 | |
779 | |
780 | |
781 | |
782 PRIM CGRLC_T3192_STARTED_IND 0x80054098 | |
783 { | |
784 } | |
785 | |
786 | |
787 | |
788 | |
789 | |
790 | |
791 PRIM CGRLC_CONT_RES_DONE_IND 0x80064098 | |
792 { | |
793 } | |
794 | |
795 | |
796 | |
797 | |
798 | |
799 | |
800 PRIM CGRLC_TA_VALUE_IND 0x80074098 | |
801 { | |
802 ta_value ; Timing Advance Value | |
803 } | |
804 | |
805 | |
806 | |
807 | |
808 | |
809 | |
810 PRIM CGRLC_STATUS_IND 0x80084098 | |
811 { | |
812 failure ; Lower layer failure | |
813 } | |
814 | |
815 | |
816 | |
817 | |
818 | |
819 | |
820 PRIM CGRLC_TEST_MODE_REQ 0x80090098 | |
821 { | |
822 no_of_pdus ; Number of PDUs | |
823 dl_timeslot_offset ; Downlink Timeslot Offset | |
824 test_mode_flag ; Test Mode Flag | |
825 } | |
826 | |
827 | |
828 | |
829 | |
830 | |
831 | |
832 PRIM CGRLC_TEST_MODE_CNF 0x80094098 | |
833 { | |
834 } | |
835 | |
836 | |
837 | |
838 | |
839 | |
840 | |
841 PRIM CGRLC_TEST_END_REQ 0x800A0098 | |
842 { | |
843 } | |
844 | |
845 | |
846 | |
847 | |
848 | |
849 | |
850 PRIM CGRLC_TRIGGER_IND 0x800A4098 | |
851 { | |
852 prim_type ; Type of primitive | |
853 } | |
854 | |
855 | |
856 | |
857 | |
858 | |
859 | |
860 PRIM CGRLC_STANDBY_STATE_IND 0x800B4098 | |
861 { | |
862 } | |
863 | |
864 | |
865 | |
866 | |
867 | |
868 | |
869 PRIM CGRLC_READY_STATE_IND 0x800C4098 | |
870 { | |
871 } | |
872 | |
873 | |
874 | |
875 | |
876 | |
877 | |
878 PRIM CGRLC_TA_VALUE_REQ 0x800B0098 | |
879 { | |
880 ta_value ; Timing Advance Value | |
881 } | |
882 | |
883 | |
884 | |
885 | |
886 | |
887 | |
888 PRIM CGRLC_INT_LEVEL_REQ 0x800C0098 | |
889 { | |
890 ilev [MAX_TIMESLOTS] ; Interference Level | |
891 } | |
892 | |
893 | |
894 | |
895 | |
896 | |
897 | |
898 PRIM CGRLC_TEST_MODE_IND 0x800E4098 | |
899 { | |
900 test_mode_flag ; indicate the type of testmode | |
901 } | |
902 | |
903 | |
904 | |
905 | |
906 | |
907 | |
908 PRIM CGRLC_READY_TIMER_CONFIG_REQ 0x800E0098 | |
909 { | |
910 t3314_val ; Primitive Item | |
911 } | |
912 | |
913 | |
914 | |
915 | |
916 | |
917 | |
918 PRIM CGRLC_FORCE_TO_STANDBY_REQ 0x800F0098 | |
919 { | |
920 } | |
921 | |
922 | |
923 | |
924 | |
925 | |
926 | |
927 PRIM CGRLC_PWR_CTRL_REQ 0x800D0098 | |
928 { | |
929 pwr_ctrl ; Power Control Information | |
930 } | |
931 | |
932 | |
933 | |
934 | |
935 | |
936 | |
937 PRIM CGRLC_PWR_CTRL_CNF 0x800D4098 | |
938 { | |
939 } | |
940 | |
941 | |
942 | |
943 | |
944 | |
945 | |
946 | |
947 | |
948 |