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comparison src/condat3/frame/config/gprscomp.c @ 18:c8bd5a927942

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src/condat3: import of "condat" tree from TCS3.2, pruned
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 27 Sep 2016 21:25:36 +0000
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17:6323e661f2ed 18:c8bd5a927942
1 /*
2 +-----------------------------------------------------------------------------
3 | Project :
4 | Modul :
5 +-----------------------------------------------------------------------------
6 | Copyright 2002 Texas Instruments Berlin, AG
7 | All rights reserved.
8 |
9 | This file is confidential and a trade secret of Texas
10 | Instruments Berlin, AG
11 | The receipt of or possession of this file does not convey
12 | any rights to reproduce or disclose its contents or to
13 | manufacture, use, or sell anything it may describe, in
14 | whole, or in part, without the specific written consent of
15 | Texas Instruments Berlin, AG.
16 +-----------------------------------------------------------------------------
17 | Purpose : Component Table for GPRS
18 +-----------------------------------------------------------------------------
19 */
20
21 #ifndef _TARGET_
22 #define NEW_ENTITY
23 #endif
24
25 /*==== INCLUDES ===================================================*/
26
27 #include "nucleus.h"
28 #include "typedefs.h"
29 #include "os.h"
30 #include "vsi.h"
31 #include "pei.h"
32 #include "gprsconst.h"
33 #include "frm_defs.h"
34 #include "frm_types.h"
35 #include "frm_glob.h"
36 #include "os_types.h"
37 #include "os_glob.h"
38 #include "gprsconst.h"
39 #include "chipset.cfg"
40 #include "rv/rv_defined_swe.h"
41 #include "../src/config/gsm_bsp_pool_size.h"
42 #include "../src/config/gsm_mm_pool_size.h"
43 #if (REMU==1)
44 #include "../sm_remu/inc/remu_internal.h"
45 #endif
46
47
48 /*==== CONSTANTS ==================================================*/
49
50
51 /*==== EXTERNALS ==================================================*/
52
53 extern SHORT tstrcv_pei_create(T_PEI_INFO const **Info);
54 extern SHORT tstsnd_pei_create(T_PEI_INFO const **Info);
55 #if(PSP_STANDALONE==0)
56 extern SHORT aci_pei_create (T_PEI_INFO const **Info);
57 extern SHORT cst_pei_create (T_PEI_INFO const **Info);
58 #ifdef FF_ESIM
59 extern SHORT esim_pei_create (T_PEI_INFO const **Info); /* esim module */
60 #endif
61 extern SHORT sim_pei_create (T_PEI_INFO const **Info);
62 extern SHORT sms_pei_create (T_PEI_INFO const **Info);
63 extern SHORT cc_pei_create (T_PEI_INFO const **Info);
64 extern SHORT sm_pei_create (T_PEI_INFO const **Info);
65 extern SHORT ss_pei_create (T_PEI_INFO const **Info);
66 extern SHORT mm_pei_create (T_PEI_INFO const **Info);
67 extern SHORT gmm_pei_create (T_PEI_INFO const **Info);
68 extern SHORT rr_pei_create (T_PEI_INFO const **Info);
69 extern SHORT grr_pei_create (T_PEI_INFO const **Info);
70 extern SHORT grlc_pei_create (T_PEI_INFO const **Info);
71 extern SHORT dl_pei_create (T_PEI_INFO const **Info);
72 extern SHORT pl_pei_create (T_PEI_INFO const **Info);
73 #ifdef FAX_AND_DATA
74 extern SHORT l2r_pei_create (T_PEI_INFO const **Info);
75 extern SHORT rlp_pei_create (T_PEI_INFO const **Info);
76 #ifdef FF_FAX
77 extern SHORT fad_pei_create (T_PEI_INFO const **Info);
78 extern SHORT t30_pei_create (T_PEI_INFO const **Info);
79 #endif
80 #endif /* FAX_AND_DATA */
81 extern SHORT llc_pei_create (T_PEI_INFO const **Info);
82 extern SHORT sndcp_pei_create (T_PEI_INFO const **Info);
83 extern SHORT ppp_pei_create (T_PEI_INFO const **Info);
84 extern SHORT uart_pei_create (T_PEI_INFO const **Info);
85
86 #ifdef FF_MUX
87 extern SHORT mux_pei_create (T_PEI_INFO const **Info);
88 #endif /* MUX */
89
90 #ifdef FF_PKTIO
91 extern SHORT pktio_pei_create (T_PEI_INFO const **Info);
92 #endif /* #ifdef FF_PKTIO */
93
94 #ifdef FF_PSI
95 extern SHORT psi_pei_create (T_PEI_INFO const **Info);
96 #endif
97
98 #ifdef FF_EOTD
99 extern SHORT lc_pei_create (T_PEI_INFO const **Info);
100 extern SHORT rrlp_pei_create (T_PEI_INFO const **Info);
101 #endif /* FF_EOTD */
102
103 #ifdef CO_UDP_IP
104 extern SHORT udp_pei_create (T_PEI_INFO const **Info);
105 extern SHORT ip_pei_create (T_PEI_INFO const **Info);
106 #endif /* CO_UDP_IP */
107
108 #ifdef FF_WAP
109 extern SHORT wap_pei_create (T_PEI_INFO const **Info);
110 #endif /* FF_WAP */
111
112 #ifndef _TARGET_
113 extern SHORT clt_pei_create (T_PEI_INFO const **Info);
114 #endif /* !_TARGET_ */
115
116 #ifdef _TARGET_
117 extern SHORT l1_pei_create (T_PEI_INFO const **Info);
118 #ifdef FF_TCP_IP
119 extern SHORT aaa_pei_create (T_PEI_INFO const **Info);
120 #endif /* FF_TCP_IP */
121 #endif /* _TARGET_ */
122
123
124 extern SHORT upm_pei_create (T_PEI_INFO const **Info);
125
126 #ifdef FF_GPF_TCPIP
127 extern SHORT tcpip_pei_create (T_PEI_INFO const **Info);
128 #endif /* FF_TCP_IP */
129
130 #if defined (CO_TCPIP_TESTAPP) || defined (CO_BAT_TESTAPP)
131 extern SHORT app_pei_create (T_PEI_INFO const **Info);
132 #endif /* CO_TCPIP_TESTAPP */
133 #ifndef _TARGET_
134 extern SHORT ra_pei_create (T_PEI_INFO const **Info);
135 #endif
136
137 #ifndef FF_ATI_BAT
138 #ifdef FF_BAT
139 extern SHORT gdd_dio_pei_create(T_PEI_INFO const **Info);
140 #endif
141 #endif
142
143 #ifdef BTS
144 /* For Bluetooth BTS */
145 extern SHORT bts_pei_create(T_PEI_INFO const**p_info);
146 #ifdef BTW
147 /* For Bluetooth BTW */
148 extern SHORT btw_pei_create(T_PEI_INFO const**p_info);
149 #endif /* BTW */
150 #ifdef BTT
151 /* For Bluetooth Reference Applications : BTT */
152 extern SHORT btt_pei_create(T_PEI_INFO const**p_info);
153 #endif /* BTT */
154 #ifdef BTAV
155 /* For Bluetooth BTAV */
156 extern SHORT btav_pei_create(T_PEI_INFO const**p_info);
157 #endif /* BTAV */
158 #ifdef BTU
159 /* For Bluetooth BTU */
160 extern SHORT btu_pei_create(T_PEI_INFO const**p_info);
161 #endif /* BTU */
162 #ifdef FMS
163 extern SHORT fms_pei_create(T_PEI_INFO const* * p_info);
164 #endif /*FMS */
165 #endif /* BTS */
166 #endif
167
168 /*==== VARIABLES ==================================================*/
169
170 //EF For normal Test Definition Language (TDL) TAP usage set newTstHeader = FALSE
171 //EF For multiple entity (TCSL) Test Case Script Lang. set newTstHeader = TRUE
172 #ifndef _TARGET_
173
174 #ifdef TDL_TAP
175 BOOL newTstHeader = FALSE;
176 #else
177 BOOL newTstHeader = TRUE;
178 #endif
179
180 #endif
181
182 #ifndef DATA_EXT_RAM
183
184 const T_COMPONENT_ADDRESS tstrcv_list[] =
185 {
186 { tstrcv_pei_create, NULL, ASSIGNED_BY_TI },
187 { NULL, NULL, 0 }
188 };
189
190 const T_COMPONENT_ADDRESS tstsnd_list[] =
191 {
192 { tstsnd_pei_create, NULL, ASSIGNED_BY_TI },
193 { NULL, NULL, 0 }
194 };
195
196 #if(PSP_STANDALONE==0)
197 const T_COMPONENT_ADDRESS mmi_list[] =
198 {
199 { aci_pei_create, NULL, ASSIGNED_BY_TI },
200 { NULL, NULL, 0 }
201 };
202
203 #ifdef FF_ESIM
204 const T_COMPONENT_ADDRESS esim_list[] =
205 {
206 { esim_pei_create, NULL, ASSIGNED_BY_TI },
207 { NULL, NULL, 0 }
208 };
209 #endif
210
211 const T_COMPONENT_ADDRESS cst_list[] =
212 {
213 { cst_pei_create, NULL, ASSIGNED_BY_TI },
214 { NULL, NULL, 0 }
215 };
216
217 const T_COMPONENT_ADDRESS sim_list[] =
218 {
219 { sim_pei_create, NULL, ASSIGNED_BY_TI },
220 { NULL, NULL, 0 }
221 };
222
223 const T_COMPONENT_ADDRESS cm_list[] =
224 {
225 { sms_pei_create, NULL, ASSIGNED_BY_TI },
226 { cc_pei_create, NULL, ASSIGNED_BY_TI },
227 { sm_pei_create, NULL, ASSIGNED_BY_TI },
228 { ss_pei_create, NULL, ASSIGNED_BY_TI },
229 { NULL, NULL, (int)"CM" }
230 };
231
232 const T_COMPONENT_ADDRESS mmgmm_list[] =
233 {
234 { mm_pei_create, NULL, ASSIGNED_BY_TI },
235 { gmm_pei_create, NULL, ASSIGNED_BY_TI },
236 { NULL, NULL, (int)"MMGMM" }
237 };
238
239 const T_COMPONENT_ADDRESS rr_list[] =
240 {
241 { rr_pei_create, NULL, ASSIGNED_BY_TI },
242 { NULL, NULL, 0 }
243 };
244
245 const T_COMPONENT_ADDRESS grr_list[] =
246 {
247 { grr_pei_create, NULL, ASSIGNED_BY_TI },
248 { NULL, NULL, 0 }
249 };
250
251 const T_COMPONENT_ADDRESS grlc_list[] =
252 {
253 { grlc_pei_create, NULL, ASSIGNED_BY_TI },
254 { NULL, NULL, 0 }
255 };
256
257 const T_COMPONENT_ADDRESS dl_list[] =
258 {
259 { dl_pei_create, NULL, ASSIGNED_BY_TI },
260 { NULL, NULL, 0 }
261 };
262
263 const T_COMPONENT_ADDRESS pl_list[] =
264 {
265 { pl_pei_create, NULL, ASSIGNED_BY_TI },
266 { NULL, NULL, 0 }
267 };
268
269 #ifdef FAX_AND_DATA
270 const T_COMPONENT_ADDRESS l2rt30_list[] =
271 {
272 { l2r_pei_create, NULL, ASSIGNED_BY_TI },
273 #ifdef FF_FAX
274 { t30_pei_create, NULL, ASSIGNED_BY_TI },
275 #endif
276 { NULL, NULL, (int)"L2RT30" }
277 };
278
279 const T_COMPONENT_ADDRESS rlpfad_list[] =
280 {
281 { rlp_pei_create, NULL, ASSIGNED_BY_TI },
282 #ifdef FF_FAX
283 { fad_pei_create, NULL, ASSIGNED_BY_TI },
284 #endif
285 { NULL, NULL, (int)"RLPFAD" }
286 };
287 #endif /* FAX_AND_DATA */
288
289
290 const T_COMPONENT_ADDRESS llc_list[] =
291 {
292 { llc_pei_create, NULL, ASSIGNED_BY_TI },
293 { NULL, NULL, 0 }
294 };
295
296 const T_COMPONENT_ADDRESS sndcp_list[] =
297 {
298 { sndcp_pei_create, NULL, ASSIGNED_BY_TI },
299 { NULL, NULL, 0 }
300 };
301
302 const T_COMPONENT_ADDRESS ppp_list[] =
303 {
304 { ppp_pei_create, NULL, ASSIGNED_BY_TI },
305 { NULL, NULL, 0 }
306 };
307
308 const T_COMPONENT_ADDRESS uart_list[] =
309 {
310 { uart_pei_create, NULL, ASSIGNED_BY_TI },
311 { NULL, NULL, 0 }
312 };
313
314 #ifdef FF_MUX
315 const T_COMPONENT_ADDRESS mux_list[] =
316 {
317 { mux_pei_create, NULL, ASSIGNED_BY_TI },
318 { NULL, NULL, 0 }
319 };
320 #endif /* MUX */
321
322 #ifdef FF_PKTIO
323 const T_COMPONENT_ADDRESS pktio_list[] =
324 {
325 { pktio_pei_create, NULL, ASSIGNED_BY_TI },
326 { NULL, NULL, 0 }
327 };
328 #endif /* #ifdef FF_PKTIO */
329
330 #ifdef FF_PSI
331 const T_COMPONENT_ADDRESS psi_list[] =
332 {
333 { psi_pei_create, NULL, ASSIGNED_BY_TI },
334 { NULL, NULL, 0 }
335 };
336 #endif /* #ifdef FF_PSI */
337
338 //#ifdef FF_EGPRS
339 const T_COMPONENT_ADDRESS upm_list[] =
340 {
341 { upm_pei_create, NULL, ASSIGNED_BY_TI },
342 { NULL, NULL, 0 }
343 };
344 //#endif /* #ifdef FF_UPM */
345
346 #ifndef _TARGET_
347 const T_COMPONENT_ADDRESS clt_list[] =
348 {
349 { clt_pei_create, NULL, ASSIGNED_BY_TI },
350 { NULL, NULL, 0 }
351 };
352 #endif /* !_TARGET_ */
353
354
355 #ifdef FF_EOTD
356 const T_COMPONENT_ADDRESS eotd_list[] =
357 {
358 { lc_pei_create, NULL, ASSIGNED_BY_TI },
359 { rrlp_pei_create, NULL, ASSIGNED_BY_TI },
360 { NULL, NULL, (int)"EOTD" }
361 };
362 #endif /* FF_EOTD */
363
364 #ifdef FF_WAP
365 const T_COMPONENT_ADDRESS wap_list[] =
366 {
367 { wap_pei_create, NULL, ASSIGNED_BY_TI },
368 { NULL, NULL, 0 }
369 };
370 #endif /* FF_WAP */
371
372 #ifdef CO_UDP_IP
373 const T_COMPONENT_ADDRESS udp_list[] =
374 {
375 { udp_pei_create, NULL, ASSIGNED_BY_TI },
376 { NULL, NULL, 0 }
377 };
378
379 const T_COMPONENT_ADDRESS ip_list[] =
380 {
381 { ip_pei_create, NULL, ASSIGNED_BY_TI },
382 { NULL, NULL, 0 }
383 };
384 #endif /* CO_UDP_IP */
385
386 #ifndef _TARGET_
387 const T_COMPONENT_ADDRESS ra_list[] =
388 {
389 { ra_pei_create, NULL, ASSIGNED_BY_TI },
390 { NULL, NULL, 0 }
391 };
392 #endif /* !_TARGET_ */
393
394 #ifdef FF_TCP_IP
395 const T_COMPONENT_ADDRESS aaa_list[] =
396 {
397 #ifdef _TARGET_
398 { aaa_pei_create, NULL, ASSIGNED_BY_TI },
399 #else /* _TARGET_ */
400 { NULL, "AAA", ASSIGNED_BY_TI },
401 #endif /* else _TARGET_ */
402 { NULL, NULL, 0 }
403 };
404 #endif /* FF_TCP_IP */
405
406 #ifdef FF_GPF_TCPIP
407 const T_COMPONENT_ADDRESS tcpip_list[] =
408 {
409 { tcpip_pei_create, NULL, ASSIGNED_BY_TI },
410 { NULL, NULL, 0 }
411 };
412 #endif
413
414 #if defined (CO_TCPIP_TESTAPP) || defined (CO_BAT_TESTAPP)
415 const T_COMPONENT_ADDRESS app_list[] =
416 {
417 { app_pei_create, NULL, ASSIGNED_BY_TI },
418 { NULL, NULL, 0 }
419 };
420 #endif /* CO_TCPIP_TESTAPP */
421
422 const T_COMPONENT_ADDRESS l1_list[] =
423 {
424 #ifdef _TARGET_
425 { l1_pei_create, NULL, ASSIGNED_BY_TI },
426 #else
427 { NULL, "L1", ASSIGNED_BY_TI },
428 #endif
429 { NULL, NULL, 0 }
430 };
431
432 #ifndef FF_ATI_BAT
433 #ifdef FF_BAT
434 const T_COMPONENT_ADDRESS gdd_dio_list[] =
435 {
436 { gdd_dio_pei_create, NULL, ASSIGNED_BY_TI },
437 { NULL, NULL, 0 }
438 };
439 #endif
440 #endif
441
442 #ifdef BTS
443 /* Bluetooth sub-system */
444 const T_COMPONENT_ADDRESS bts_list[] =
445 {
446 { bts_pei_create, NULL, ASSIGNED_BY_TI },
447 { NULL, NULL, 0 }
448 };
449 #ifdef BTW
450 /* Bluetooth Worker */
451 const T_COMPONENT_ADDRESS btw_list[] =
452 {
453 { btw_pei_create, NULL, ASSIGNED_BY_TI },
454 { NULL, NULL, 0 }
455 };
456 #endif /* BTW */
457 #ifdef BTT
458 /* Bluetooth Reference Applications */
459 const T_COMPONENT_ADDRESS btt_list[] =
460 {
461 { btt_pei_create, NULL, ASSIGNED_BY_TI },
462 { NULL, NULL, 0 }
463 };
464 #endif /* BTT */
465 #ifdef BTAV
466 /* Bluetooth AV task */
467 const T_COMPONENT_ADDRESS btav_list[] =
468 {
469 { btav_pei_create, NULL, ASSIGNED_BY_TI },
470 { NULL, NULL, 0 }
471 };
472 #endif /* BTAV */
473 #ifdef BTU
474 /* Bluetooth UART */
475 const T_COMPONENT_ADDRESS btu_list[] =
476 {
477 { btu_pei_create, NULL, ASSIGNED_BY_TI },
478 { NULL, NULL, 0 }
479 };
480 #endif /* BTU */
481
482 #ifdef FMS
483 const T_COMPONENT_ADDRESS fms_list[] =
484 {
485 { fms_pei_create, NULL, ASSIGNED_BY_TI },
486 { NULL, NULL, 0 }
487 };
488 #endif /*FMS */
489 #endif /* BTS */
490 #endif
491
492 #if (CHIPSET==15) && (REMU==1) && defined _TARGET_
493
494 #ifdef RVM_KPD_SWE
495 extern SHORT kpd_pei_create (T_PEI_INFO const **Info);
496 const T_COMPONENT_ADDRESS kpd_list[] =
497 {
498 { kpd_pei_create, NULL, ASSIGNED_BY_TI },
499 { NULL, NULL, 0 }
500 };
501 #endif
502
503 #if (TEST == 1)
504 extern SHORT rv_test_pei_create (T_PEI_INFO const **Info);
505
506 const T_COMPONENT_ADDRESS rv_test_list[] =
507 {
508 { rv_test_pei_create, NULL, ASSIGNED_BY_TI },
509 { NULL, NULL, 0 }
510 };
511 extern SHORT rtest_pei_create (T_PEI_INFO const **Info);
512
513 const T_COMPONENT_ADDRESS rtest_list[] =
514 {
515 { rtest_pei_create, NULL, ASSIGNED_BY_TI },
516 { NULL, NULL, 0 }
517 };
518 #endif
519
520 #ifdef RVM_DMA_SWE
521 extern SHORT dma_pei_create (T_PEI_INFO const **Info);
522
523 const T_COMPONENT_ADDRESS dma_list[] =
524 {
525 { dma_pei_create, NULL, ASSIGNED_BY_TI },
526 { NULL, NULL, 0 }
527 };
528 #endif
529
530 #ifdef RVM_R2D_SWE
531 extern SHORT r2d_pei_create (T_PEI_INFO const **Info);
532
533 const T_COMPONENT_ADDRESS r2d_list[] =
534 {
535 { r2d_pei_create, NULL, ASSIGNED_BY_TI },
536 { NULL, NULL, 0 }
537 };
538 #endif
539
540 #ifdef RVM_RVT_SWE
541 extern SHORT rvt_pei_create (T_PEI_INFO const **Info);
542 const T_COMPONENT_ADDRESS rvt_list[] =
543 {
544 { rvt_pei_create, NULL, ASSIGNED_BY_TI },
545 { NULL, NULL, 0 }
546 };
547 #endif
548
549 #ifdef RVM_USB_SWE
550 extern SHORT usb_pei_create (T_PEI_INFO const **Info);
551 const T_COMPONENT_ADDRESS usb_list[] =
552 {
553 { usb_pei_create, NULL, ASSIGNED_BY_TI },
554 { NULL, NULL, 0 }
555 };
556 #endif
557
558 #ifdef RVM_USBFAX_SWE
559 extern SHORT usbfax_pei_create (T_PEI_INFO const **Info);
560 const T_COMPONENT_ADDRESS usbfax_list[] =
561 {
562 { usbfax_pei_create, NULL, ASSIGNED_BY_TI },
563 { NULL, NULL, 0 }
564 };
565 #endif
566
567 #ifdef RVM_USBMS_SWE
568 extern SHORT usbms_pei_create (T_PEI_INFO const **Info);
569 const T_COMPONENT_ADDRESS usbms_list[] =
570 {
571 { usbms_pei_create, NULL, ASSIGNED_BY_TI },
572 { NULL, NULL, 0 }
573 };
574 #endif
575
576
577 #ifdef RVM_USBTRC_SWE
578 extern SHORT usbtrc_pei_create (T_PEI_INFO const **Info);
579 const T_COMPONENT_ADDRESS usbtrc_list[] =
580 {
581 { usbtrc_pei_create, NULL, ASSIGNED_BY_TI },
582 { NULL, NULL, 0 }
583 };
584 #endif
585
586
587 #ifdef RVM_RTC_SWE
588 extern SHORT rtc_pei_create (T_PEI_INFO const **Info);
589 const T_COMPONENT_ADDRESS rtc_list[] =
590 {
591 { rtc_pei_create, NULL, ASSIGNED_BY_TI },
592 { NULL, NULL, 0 }
593 };
594 #endif
595
596 #ifdef RVM_ETM_SWE
597 extern SHORT etm_pei_create (T_PEI_INFO const **Info);
598
599 const T_COMPONENT_ADDRESS etm_list[] =
600 {
601 { etm_pei_create, NULL, ASSIGNED_BY_TI },
602 { NULL, NULL, 0 }
603 };
604 #endif
605
606 #ifdef RVM_FFS_SWE
607 extern SHORT ffs_pei_create (T_PEI_INFO const **Info);
608
609 const T_COMPONENT_ADDRESS ffs_list[] =
610 {
611 { ffs_pei_create, NULL, ASSIGNED_BY_TI },
612 { NULL, NULL, 0 }
613 };
614 #endif
615
616 #ifdef RVM_DAR_SWE
617 extern SHORT dar_pei_create (T_PEI_INFO const **Info);
618
619 const T_COMPONENT_ADDRESS dar_list[] =
620 {
621 { dar_pei_create, NULL, ASSIGNED_BY_TI },
622 { NULL, NULL, 0 }
623 };
624 #endif
625
626
627 #ifdef RVM_GBI_SWE
628 extern SHORT gbi_pei_create (T_PEI_INFO const **Info);
629
630 const T_COMPONENT_ADDRESS gbi_list[] =
631 {
632 { gbi_pei_create, NULL, ASSIGNED_BY_TI },
633 { NULL, NULL, 0 }
634 };
635 #endif
636
637 #ifdef RVM_DATALIGHT_SWE
638 extern SHORT datalight_pei_create (T_PEI_INFO const **Info);
639
640 const T_COMPONENT_ADDRESS datalight_list[] =
641 {
642 { datalight_pei_create, NULL, ASSIGNED_BY_TI },
643 { NULL, NULL, 0 }
644 };
645 #else
646 #ifdef RVM_NAN_SWE
647 extern SHORT nan_pei_create (T_PEI_INFO const **Info);
648
649 const T_COMPONENT_ADDRESS nan_list[] =
650 {
651 { nan_pei_create, NULL, ASSIGNED_BY_TI },
652 { NULL, NULL, 0 }
653 };
654 #endif
655
656 #ifdef RVM_NOR_BM_SWE
657 extern SHORT nor_bm_pei_create (T_PEI_INFO const **Info);
658
659 const T_COMPONENT_ADDRESS nor_bm_list[] =
660 {
661 { nor_bm_pei_create, NULL, ASSIGNED_BY_TI },
662 { NULL, NULL, 0 }
663 };
664 #endif
665 #endif
666
667 #ifdef RVM_CAMA_SWE
668 extern SHORT cama_pei_create (T_PEI_INFO const **Info);
669
670 const T_COMPONENT_ADDRESS cama_list[] =
671 {
672 { cama_pei_create, NULL, ASSIGNED_BY_TI },
673 { NULL, NULL, 0 }
674 };
675 #endif
676
677 #ifdef RVM_CAMD_SWE
678 extern SHORT camd_pei_create (T_PEI_INFO const **Info);
679
680 const T_COMPONENT_ADDRESS camd_list[] =
681 {
682 { camd_pei_create, NULL, ASSIGNED_BY_TI },
683 { NULL, NULL, 0 }
684 };
685 #endif
686
687 #ifdef RVM_AUDIO_MAIN_SWE
688 extern SHORT audio_pei_create (T_PEI_INFO const **Info);
689
690 const T_COMPONENT_ADDRESS audio_list[] =
691 {
692 { audio_pei_create, NULL, ASSIGNED_BY_TI },
693 { NULL, NULL, 0 }
694 };
695 #endif
696
697 #ifdef RVM_BAE_SWE
698 extern SHORT bae_pei_create (T_PEI_INFO const **Info);
699
700 const T_COMPONENT_ADDRESS bae_list[] =
701 {
702 { bae_pei_create, NULL, ASSIGNED_BY_TI },
703 { NULL, NULL, 0 }
704 };
705 #endif
706
707 #ifdef RVM_AS_SWE
708 extern SHORT as_pei_create (T_PEI_INFO const **Info);
709
710 const T_COMPONENT_ADDRESS as_list[] =
711 {
712 { as_pei_create, NULL, ASSIGNED_BY_TI },
713 { NULL, NULL, 0 }
714 };
715 #endif
716
717 #ifdef RVM_IMG_SWE
718 extern SHORT img_pei_create (T_PEI_INFO const **Info);
719 const T_COMPONENT_ADDRESS img_list[] =
720 {
721 { img_pei_create, NULL, ASSIGNED_BY_TI },
722 { NULL, NULL, 0 }
723 };
724 #endif
725
726 #ifdef RVM_RFS_SWE
727 extern SHORT rfs_pei_create (T_PEI_INFO const **Info);
728 const T_COMPONENT_ADDRESS rfs_list[] =
729 {
730 { rfs_pei_create, NULL, ASSIGNED_BY_TI },
731 { NULL, NULL, 0 }
732 };
733 #endif
734
735 #ifdef RVM_RFSNAND_SWE
736 extern SHORT rfsnand_pei_create (T_PEI_INFO const **Info);
737
738 const T_COMPONENT_ADDRESS rfsnand_list[] =
739 {
740 { rfsnand_pei_create, NULL, ASSIGNED_BY_TI },
741 { NULL, NULL, 0 }
742 };
743 #endif
744
745 #ifdef RVM_RFSFAT_SWE
746 extern SHORT rfsfat_pei_create (T_PEI_INFO const **Info);
747 const T_COMPONENT_ADDRESS rfsfat_list[] =
748 {
749 { rfsfat_pei_create, NULL, ASSIGNED_BY_TI },
750 { NULL, NULL, 0 }
751 };
752 #endif
753
754 #ifdef RVM_MKS_SWE
755 extern SHORT mks_pei_create (T_PEI_INFO const **Info);
756 const T_COMPONENT_ADDRESS mks_list[] =
757 {
758 { mks_pei_create, NULL, ASSIGNED_BY_TI },
759 { NULL, NULL, 0 }
760 };
761 #endif
762
763 #ifdef RVM_HASH_SWE
764 extern SHORT hash_pei_create (T_PEI_INFO const **Info);
765 const T_COMPONENT_ADDRESS hash_list[] =
766 {
767 { hash_pei_create, NULL, ASSIGNED_BY_TI },
768 { NULL, NULL, 0 }
769 };
770 #endif
771
772 #ifdef RVM_CRY_SWE
773 extern SHORT cry_pei_create (T_PEI_INFO const **Info);
774 const T_COMPONENT_ADDRESS cry_list[] =
775 {
776 { cry_pei_create, NULL, ASSIGNED_BY_TI },
777 { NULL, NULL, 0 }
778 };
779 #endif
780
781 #ifdef RVM_TTY_SWE
782 extern SHORT tty_pei_create (T_PEI_INFO const **Info);
783 const T_COMPONENT_ADDRESS tty_list[] =
784 {
785 { tty_pei_create, NULL, ASSIGNED_BY_TI },
786 { NULL, NULL, 0 }
787 };
788 #endif
789
790 #ifdef RVM_LCD_SWE
791 extern SHORT lcd_pei_create (T_PEI_INFO const **Info);
792 const T_COMPONENT_ADDRESS lcd_list[] =
793 {
794 { lcd_pei_create, NULL, ASSIGNED_BY_TI },
795 { NULL, NULL, 0 }
796 };
797 #endif
798
799 #if(PSP_STANDALONE==0)
800 #ifdef RVM_SSL_SWE
801 extern SHORT ssl_pei_create (T_PEI_INFO const **Info);
802 const T_COMPONENT_ADDRESS ssl_list[] =
803 {
804 { ssl_pei_create, NULL, ASSIGNED_BY_TI },
805 { NULL, NULL, 0 }
806 };
807 #endif
808 #endif
809
810 #ifdef RVM_LCC_SWE
811 extern SHORT lcc_pei_create (T_PEI_INFO const **Info);
812 const T_COMPONENT_ADDRESS lcc_list[] =
813 {
814 { lcc_pei_create, NULL, ASSIGNED_BY_TI },
815 { NULL, NULL, 0 }
816 };
817 #endif
818
819 #ifdef RVM_MC_SWE
820 extern SHORT mc_pei_create (T_PEI_INFO const **Info);
821 const T_COMPONENT_ADDRESS mc_list[] =
822 {
823 { mc_pei_create, NULL, ASSIGNED_BY_TI },
824 { NULL, NULL, 0 }
825 };
826 #endif
827
828 #endif //if CHIPSET == 15 and REMU == 1
829
830
831 const T_COMPONENT_ADDRESS *ComponentTables[]=
832 {
833 tstrcv_list,
834 tstsnd_list,
835 #if (CHIPSET==15) && (REMU==1) && defined _TARGET_ /* PSP Driver Entities. DO NOT ADD ENTIRIS IN PSP ENTITIES
836 SECTION THIS WILL LEAD TO SYTEM CRASH */
837 #ifdef RVM_KPD_SWE
838 kpd_list,
839 #endif
840
841 #if (TEST == 1)
842 rv_test_list,
843 rtest_list,
844 #endif
845
846 #ifdef RVM_DMA_SWE
847 dma_list,
848 #endif
849
850 #ifdef RVM_R2D_SWE
851 r2d_list,
852 #endif
853
854 #ifdef RVM_RVT_SWE
855 rvt_list,
856 #endif
857
858 #ifdef RVM_USB_SWE
859 usb_list,
860 #endif
861
862 #ifdef RVM_USBFAX_SWE
863 usbfax_list,
864 #endif
865
866 #ifdef RVM_USBMS_SWE
867 usbms_list,
868 #endif
869
870 #ifdef RVM_USBTRC_SWE
871 usbtrc_list,
872 #endif
873
874 #ifdef RVM_RTC_SWE
875 rtc_list,
876 #endif
877
878 #ifdef RVM_ETM_SWE
879 etm_list,
880 #endif
881
882 #ifdef RVM_FFS_SWE
883 ffs_list,
884 #endif
885 #ifdef RVM_DAR_SWE
886 dar_list,
887 #endif
888
889 #ifdef RVM_MC_SWE
890 mc_list,
891 #endif
892
893 #ifdef RVM_GBI_SWE
894 gbi_list,
895 #endif
896
897 #ifdef RVM_DATALIGHT_SWE
898 datalight_list,
899 #else
900
901 #ifdef RVM_NAN_SWE
902 nan_list,
903 #endif
904
905 #ifdef RVM_NOR_BM_SWE
906 nor_bm_list,
907 #endif
908 #endif /* RVM_DATALIGHT_SWE */
909
910 #ifdef RVM_CAMA_SWE
911 cama_list,
912 #endif
913
914 #ifdef RVM_CAMD_SWE
915 camd_list,
916 #endif
917
918 #ifdef RVM_RFS_SWE
919 rfs_list,
920 #endif
921
922 #ifdef RVM_RFSFAT_SWE
923 rfsfat_list,
924 #endif
925 #ifdef RVM_AUDIO_MAIN_SWE
926 audio_list,
927 #endif
928 #ifdef RVM_IMG_SWE
929 img_list,
930 #endif
931
932 #ifdef RVM_RFSNAND_SWE
933 rfsnand_list,
934 #endif
935 #ifdef RVM_BAE_SWE
936 bae_list,
937 #endif
938
939 #ifdef RVM_AS_SWE
940 as_list,
941 #endif
942 #ifdef RVM_MKS_SWE
943 mks_list,
944 #endif
945
946 #ifdef RVM_HASH_SWE
947 hash_list,
948 #endif
949
950 #ifdef RVM_CRY_SWE
951 cry_list,
952 #endif
953 #ifdef RVM_TTY_SWE
954 #if (L1_GTT == 1)
955 tty_list,
956 #endif
957 #endif
958
959 #ifdef RVM_LCD_SWE
960 lcd_list,
961 #endif
962
963 #ifdef RVM_LCC_SWE
964 lcc_list,
965 #endif
966
967 #if(PSP_STANDALONE==0)
968 #ifdef RVM_SSL_SWE
969 ssl_list,
970 #endif
971 #endif
972
973 #endif /* end (CHIPSET==15) */
974 #if(PSP_STANDALONE==0)
975 mmi_list,
976 cst_list,
977 sim_list,
978 #ifdef BTS
979 bts_list, /* Bluetooth sub-system */
980 #ifdef BTW
981 btw_list, /* Bluetooth worker test */
982 #endif /* BTW */
983 #ifdef BTT
984 btt_list, /* Bluetooth Reference Applications */
985 #endif /* BTT */
986 #ifdef BTAV
987 btav_list, /*Bluetooth AV task */
988 #endif /* BTAV */
989 #ifdef BTU
990 btu_list, /* Bluetooth UART */
991 #endif /* BTU */
992 #ifdef FMS
993 fms_list,
994 #endif /*FMS */
995 #endif /* BTS */
996
997 cm_list,
998 mmgmm_list,
999 rr_list,
1000 grr_list,
1001 grlc_list,
1002 dl_list,
1003 pl_list,
1004 #ifdef FAX_AND_DATA
1005 l2rt30_list,
1006 rlpfad_list,
1007 #endif /* FAX_AND_DATA */
1008 llc_list,
1009 sndcp_list,
1010 ppp_list,
1011 uart_list,
1012 #ifdef FF_MUX
1013 mux_list,
1014 #endif
1015 #ifdef FF_PKTIO
1016 pktio_list,
1017 #endif
1018 #ifdef FF_PSI
1019 psi_list,
1020 #endif
1021 upm_list,
1022 #ifndef _TARGET_
1023 clt_list,
1024 #endif /* !_TARGET_ */
1025 #ifndef FF_ATI_BAT
1026 #ifdef FF_BAT
1027 gdd_dio_list,
1028 #endif /* FF_BAT */
1029 #endif
1030 #ifdef FF_EOTD
1031 eotd_list,
1032 #endif
1033 #ifdef FF_WAP
1034 wap_list,
1035 #endif
1036
1037 #ifdef CO_UDP_IP
1038 udp_list,
1039 ip_list,
1040 #endif
1041 #if defined _SIMULATION_ && defined FF_FAX
1042 ra_list,
1043 #endif
1044 #ifdef FF_TCP_IP
1045 aaa_list,
1046 #endif /* FF_TCP_IP */
1047
1048 #ifdef FF_GPF_TCPIP
1049 tcpip_list,
1050 #endif
1051
1052 #if defined (CO_TCPIP_TESTAPP) || defined (CO_BAT_TESTAPP)
1053 app_list,
1054 #endif /* CO_TCPIP_TESTAPP */
1055
1056 #ifdef FF_ESIM
1057 esim_list, /* needed for esim module */
1058 #endif
1059 l1_list,
1060 #endif
1061 NULL
1062 };
1063
1064 /*==== VERSIONS ===================================================*/
1065 #ifndef CTRACE
1066 char * str2ind_version = "&0";
1067 #endif
1068
1069 #endif /* DATA_EXT_RAM */
1070
1071 /*==== MEMORY CONFIGURATION =======================================*/
1072
1073 /*
1074 * Partitions pool configuration for primitive communication
1075 */
1076
1077 /*
1078 * Memory extensions for multiplexer
1079 */
1080 #ifdef FF_MUX
1081 #define PRIMPOOL_0_MUX_ADDITION 30
1082 #define PRIMPOOL_2_MUX_ADDITION 10
1083 #else /* FF_MUX */
1084 #define PRIMPOOL_0_MUX_ADDITION 0
1085 #define PRIMPOOL_2_MUX_ADDITION 0
1086 #endif /* else FF_MUX */
1087
1088 /*
1089 * Memory extensions for multiple PDP contexts
1090 */
1091 #ifdef FF_PKTIO
1092 #define PRIMPOOL_2_MPDP_ADDITION 30
1093 #else /* FF_PKTIO */
1094 #define PRIMPOOL_2_MPDP_ADDITION 0
1095 #endif /* else FF_PKTIO */
1096 #ifdef WIN32
1097 /*
1098 * Required for testing LLC acknowledged mode.
1099 */
1100 #define PRIMPOOL_0_PARTITIONS 200
1101 #define PRIMPOOL_1_PARTITIONS 100
1102 #define PRIMPOOL_2_PARTITIONS 20
1103 #define PRIMPOOL_3_PARTITIONS 20
1104
1105 #else /*WIN32*/
1106
1107 #define PRIMPOOL_0_PARTITIONS (190 + PRIMPOOL_0_MUX_ADDITION + 20)
1108 #define PRIMPOOL_1_PARTITIONS 110
1109 #define PRIMPOOL_2_PARTITIONS ( 50 + PRIMPOOL_2_MPDP_ADDITION + PRIMPOOL_2_MUX_ADDITION + 5)
1110 #if (DRP_FW_EXT==1)
1111 #define PRIMPOOL_3_PARTITIONS 8
1112 #else
1113 #define PRIMPOOL_3_PARTITIONS 7
1114 #endif
1115 #endif /*WIN32*/
1116
1117 #define PRIM_PARTITION_0_SIZE 60
1118 #define PRIM_PARTITION_1_SIZE 128
1119 #define PRIM_PARTITION_2_SIZE 632
1120
1121 #if (CHIPSET == 15)
1122 #define PRIM_PARTITION_3_SIZE 1764
1123 #else
1124 #define PRIM_PARTITION_3_SIZE 1600
1125 #endif
1126
1127 #ifndef DATA_INT_RAM
1128 unsigned int MaxPrimPartSize = PRIM_PARTITION_3_SIZE;
1129 #endif /* !DATA_INT_RAM */
1130
1131 #if (!defined DATA_EXT_RAM && defined PRIM_0_INT_RAM) || (!defined DATA_INT_RAM && !defined PRIM_0_INT_RAM)
1132 char pool10 [ POOL_SIZE(PRIMPOOL_0_PARTITIONS,ALIGN_SIZE(PRIM_PARTITION_0_SIZE)) ];
1133 #else
1134 extern char pool10 [];
1135 #endif
1136
1137 #if (!defined DATA_EXT_RAM && defined PRIM_1_INT_RAM) || (!defined DATA_INT_RAM && !defined PRIM_1_INT_RAM)
1138 char pool11 [ POOL_SIZE(PRIMPOOL_1_PARTITIONS,ALIGN_SIZE(PRIM_PARTITION_1_SIZE)) ];
1139 #else
1140 extern char pool11 [];
1141 #endif
1142
1143 #if (!defined DATA_EXT_RAM && defined PRIM_2_INT_RAM) || (!defined DATA_INT_RAM && !defined PRIM_2_INT_RAM)
1144 char pool12 [ POOL_SIZE(PRIMPOOL_2_PARTITIONS,ALIGN_SIZE(PRIM_PARTITION_2_SIZE)) ];
1145 #else
1146 extern char pool12 [];
1147 #endif
1148
1149 #if (!defined DATA_EXT_RAM && defined PRIM_3_INT_RAM) || (!defined DATA_INT_RAM && !defined PRIM_3_INT_RAM)
1150 char pool13 [ POOL_SIZE(PRIMPOOL_3_PARTITIONS,ALIGN_SIZE(PRIM_PARTITION_3_SIZE)) ];
1151 #else
1152 extern char pool13 [];
1153 #endif
1154
1155 #ifndef DATA_INT_RAM
1156 const T_FRM_PARTITION_POOL_CONFIG prim_grp_config[] =
1157 {
1158 { PRIMPOOL_0_PARTITIONS, ALIGN_SIZE(PRIM_PARTITION_0_SIZE), &pool10 },
1159 { PRIMPOOL_1_PARTITIONS, ALIGN_SIZE(PRIM_PARTITION_1_SIZE), &pool11 },
1160 { PRIMPOOL_2_PARTITIONS, ALIGN_SIZE(PRIM_PARTITION_2_SIZE), &pool12 },
1161 { PRIMPOOL_3_PARTITIONS, ALIGN_SIZE(PRIM_PARTITION_3_SIZE), &pool13 },
1162 { 0 , 0 , NULL }
1163 };
1164 #endif /* !DATA_INT_RAM */
1165
1166 /*
1167 * Partitions pool configuration for test interface communication
1168 */
1169 #define TESTPOOL_0_PARTITIONS 10
1170 #define TESTPOOL_1_PARTITIONS 200
1171 #define TESTPOOL_2_PARTITIONS 2
1172
1173 #define TSTSND_QUEUE_ENTRIES (TESTPOOL_0_PARTITIONS+TESTPOOL_1_PARTITIONS+TESTPOOL_2_PARTITIONS)
1174 #define TSTRCV_QUEUE_ENTRIES 50
1175
1176 #define TEST_PARTITION_0_SIZE 80
1177 #ifdef _TARGET_
1178 #define TEST_PARTITION_1_SIZE 160
1179 #else
1180 #define TEST_PARTITION_1_SIZE 260
1181 #endif
1182 #define TEST_PARTITION_2_SIZE 1600
1183
1184 #ifndef DATA_INT_RAM
1185 const USHORT TST_SndQueueEntries = TSTSND_QUEUE_ENTRIES;
1186 const USHORT TST_RcvQueueEntries = TSTRCV_QUEUE_ENTRIES;
1187 const USHORT TextTracePartitionSize = TEST_PARTITION_1_SIZE;
1188 #endif /* !DATA_INT_RAM */
1189
1190 #if (!defined DATA_EXT_RAM && defined TEST_0_INT_RAM) || (!defined DATA_INT_RAM && !defined TEST_0_INT_RAM)
1191 char pool20 [ POOL_SIZE(TESTPOOL_0_PARTITIONS,ALIGN_SIZE(TEST_PARTITION_0_SIZE)) ];
1192 #else
1193 extern char pool20 [];
1194 #endif
1195
1196 #if (!defined DATA_EXT_RAM && defined TEST_1_INT_RAM) || (!defined DATA_INT_RAM && !defined TEST_1_INT_RAM)
1197 char pool21 [ POOL_SIZE(TESTPOOL_1_PARTITIONS,ALIGN_SIZE(TEST_PARTITION_1_SIZE)) ];
1198 #else
1199 extern char pool21 [];
1200 #endif
1201
1202 #if (!defined DATA_EXT_RAM && defined TEST_2_INT_RAM) || (!defined DATA_INT_RAM && !defined TEST_2_INT_RAM)
1203 char pool22 [ POOL_SIZE(TESTPOOL_2_PARTITIONS,ALIGN_SIZE(TEST_PARTITION_2_SIZE)) ];
1204 #else
1205 extern char pool22 [];
1206 #endif
1207
1208 #ifndef DATA_INT_RAM
1209 const T_FRM_PARTITION_POOL_CONFIG test_grp_config[] =
1210 {
1211 { TESTPOOL_0_PARTITIONS, ALIGN_SIZE(TEST_PARTITION_0_SIZE), &pool20 },
1212 { TESTPOOL_1_PARTITIONS, ALIGN_SIZE(TEST_PARTITION_1_SIZE), &pool21 },
1213 { TESTPOOL_2_PARTITIONS, ALIGN_SIZE(TEST_PARTITION_2_SIZE), &pool22 },
1214 { 0 , 0 , NULL }
1215 };
1216 #endif /* !DATA_INT_RAM */
1217
1218 /*
1219 * Partitions pool configuration for general purpose allocation
1220 */
1221
1222 #define DMEMPOOL_0_PARTITIONS 70
1223 #define DMEMPOOL_1_PARTITIONS 2
1224
1225 #define DMEM_PARTITION_0_SIZE 16
1226 #ifdef _TARGET_
1227 #define DMEM_PARTITION_1_SIZE 1600 /* for non tracing ccd arm7 */
1228 #else
1229 #define DMEM_PARTITION_1_SIZE 2800 /* for non tracing ccd pc */
1230 #endif
1231
1232 #if (!defined DATA_EXT_RAM && defined DMEM_0_INT_RAM) || (!defined DATA_INT_RAM && !defined DMEM_0_INT_RAM)
1233 char pool30 [ POOL_SIZE(DMEMPOOL_0_PARTITIONS,ALIGN_SIZE(DMEM_PARTITION_0_SIZE)) ];
1234 #else
1235 extern char pool30 [];
1236 #endif
1237
1238 #if (!defined DATA_EXT_RAM && defined DMEM_1_INT_RAM) || (!defined DATA_INT_RAM && !defined DMEM_1_INT_RAM)
1239 char pool31 [ POOL_SIZE(DMEMPOOL_1_PARTITIONS,ALIGN_SIZE(DMEM_PARTITION_1_SIZE)) ];
1240 #else
1241 extern char pool31 [];
1242 #endif
1243
1244 #ifndef DATA_INT_RAM
1245 const T_FRM_PARTITION_POOL_CONFIG dmem_grp_config[] =
1246 {
1247 { DMEMPOOL_0_PARTITIONS, ALIGN_SIZE(DMEM_PARTITION_0_SIZE), &pool30 },
1248 { DMEMPOOL_1_PARTITIONS, ALIGN_SIZE(DMEM_PARTITION_1_SIZE), &pool31 },
1249 { 0 , 0 , NULL }
1250 };
1251 #endif /* !DATA_INT_RAM */
1252
1253 /*
1254 * Partitions pool configuration for board support package (based on REMU)
1255 */
1256 #if (CHIPSET==15) && (REMU==1) && (LOCOSTO_LITE==0)
1257
1258 #if (BSPPOOL_0_PARTITIONS>0)
1259 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1260 char pool40 [ POOL_SIZE(BSPPOOL_0_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_0_SIZE)) ];
1261 #else
1262 extern char pool40[];
1263 #endif
1264 #endif
1265
1266 #if (BSPPOOL_1_PARTITIONS>0)
1267 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1268 char pool41 [ POOL_SIZE(BSPPOOL_1_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_1_SIZE)) ];
1269 #else
1270 extern char pool41[];
1271 #endif
1272 #endif
1273
1274 #if (BSPPOOL_2_PARTITIONS>0)
1275 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1276 char pool42 [ POOL_SIZE(BSPPOOL_2_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_2_SIZE)) ];
1277 #else
1278 extern char pool42[];
1279 #endif
1280 #endif
1281
1282 #if (BSPPOOL_3_PARTITIONS>0)
1283 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1284 char pool43 [ POOL_SIZE(BSPPOOL_3_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_3_SIZE)) ];
1285 #else
1286 extern char pool43[];
1287 #endif
1288 #endif
1289
1290 #if (BSPPOOL_4_PARTITIONS>0)
1291 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1292 char pool44 [ POOL_SIZE(BSPPOOL_4_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_4_SIZE)) ];
1293 #else
1294 extern char pool44[];
1295 #endif
1296 #endif
1297
1298 #if (BSPPOOL_5_PARTITIONS>0)
1299 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1300 char pool45 [ POOL_SIZE(BSPPOOL_5_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_5_SIZE)) ];
1301 #else
1302 extern char pool45[];
1303 #endif
1304 #endif
1305
1306 #if (BSPPOOL_6_PARTITIONS>0)
1307 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1308 char pool46 [ POOL_SIZE(BSPPOOL_6_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_6_SIZE)) ];
1309 #else
1310 extern char pool46[];
1311 #endif
1312 #endif
1313
1314 #if (BSPPOOL_7_PARTITIONS>0)
1315 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1316 char pool47 [ POOL_SIZE(BSPPOOL_7_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_7_SIZE)) ];
1317 #else
1318 extern char pool47[];
1319 #endif
1320 #endif
1321
1322 #if (BSPPOOL_8_PARTITIONS>0)
1323 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1324 char pool48 [ POOL_SIZE(BSPPOOL_8_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_8_SIZE)) ];
1325 #else
1326 extern char pool48[];
1327 #endif
1328 #endif
1329
1330 #if (BSPPOOL_9_PARTITIONS>0)
1331 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1332 char pool49 [ POOL_SIZE(BSPPOOL_9_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_9_SIZE)) ];
1333 #else
1334 extern char pool49[];
1335 #endif
1336 #endif
1337
1338 #if (BSPPOOL_10_PARTITIONS>0)
1339 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1340 char pool50 [ POOL_SIZE(BSPPOOL_10_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_10_SIZE)) ];
1341 #else
1342 extern char pool50[];
1343 #endif
1344 #endif
1345
1346 #if (BSPPOOL_11_PARTITIONS>0)
1347 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1348 char pool51 [ POOL_SIZE(BSPPOOL_11_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_11_SIZE)) ];
1349 #else
1350 extern char pool51[];
1351 #endif
1352 #endif
1353
1354 #if (BSPPOOL_12_PARTITIONS>0)
1355 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1356 char pool52 [ POOL_SIZE(BSPPOOL_12_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_12_SIZE)) ];
1357 #else
1358 extern char pool52[];
1359 #endif
1360 #endif
1361
1362 #if (BSPPOOL_13_PARTITIONS>0)
1363 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1364 char pool53 [ POOL_SIZE(BSPPOOL_13_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_13_SIZE)) ];
1365 #else
1366 extern char pool53[];
1367 #endif
1368 #endif
1369
1370 #if (BSPPOOL_14_PARTITIONS>0)
1371 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1372 char pool54 [ POOL_SIZE(BSPPOOL_14_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_14_SIZE)) ];
1373 #else
1374 extern char pool54[];
1375 #endif
1376 #endif
1377
1378 #if (BSPPOOL_15_PARTITIONS>0)
1379 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1380 char pool55 [ POOL_SIZE(BSPPOOL_15_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_15_SIZE)) ];
1381 #else
1382 extern char pool55[];
1383 #endif
1384 #endif
1385
1386 #if (BSPPOOL_16_PARTITIONS>0)
1387 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1388 char pool56 [ POOL_SIZE(BSPPOOL_16_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_16_SIZE)) ];
1389 #else
1390 extern char pool56[];
1391 #endif
1392 #endif
1393
1394 #if (BSPPOOL_17_PARTITIONS>0)
1395 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1396 char pool57 [ POOL_SIZE(BSPPOOL_17_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_17_SIZE)) ];
1397 #else
1398 extern char pool57[];
1399 #endif
1400 #endif
1401
1402
1403 #if (BSPPOOL_18_PARTITIONS>0)
1404 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1405 char pool58 [ POOL_SIZE(BSPPOOL_18_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_18_SIZE)) ];
1406 #else
1407 extern char pool58[];
1408 #endif
1409 #endif
1410
1411 #if (BSPPOOL_19_PARTITIONS>0)
1412 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1413 char pool59 [ POOL_SIZE(BSPPOOL_19_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_19_SIZE)) ];
1414 #else
1415 extern char pool59[];
1416 #endif
1417 #endif
1418
1419 #if (BSPPOOL_20_PARTITIONS>0)
1420 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1421 char pool60 [ POOL_SIZE(BSPPOOL_20_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_20_SIZE)) ];
1422 #else
1423 extern char pool60[];
1424 #endif
1425 #endif
1426
1427 #if (BSPPOOL_21_PARTITIONS>0)
1428 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1429 char pool61 [ POOL_SIZE(BSPPOOL_21_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_21_SIZE)) ];
1430 #else
1431 extern char pool61[];
1432 #endif
1433 #endif
1434
1435 #if (BSPPOOL_22_PARTITIONS>0)
1436 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1437 char pool62 [ POOL_SIZE(BSPPOOL_22_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_22_SIZE)) ];
1438 #else
1439 extern char pool62[];
1440 #endif
1441 #endif
1442
1443 #if (BSPPOOL_23_PARTITIONS>0)
1444 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1445 char pool63 [ POOL_SIZE(BSPPOOL_23_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_23_SIZE)) ];
1446 #else
1447 extern char pool63[];
1448 #endif
1449 #endif
1450
1451
1452 #if (BSPPOOL_24_PARTITIONS>0)
1453 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1454 char pool64 [ POOL_SIZE(BSPPOOL_24_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_24_SIZE)) ];
1455 #else
1456 extern char pool64[];
1457 #endif
1458 #endif
1459
1460
1461 #if (BSPPOOL_25_PARTITIONS>0)
1462 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1463 char pool65 [ POOL_SIZE(BSPPOOL_25_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_25_SIZE)) ];
1464 #else
1465 extern char pool65[];
1466 #endif
1467 #endif
1468
1469
1470 #if (BSPPOOL_26_PARTITIONS>0)
1471 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1472 char pool66 [ POOL_SIZE(BSPPOOL_26_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_26_SIZE)) ];
1473 #else
1474 extern char pool66[];
1475 #endif
1476 #endif
1477
1478
1479 #if (BSPPOOL_27_PARTITIONS>0)
1480 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1481 char pool67 [ POOL_SIZE(BSPPOOL_27_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_27_SIZE)) ];
1482 #else
1483 extern char pool67[];
1484 #endif
1485 #endif
1486
1487 #if (BSPPOOL_28_PARTITIONS>0)
1488 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1489 char pool68 [ POOL_SIZE(BSPPOOL_28_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_28_SIZE)) ];
1490 #else
1491 extern char pool68[];
1492 #endif
1493 #endif
1494
1495 #if (BSPPOOL_29_PARTITIONS>0)
1496 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1497 char pool69 [ POOL_SIZE(BSPPOOL_29_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_29_SIZE)) ];
1498 #else
1499 extern char pool69[];
1500 #endif
1501 #endif
1502
1503 #if (BSPPOOL_30_PARTITIONS>0)
1504 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1505 char pool70 [ POOL_SIZE(BSPPOOL_30_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_30_SIZE)) ];
1506 #else
1507 extern char pool70[];
1508 #endif
1509 #endif
1510
1511 #if (BSPPOOL_31_PARTITIONS>0)
1512 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1513 char pool71 [ POOL_SIZE(BSPPOOL_31_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_31_SIZE)) ];
1514 #else
1515 extern char pool71[];
1516 #endif
1517 #endif
1518
1519 #if (BSPPOOL_32_PARTITIONS>0)
1520 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1521 char pool72 [ POOL_SIZE(BSPPOOL_32_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_32_SIZE)) ];
1522 #else
1523 extern char pool72[];
1524 #endif
1525 #endif
1526
1527 #if (L1_PCM_EXTRACTION==1)
1528 #if (BSPPOOL_32_NEW_PARTITIONS>0)
1529 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1530 char pool72_new [ POOL_SIZE(BSPPOOL_32_NEW_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_32_NEW_SIZE)) ];
1531 #else
1532 extern char pool72_new[];
1533 #endif
1534 #endif
1535 #endif
1536
1537 #if (BSPPOOL_33_PARTITIONS>0)
1538 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1539 char pool73_new [ POOL_SIZE(BSPPOOL_33_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_33_SIZE)) ];
1540 #else
1541 extern char pool73_new[];
1542 #endif
1543 #endif
1544
1545 /*Added for camd snapshot in RTEST*/
1546 #if (BSPPOOL_34_PARTITIONS>0)
1547 #if (!defined DATA_EXT_RAM && defined BSP_26_INT_RAM) || (!defined DATA_INT_RAM && !defined BSP_26_INT_RAM)
1548 char pool74_new [ POOL_SIZE(BSPPOOL_34_PARTITIONS,ALIGN_SIZE(BSP_PARTITION_34_SIZE)) ];
1549 #else
1550 extern char pool74_new[];
1551 #endif
1552 #endif
1553
1554 #ifndef DATA_INT_RAM
1555 const T_FRM_PARTITION_POOL_CONFIG bsp_grp_config[] =
1556 {
1557 #if (BSPPOOL_0_PARTITIONS>0)
1558 {BSPPOOL_0_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_0_SIZE), &pool40 },
1559 #endif
1560 #if (BSPPOOL_1_PARTITIONS>0)
1561 { BSPPOOL_1_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_1_SIZE), &pool41 },
1562 #endif
1563 #if (BSPPOOL_2_PARTITIONS>0)
1564 { BSPPOOL_2_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_2_SIZE), &pool42 },
1565 #endif
1566 #if (BSPPOOL_3_PARTITIONS>0)
1567 { BSPPOOL_3_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_3_SIZE), &pool43 },
1568 #endif
1569 #if (BSPPOOL_4_PARTITIONS>0)
1570 { BSPPOOL_4_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_4_SIZE), &pool44 },
1571 #endif
1572 #if (BSPPOOL_5_PARTITIONS>0)
1573 { BSPPOOL_5_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_5_SIZE), &pool45 },
1574 #endif
1575 #if (BSPPOOL_6_PARTITIONS>0)
1576 { BSPPOOL_6_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_6_SIZE), &pool46 },
1577 #endif
1578 #if (BSPPOOL_7_PARTITIONS>0)
1579 { BSPPOOL_7_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_7_SIZE), &pool47 },
1580 #endif
1581 #if (BSPPOOL_8_PARTITIONS>0)
1582 { BSPPOOL_8_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_8_SIZE), &pool48 },
1583 #endif
1584 #if (BSPPOOL_9_PARTITIONS>0)
1585 { BSPPOOL_9_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_9_SIZE), &pool49 },
1586 #endif
1587 #if (BSPPOOL_10_PARTITIONS>0)
1588 { BSPPOOL_10_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_10_SIZE), &pool50 },
1589 #endif
1590 #if (BSPPOOL_11_PARTITIONS>0)
1591 { BSPPOOL_11_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_11_SIZE), &pool51 },
1592 #endif
1593 #if (BSPPOOL_12_PARTITIONS>0)
1594 { BSPPOOL_12_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_12_SIZE), &pool52 },
1595 #endif
1596 #if (BSPPOOL_13_PARTITIONS>0)
1597 { BSPPOOL_13_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_13_SIZE), &pool53 },
1598 #endif
1599 #if (BSPPOOL_14_PARTITIONS>0)
1600 { BSPPOOL_14_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_14_SIZE), &pool54 },
1601 #endif
1602 #if (BSPPOOL_15_PARTITIONS>0)
1603 { BSPPOOL_15_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_15_SIZE), &pool55 },
1604 #endif
1605 #if (BSPPOOL_16_PARTITIONS>0)
1606 { BSPPOOL_16_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_16_SIZE), &pool56 },
1607 #endif
1608 #if (BSPPOOL_17_PARTITIONS>0)
1609 { BSPPOOL_17_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_17_SIZE), &pool57 },
1610 #endif
1611 #if (BSPPOOL_18_PARTITIONS>0)
1612 { BSPPOOL_18_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_18_SIZE), &pool58 },
1613 #endif
1614 #if (BSPPOOL_19_PARTITIONS>0)
1615 { BSPPOOL_19_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_19_SIZE), &pool59 },
1616 #endif
1617 #if (BSPPOOL_20_PARTITIONS>0)
1618 { BSPPOOL_20_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_20_SIZE), &pool60 },
1619 #endif
1620 #if (BSPPOOL_21_PARTITIONS>0)
1621 { BSPPOOL_21_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_21_SIZE), &pool61 },
1622 #endif
1623 #if (BSPPOOL_22_PARTITIONS>0)
1624 { BSPPOOL_22_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_22_SIZE), &pool62 },
1625 #endif
1626 #if (BSPPOOL_23_PARTITIONS>0)
1627 { BSPPOOL_23_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_23_SIZE), &pool63 },
1628 #endif
1629 #if (BSPPOOL_24_PARTITIONS>0)
1630 { BSPPOOL_24_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_24_SIZE), &pool64 },
1631 #endif
1632 #if (BSPPOOL_25_PARTITIONS>0)
1633 { BSPPOOL_25_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_25_SIZE), &pool65 },
1634 #endif
1635 #if (BSPPOOL_26_PARTITIONS>0)
1636 { BSPPOOL_26_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_26_SIZE), &pool66 },
1637 #endif
1638 #if (BSPPOOL_27_PARTITIONS>0)
1639 { BSPPOOL_27_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_27_SIZE), &pool67 },
1640 #endif
1641 #if (BSPPOOL_28_PARTITIONS>0)
1642 { BSPPOOL_28_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_28_SIZE), &pool68 },
1643 #endif
1644 #if (BSPPOOL_29_PARTITIONS>0)
1645 { BSPPOOL_29_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_29_SIZE), &pool69 },
1646 #endif
1647 #if (BSPPOOL_30_PARTITIONS>0)
1648
1649 { BSPPOOL_30_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_30_SIZE), &pool70 },
1650 #endif
1651 #if (BSPPOOL_31_PARTITIONS>0)
1652 { BSPPOOL_31_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_31_SIZE), &pool71 },
1653 #endif
1654 #if (BSPPOOL_32_PARTITIONS>0)
1655 { BSPPOOL_32_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_32_SIZE), &pool72 },
1656 #endif
1657 #if (L1_PCM_EXTRACTION==1)
1658 #if (BSPPOOL_32_NEW_PARTITIONS>0)
1659 { BSPPOOL_32_NEW_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_32_NEW_SIZE), &pool72_new },
1660 #endif
1661 #endif
1662 #if (BSPPOOL_33_PARTITIONS>0)
1663 { BSPPOOL_33_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_33_SIZE), &pool73_new },
1664 #endif
1665 #if (BSPPOOL_34_PARTITIONS>0)
1666 { BSPPOOL_34_PARTITIONS, ALIGN_SIZE(BSP_PARTITION_34_SIZE), &pool74_new },
1667 #endif
1668
1669 { 0 , 0 , NULL }
1670 };
1671 /* Moved the defn of GSPTaskIdTable from REMU library to here so that size of this table will vary depending
1672 on LITE or PLUS build. Adding a buffer of 5 to ensure that remu task id will not exceed size of GSPTaskIdTable.
1673 Note that all the REMU entities should be immediately after tst snd and tst rcv task in ComponentTables list.
1674 Otherwise GSPTaskIdTable will overflow which will lead to system crash */
1675 T_GSP_RT_ADDR_ID_DATA* GSPTaskIdTable[MAX_REMU_ENTITIES+5];
1676
1677 #endif /* !DATA_INT_RAM */
1678 #endif /* end CHIPSET==15*/
1679
1680
1681
1682 /*
1683 * Partitions group list
1684 */
1685
1686 extern T_HANDLE PrimGroupHandle;
1687 extern T_HANDLE DmemGroupHandle;
1688 extern T_HANDLE TestGroupHandle;
1689 #if (CHIPSET==15) && (REMU==1) && defined _TARGET_
1690 #if (LOCOSTO_LITE==0)
1691 extern T_HANDLE BspGroupHandle;
1692 extern T_HANDLE BspIntGroupHandle;
1693 extern T_FRM_PARTITION_POOL_CONFIG bsp_int_grp_config[];
1694 #endif
1695 extern T_HANDLE BspGroupHandle;
1696 extern T_HANDLE BspRvtGroupHandle;
1697 #endif
1698
1699 #ifndef DATA_INT_RAM
1700 const T_FRM_PARTITION_GROUP_CONFIG partition_grp_config[MAX_POOL_GROUPS+1] =
1701 {
1702 { "PRIM", &prim_grp_config[0] },
1703 { "TEST", &test_grp_config[0] },
1704 { "DMEM", &dmem_grp_config[0] },
1705 #if (CHIPSET==15) && (REMU==1) && defined _TARGET_
1706 { "BEXT", &bsp_grp_config[0] },
1707 #if (LOCOSTO_LITE==0)
1708 { "BINT", & bsp_int_grp_config[0] },
1709 #endif
1710 #endif
1711 { NULL, NULL }
1712 };
1713
1714 T_HANDLE *PoolGroupHandle[MAX_POOL_GROUPS+1] =
1715 {
1716 &PrimGroupHandle,
1717 &TestGroupHandle,
1718 &DmemGroupHandle,
1719 #if (CHIPSET==15) && (REMU==1) && defined _TARGET_
1720 &BspGroupHandle,
1721 #if (LOCOSTO_LITE==0)
1722 &BspIntGroupHandle,
1723 #endif
1724 #endif
1725 NULL
1726 };
1727 #endif /* !DATA_INT_RAM */
1728
1729 /*
1730 * Dynamic Memory Pool Configuration
1731 */
1732
1733 #ifdef _TARGET_
1734 #ifdef FF_ESIM
1735 #define EXT_DATA_POOL_PS_BASE_SIZE 45000
1736 #else
1737 #define EXT_DATA_POOL_PS_BASE_SIZE 52000 /* L23 task stacks movement to external RAM: OMAPS00122070 */
1738 #endif
1739 #define INT_DATA_POOL_PS_BASE_SIZE 8012
1740 #else /* _TARGET_ */
1741 #define EXT_DATA_POOL_TCPIP_ADDTIION 120000
1742 #define EXT_DATA_POOL_PS_BASE_SIZE 80000 + EXT_DATA_POOL_TCPIP_ADDTIION
1743 #define INT_DATA_POOL_PS_BASE_SIZE 1000
1744 #endif /* _TARGET_ */
1745
1746 #ifdef MEMORY_SUPERVISION
1747 #define EXT_DATA_POOL_PPS_ADDITION ((EXT_DATA_POOL_PS_BASE_SIZE>>3)+25000)
1748 #define INT_DATA_POOL_PPS_ADDITION ((INT_DATA_POOL_PS_BASE_SIZE>>3))
1749 #else /* MEMORY_SUPERVISION */
1750 #define EXT_DATA_POOL_PPS_ADDITION 0
1751 #define INT_DATA_POOL_PPS_ADDITION 0
1752 #endif /* MEMORY_SUPERVISION */
1753
1754 #if defined (FF_WAP) || defined (FF_SAT_E)
1755 #define EXT_DATA_POOL_WAP_ADDITION 15000
1756 #else
1757 #define EXT_DATA_POOL_WAP_ADDITION 0
1758 #endif /* FF_WAP OR SAT E */
1759
1760 #ifdef GRR_PPC_IF_PRIM
1761 #define INT_DATA_POOL_GRR_PPC_IF_PRIM_ADDITION 3000
1762 #else /* #ifdef GRR_PPC_IF_PRIM */
1763 #define INT_DATA_POOL_GRR_PPC_IF_PRIM_ADDITION 0
1764 #endif /* #ifdef GRR_PPC_IF_PRIM */
1765
1766 #ifdef BTU
1767 #define EXT_DATA_POOL_BTU_ADDITION 2000
1768 #else
1769 #define EXT_DATA_POOL_BTU_ADDITION 0
1770 #endif
1771
1772 #define EXT_DATA_POOL_PS_SIZE (EXT_DATA_POOL_PS_BASE_SIZE + EXT_DATA_POOL_WAP_ADDITION + EXT_DATA_POOL_PPS_ADDITION+EXT_DATA_POOL_BTU_ADDITION)
1773 #define INT_DATA_POOL_PS_SIZE (INT_DATA_POOL_PS_BASE_SIZE + INT_DATA_POOL_GRR_PPC_IF_PRIM_ADDITION + INT_DATA_POOL_PPS_ADDITION)
1774
1775 #define EXT_DATA_POOL_GPF_SIZE (2048 + OS_QUEUE_ENTRY_SIZE(TSTSND_QUEUE_ENTRIES) + OS_QUEUE_ENTRY_SIZE(TSTRCV_QUEUE_ENTRIES))
1776
1777 #define EXT_DATA_POOL_SIZE (EXT_DATA_POOL_PS_SIZE + EXT_DATA_POOL_GPF_SIZE + EXT_DATA_POOL_BSP_SIZE + EXT_DATA_POOL_MM_SIZE)
1778 #define INT_DATA_POOL_SIZE (INT_DATA_POOL_PS_SIZE+INT_DATA_POOL_BSP_SIZE+INT_DATA_POOL_MM_SIZE+1000)
1779
1780 #if(PSP_STANDALONE == 1)
1781 #define MM_EXT_DATA_POOL_SIZE (1)
1782 #define MM_INT_DATA_POOL_SIZE (1)
1783 #endif
1784
1785 #ifndef DATA_INT_RAM
1786 char ext_data_pool [ EXT_DATA_POOL_SIZE ];
1787 char mm_ext_data_pool [MM_EXT_DATA_POOL_SIZE];
1788
1789 #if (REMU==1)
1790 #ifdef _TARGET_
1791 char rvt_data_pool [ EXT_RVT_DATA_POOL_BSP_SIZE ];
1792 #endif
1793 #endif
1794 GLOBAL T_HANDLE mm_ext_data_pool_handle;
1795 GLOBAL T_HANDLE mm_int_data_pool_handle;
1796 #endif /*DATA_INT_RAM*/
1797
1798 #ifndef DATA_EXT_RAM
1799 char int_data_pool [ INT_DATA_POOL_SIZE ];
1800 char mm_int_data_pool [MM_INT_DATA_POOL_SIZE];
1801 #else
1802 extern char int_data_pool [ ];
1803 extern char mm_int_data_pool [];
1804 #endif
1805 #ifndef DATA_INT_RAM
1806
1807 const T_MEMORY_POOL_CONFIG memory_pool_config[MAX_MEMORY_POOLS+1] =
1808 {
1809 { "INTPOOL", INT_DATA_POOL_SIZE, &int_data_pool[0] },
1810 { "EXTPOOL", EXT_DATA_POOL_SIZE, &ext_data_pool[0] },
1811 { "MMEPOOL", MM_EXT_DATA_POOL_SIZE, &mm_ext_data_pool[0] },
1812 { "MMIPOOL", MM_INT_DATA_POOL_SIZE, &mm_int_data_pool[0] },
1813 #if (REMU==1)
1814 #ifdef _TARGET_
1815 { "RVTPOOL", EXT_RVT_DATA_POOL_BSP_SIZE, &rvt_data_pool[0] },
1816 #endif
1817 #endif
1818 { NULL }
1819 };
1820
1821 extern T_HANDLE ext_data_pool_handle;
1822 extern T_HANDLE int_data_pool_handle;
1823 extern T_HANDLE rvt_data_pool_handle;
1824
1825 T_HANDLE *MemoryPoolHandle[MAX_MEMORY_POOLS+1] =
1826 {
1827 &int_data_pool_handle,
1828 &ext_data_pool_handle,
1829 &mm_ext_data_pool_handle,
1830 &mm_int_data_pool_handle,
1831 #if (REMU==1)
1832 #ifdef _TARGET_
1833 &rvt_data_pool_handle,
1834 #endif
1835 #endif
1836 NULL
1837 };
1838
1839 #endif /* !DATA_INT_RAM */
1840
1841