FreeCalypso > hg > fc-magnetite
comparison src/cs/system/Main/init.c @ 271:e18367b5427e
init.c: applied our necessary FreeCalypso changes to reconstructed Init_Target()
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sun, 06 Aug 2017 18:24:14 +0000 |
parents | d5a34ea92f2a |
children | 7e8aa98159ef |
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270:d5a34ea92f2a | 271:e18367b5427e |
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15 #include "l1sw.cfg" | 15 #include "l1sw.cfg" |
16 #include "rf.cfg" | 16 #include "rf.cfg" |
17 #include "chipset.cfg" | 17 #include "chipset.cfg" |
18 #include "board.cfg" | 18 #include "board.cfg" |
19 #include "swconfig.cfg" | 19 #include "swconfig.cfg" |
20 #include "fc-target.cfg" | |
20 #if (OP_L1_STANDALONE == 0) | 21 #if (OP_L1_STANDALONE == 0) |
21 #include "rv.cfg" | 22 #include "rv.cfg" |
22 #include "sys.cfg" | 23 #include "sys.cfg" |
23 #include "debug.cfg" | 24 #include "debug.cfg" |
24 #ifdef BLUETOOTH_INCLUDED | 25 #ifdef BLUETOOTH_INCLUDED |
370 // drp_power_on(); This should be done after the script is downloaded. | 371 // drp_power_on(); This should be done after the script is downloaded. |
371 #endif | 372 #endif |
372 #else | 373 #else |
373 #if (BOARD==35) | 374 #if (BOARD==35) |
374 *((volatile SYS_UWORD16 *) ASIC_CONF) = 0x2000; | 375 *((volatile SYS_UWORD16 *) ASIC_CONF) = 0x2000; |
376 #elif defined(CONFIG_TARGET_PIRELLI) /* from disasm of original fw */ | |
377 *((volatile SYS_UWORD16 *) ASIC_CONF) = 0x6050; | |
375 #else | 378 #else |
376 *((volatile SYS_UWORD16 *) ASIC_CONF) = 0x6000; | 379 *((volatile SYS_UWORD16 *) ASIC_CONF) = 0x6000; |
377 #endif /* (BOARD == 35) */ | 380 #endif /* (BOARD == 35) */ |
378 #endif | 381 #endif |
379 #endif | 382 #endif |
500 */ | 503 */ |
501 RHEA_INITRHEA(0,0,0xFF); | 504 RHEA_INITRHEA(0,0,0xFF); |
502 DPLL_INIT_BYPASS_MODE(DPLL_BYPASS_DIV_1); | 505 DPLL_INIT_BYPASS_MODE(DPLL_BYPASS_DIV_1); |
503 DPLL_INIT_DPLL_CLOCK(DPLL_LOCK_DIV_1, 8); | 506 DPLL_INIT_DPLL_CLOCK(DPLL_LOCK_DIV_1, 8); |
504 CLKM_InitARMClock(0x00, 2, 0); /* no low freq, no ext clock, div by 1 */ | 507 CLKM_InitARMClock(0x00, 2, 0); /* no low freq, no ext clock, div by 1 */ |
505 MEM_INIT_CS0(3, MEM_DVS_16, MEM_WRITE_EN, 0); | 508 /* |
506 MEM_INIT_CS1(3, MEM_DVS_16, MEM_WRITE_EN, 0); | 509 * FreeCalypso change: memory timings and widths |
507 MEM_INIT_CS2(5, MEM_DVS_16, MEM_WRITE_EN, 0); | 510 * are target-dependent. |
508 MEM_INIT_CS3(3, MEM_DVS_16, MEM_WRITE_EN, 0); | 511 */ |
509 MEM_INIT_CS4(0, MEM_DVS_8, MEM_WRITE_EN, 0); | 512 #ifdef CONFIG_TARGET_PIRELLI |
513 /* | |
514 * Pirelli's version of this Init_Target() function | |
515 * in their fw does the following: | |
516 */ | |
517 MEM_INIT_CS0(4, MEM_DVS_16, MEM_WRITE_EN, 0); | |
518 MEM_INIT_CS1(4, MEM_DVS_16, MEM_WRITE_EN, 0); | |
519 MEM_INIT_CS2(5, MEM_DVS_16, MEM_WRITE_EN, 0); | |
520 MEM_INIT_CS3(4, MEM_DVS_16, MEM_WRITE_EN, 0); | |
521 MEM_INIT_CS4(7, MEM_DVS_16, MEM_WRITE_EN, 0); | |
522 #elif defined(CONFIG_TARGET_FCFAM) | |
523 /* | |
524 * The settings currently adopted for the FreeCalypso | |
525 * hardware family, only nCS0, nCS1 and nCS2 are used | |
526 * presently. | |
527 */ | |
528 MEM_INIT_CS0(4, MEM_DVS_16, MEM_WRITE_EN, 0); | |
529 MEM_INIT_CS1(4, MEM_DVS_16, MEM_WRITE_EN, 0); | |
530 MEM_INIT_CS2(4, MEM_DVS_16, MEM_WRITE_EN, 0); | |
531 MEM_INIT_CS3(4, MEM_DVS_16, MEM_WRITE_EN, 0); | |
532 MEM_INIT_CS4(4, MEM_DVS_16, MEM_WRITE_EN, 0); | |
533 #else | |
534 /* | |
535 * The original settings from Openmoko, | |
536 * only nCS0 and nCS1 are actually used, | |
537 * same as on Mot C1xx phones, | |
538 * the nCS2/3/4 settings are dummies from TI. | |
539 */ | |
540 MEM_INIT_CS0(3, MEM_DVS_16, MEM_WRITE_EN, 0); | |
541 MEM_INIT_CS1(3, MEM_DVS_16, MEM_WRITE_EN, 0); | |
542 MEM_INIT_CS2(5, MEM_DVS_16, MEM_WRITE_EN, 0); | |
543 MEM_INIT_CS3(3, MEM_DVS_16, MEM_WRITE_EN, 0); | |
544 MEM_INIT_CS4(0, MEM_DVS_8, MEM_WRITE_EN, 0); | |
545 #endif | |
510 MEM_INIT_CS6(0, MEM_DVS_32, MEM_WRITE_EN, 0); | 546 MEM_INIT_CS6(0, MEM_DVS_32, MEM_WRITE_EN, 0); |
511 MEM_INIT_CS7(0, MEM_DVS_32, MEM_WRITE_DIS, 0); | 547 MEM_INIT_CS7(0, MEM_DVS_32, MEM_WRITE_DIS, 0); |
512 RHEA_INITAPI(0,1); | 548 RHEA_INITAPI(0,1); |
513 RHEA_INITARM(0,0); | 549 RHEA_INITARM(0,0); |
514 DPLL_SET_PLL_ENABLE; | 550 DPLL_SET_PLL_ENABLE; |
709 *((volatile SYS_UWORD16 *) 0xFFFFFD04) |= 0x04; | 745 *((volatile SYS_UWORD16 *) 0xFFFFFD04) |= 0x04; |
710 *((volatile SYS_UWORD16 *) 0xFFFFFD04) &= ~(0x4); | 746 *((volatile SYS_UWORD16 *) 0xFFFFFD04) &= ~(0x4); |
711 #endif | 747 #endif |
712 | 748 |
713 // set the debug latch to 0x0000. | 749 // set the debug latch to 0x0000. |
714 *((volatile SYS_UWORD16 *) 0x2700000) = 0x0000; | 750 /* |
751 * FreeCalypso change: this write is only correct when running | |
752 * on an actual D-Sample board, but not on any of the real-world | |
753 * Calypso target devices. | |
754 */ | |
755 #if 0 | |
756 *((volatile SYS_UWORD16 *) 0x2700000) = 0x0000; | |
757 #endif | |
715 #endif // BOARD | 758 #endif // BOARD |
716 | 759 |
717 // Enable HW Timers 1 & 2 | 760 // Enable HW Timers 1 & 2 |
718 TM_EnableTimer (1); | 761 TM_EnableTimer (1); |
719 TM_EnableTimer (2); | 762 TM_EnableTimer (2); |