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comparison cdg-hybrid/cdginc/p_mphc.h @ 212:e7a67accfad9

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cdg-hybrid cdginc headers created
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 14 Oct 2016 21:52:58 +0000
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211:02269c474131 212:e7a67accfad9
1 /*
2 +--------------------------------------------------------------------------+
3 | PROJECT : PROTOCOL STACK |
4 | FILE : p_mphc.h |
5 | SOURCE : "sap\mphc.pdf" |
6 | LastModified : "2003-04-03" |
7 | IdAndVersion : "10.10.10.011" |
8 | SrcFileTime : "Mon Sep 26 14:30:48 2005" |
9 | Generated by CCDGEN_2.5.5A on Fri Oct 14 21:41:52 2016 |
10 | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! |
11 +--------------------------------------------------------------------------+
12 */
13
14 /* PRAGMAS
15 * PREFIX : NONE
16 * COMPATIBILITY_DEFINES : NO (require PREFIX)
17 * ALWAYS_ENUM_IN_VAL_FILE: NO
18 * ENABLE_GROUP: NO
19 * CAPITALIZE_TYPENAME: NO
20 */
21
22
23 #ifndef P_MPHC_H
24 #define P_MPHC_H
25
26
27 #define CDG_ENTER__P_MPHC_H
28
29 #define CDG_ENTER__FILENAME _P_MPHC_H
30 #define CDG_ENTER__P_MPHC_H__FILE_TYPE CDGINC
31 #define CDG_ENTER__P_MPHC_H__LAST_MODIFIED _2003_04_03
32 #define CDG_ENTER__P_MPHC_H__ID_AND_VERSION _10_10_10_011
33
34 #define CDG_ENTER__P_MPHC_H__SRC_FILE_TIME _Mon_Sep_26_14_30_48_2005
35
36 #include "CDG_ENTER.h"
37
38 #undef CDG_ENTER__P_MPHC_H
39
40 #undef CDG_ENTER__FILENAME
41
42
43 #include "p_mphc.val"
44
45 #ifndef __T_schedule_array__
46 #define __T_schedule_array__
47 /*
48 * positional info
49 * CCDGEN:WriteStruct_Count==2096
50 */
51 typedef struct
52 {
53 U16 modulus; /*< 0: 2> modulo part */
54 U16 relative_position; /*< 2: 2> relative part */
55 } T_schedule_array;
56 #endif
57
58 #ifndef __T_l2_frame__
59 #define __T_l2_frame__
60 /*
61 * layer 2 frame
62 * CCDGEN:WriteStruct_Count==2097
63 */
64 typedef struct
65 {
66 U8 content[MAX_L2_FRAME_SIZE]; /*< 0: 23> frame content */
67 U8 _align0; /*< 23: 1> alignment */
68 } T_l2_frame;
69 #endif
70
71 #ifndef __T_chan_list__
72 #define __T_chan_list__
73 /*
74 * channel list
75 * CCDGEN:WriteStruct_Count==2098
76 */
77 typedef struct
78 {
79 U16 radio_freq[BA_LIST_SIZE]; /*< 0: 66> channel number */
80 U8 _align0; /*< 66: 1> alignment */
81 U8 _align1; /*< 67: 1> alignment */
82 } T_chan_list;
83 #endif
84
85 #ifndef __T_result__
86 #define __T_result__
87 /*
88 * measurement results
89 * CCDGEN:WriteStruct_Count==2099
90 */
91 typedef struct
92 {
93 U16 radio_freq; /*< 0: 2> channel number */
94 U8 rxlev; /*< 2: 1> The accumulated result of a power measurements. The signal strength units used are based on those described in GSM 05.08 (ETS 300 911) section 8.1.4. The measurements continue above 63 and below 0 */
95 U8 _align0; /*< 3: 1> alignment */
96 } T_result;
97 #endif
98
99 #ifndef __T_rf_channel__
100 #define __T_rf_channel__
101 /*
102 * channel choice
103 * CCDGEN:WriteStruct_Count==2100
104 */
105 typedef struct
106 {
107 U8 maio; /*< 0: 1> mobile allocation index offset */
108 U8 hsn; /*< 1: 1> hopping sequence number */
109 U8 _align0; /*< 2: 1> alignment */
110 U8 _align1; /*< 3: 1> alignment */
111 } T_rf_channel;
112 #endif
113
114 #ifndef __T_chan_sel__
115 #define __T_chan_sel__
116 /*
117 * channel selector
118 * CCDGEN:WriteStruct_Count==2101
119 */
120 typedef struct
121 {
122 U8 h; /*< 0: 1> hopping */
123 U8 _align0; /*< 1: 1> alignment */
124 U8 _align1; /*< 2: 1> alignment */
125 U8 _align2; /*< 3: 1> alignment */
126 T_rf_channel rf_channel; /*< 4: 4> channel choice */
127 } T_chan_sel;
128 #endif
129
130 #ifndef __T_cbch_desc__
131 #define __T_cbch_desc__
132 /*
133 * CBCH channel description
134 * CCDGEN:WriteStruct_Count==2102
135 */
136 typedef struct
137 {
138 T_chan_sel chan_sel; /*< 0: 8> channel selector */
139 U8 channel_type; /*< 8: 1> SDCCH channel type */
140 U8 sub_channel; /*< 9: 1> sub channel */
141 U8 timeslot_no; /*< 10: 1> timeslot number */
142 U8 tsc; /*< 11: 1> training sequence code */
143 } T_cbch_desc;
144 #endif
145
146 /*
147 * channel description
148 * CCDGEN:WriteStruct_Count==2103
149 */
150 #ifndef __T_channel_desc__
151 #define __T_channel_desc__
152 typedef T_cbch_desc T_channel_desc;
153 #endif
154 /*
155 * channel description
156 * CCDGEN:WriteStruct_Count==2104
157 */
158 #ifndef __T_channel_desc_1__
159 #define __T_channel_desc_1__
160 typedef T_cbch_desc T_channel_desc_1;
161 #endif
162 /*
163 * channel description
164 * CCDGEN:WriteStruct_Count==2105
165 */
166 #ifndef __T_channel_desc_2__
167 #define __T_channel_desc_2__
168 typedef T_cbch_desc T_channel_desc_2;
169 #endif
170 /*
171 * channel description before starting time
172 * CCDGEN:WriteStruct_Count==2106
173 */
174 #ifndef __T_channel_desc_1_bef_sti__
175 #define __T_channel_desc_1_bef_sti__
176 typedef T_cbch_desc T_channel_desc_1_bef_sti;
177 #endif
178 /*
179 * channel description before starting time
180 * CCDGEN:WriteStruct_Count==2107
181 */
182 #ifndef __T_channel_desc_2_bef_sti__
183 #define __T_channel_desc_2_bef_sti__
184 typedef T_cbch_desc T_channel_desc_2_bef_sti;
185 #endif
186 #ifndef __T_rf_chan_no__
187 #define __T_rf_chan_no__
188 /*
189 * channel list
190 * CCDGEN:WriteStruct_Count==2108
191 */
192 typedef struct
193 {
194 U16 radio_freq[MAX_MA_CARRIER]; /*< 0:128> channel number */
195 } T_rf_chan_no;
196 #endif
197
198 #ifndef __T_cbch_freq_list__
199 #define __T_cbch_freq_list__
200 /*
201 * CBCH frequency list
202 * CCDGEN:WriteStruct_Count==2109
203 */
204 typedef struct
205 {
206 U16 rf_chan_cnt; /*< 0: 2> number of channels in the mobile allocation list or number of bcch in the list */
207 U8 _align0; /*< 2: 1> alignment */
208 U8 _align1; /*< 3: 1> alignment */
209 T_rf_chan_no rf_chan_no; /*< 4:128> channel list */
210 } T_cbch_freq_list;
211 #endif
212
213 /*
214 * frequency list
215 * CCDGEN:WriteStruct_Count==2110
216 */
217 #ifndef __T_frequency_list__
218 #define __T_frequency_list__
219 typedef T_cbch_freq_list T_frequency_list;
220 #endif
221 /*
222 * frequency list before starting time
223 * CCDGEN:WriteStruct_Count==2111
224 */
225 #ifndef __T_frequency_list_bef_sti__
226 #define __T_frequency_list_bef_sti__
227 typedef T_cbch_freq_list T_frequency_list_bef_sti;
228 #endif
229 #ifndef __T_start_time__
230 #define __T_start_time__
231 /*
232 * starting time
233 * CCDGEN:WriteStruct_Count==2112
234 */
235 typedef struct
236 {
237 U8 t1; /*< 0: 1> N32; named n32 in S922.doc */
238 U8 t3; /*< 1: 1> N51; named n51 in S922.doc */
239 U8 t2; /*< 2: 1> N26; named n26 in S922.doc */
240 U8 _align0; /*< 3: 1> alignment */
241 } T_start_time;
242 #endif
243
244 #ifndef __T_starting_time__
245 #define __T_starting_time__
246 /*
247 * starting time
248 * CCDGEN:WriteStruct_Count==2113
249 */
250 typedef struct
251 {
252 U8 start_time_present; /*< 0: 1> start time present */
253 U8 _align0; /*< 1: 1> alignment */
254 U8 _align1; /*< 2: 1> alignment */
255 U8 _align2; /*< 3: 1> alignment */
256 T_start_time start_time; /*< 4: 4> starting time */
257 } T_starting_time;
258 #endif
259
260 #ifndef __T_new_ciph_param__
261 #define __T_new_ciph_param__
262 /*
263 * Cipher Key Kc
264 * CCDGEN:WriteStruct_Count==2114
265 */
266 typedef struct
267 {
268 U8 A[8]; /*< 0: 8> Kc values */
269 } T_new_ciph_param;
270 #endif
271
272 /*
273 * encryption key
274 * CCDGEN:WriteStruct_Count==2115
275 */
276 #ifndef __T_cipher_key__
277 #define __T_cipher_key__
278 typedef T_new_ciph_param T_cipher_key;
279 #endif
280 #ifndef __T_cell_description__
281 #define __T_cell_description__
282 /*
283 * cell description
284 * CCDGEN:WriteStruct_Count==2116
285 */
286 typedef struct
287 {
288 U8 ncc; /*< 0: 1> national colour code */
289 U8 bcc; /*< 1: 1> base station colour code */
290 U16 bcch_carrier; /*< 2: 2> BCCH carrier */
291 } T_cell_description;
292 #endif
293
294 #ifndef __T_handover_command__
295 #define __T_handover_command__
296 /*
297 * Handover Command
298 * CCDGEN:WriteStruct_Count==2117
299 */
300 typedef struct
301 {
302 T_cell_description cell_description; /*< 0: 4> cell description */
303 T_channel_desc_1 channel_desc_1; /*< 4: 12> channel description */
304 U8 channel_mode_1; /*< 16: 1> channel mode */
305 U8 _align0; /*< 17: 1> alignment */
306 U8 _align1; /*< 18: 1> alignment */
307 U8 _align2; /*< 19: 1> alignment */
308 T_starting_time starting_time; /*< 20: 8> starting time */
309 U8 ho_acc; /*< 28: 1> handover access */
310 U8 txpwr; /*< 29: 1> Indicates the power level which the mobile should use for transmission . */
311 U8 report_time_diff; /*< 30: 1> time difference */
312 U8 _align3; /*< 31: 1> alignment */
313 T_frequency_list frequency_list; /*< 32:132> frequency list */
314 T_channel_desc_2 channel_desc_2; /*<164: 12> channel description */
315 U8 channel_mode_2; /*<176: 1> channel mode */
316 U8 _align4; /*<177: 1> alignment */
317 U8 _align5; /*<178: 1> alignment */
318 U8 _align6; /*<179: 1> alignment */
319 T_frequency_list_bef_sti frequency_list_bef_sti; /*<180:132> frequency list before starting time */
320 T_channel_desc_1_bef_sti channel_desc_1_bef_sti; /*<312: 12> channel description before starting time */
321 T_channel_desc_2_bef_sti channel_desc_2_bef_sti; /*<324: 12> channel description before starting time */
322 U8 cipher_mode; /*<336: 1> cipher mode */
323 U8 a5_algorithm; /*<337: 1> A5 algorithm */
324 U8 _align7; /*<338: 1> alignment */
325 U8 _align8; /*<339: 1> alignment */
326 } T_handover_command;
327 #endif
328
329 #ifndef __T_res_list__
330 #define __T_res_list__
331 /*
332 * neighbour cell measurement results
333 * CCDGEN:WriteStruct_Count==2118
334 */
335 typedef struct
336 {
337 U16 bcch_freq; /*< 0: 2> channel number */
338 U16 rxlev_acc; /*< 2: 2> accumulated rx level */
339 U8 rxlev_nbr_meas; /*< 4: 1> nbr of rxlevel samples */
340 U8 _align0; /*< 5: 1> alignment */
341 U8 _align1; /*< 6: 1> alignment */
342 U8 _align2; /*< 7: 1> alignment */
343 } T_res_list;
344 #endif
345
346 #ifndef __T_ncell_meas__
347 #define __T_ncell_meas__
348 /*
349 * neighbour cell measurement results
350 * CCDGEN:WriteStruct_Count==2119
351 */
352 typedef struct
353 {
354 T_res_list res_list[BA_LIST_SIZE]; /*< 0:264> neighbour cell measurement results */
355 } T_ncell_meas;
356 #endif
357
358 #ifndef __T_chan_number__
359 #define __T_chan_number__
360 /*
361 * channel list
362 * CCDGEN:WriteStruct_Count==2120
363 */
364 typedef struct
365 {
366 U16 radio_freq[BCCH_LIST_SIZE]; /*< 0: 64> channel number */
367 } T_chan_number;
368 #endif
369
370 #ifndef __T_bcch_allocation__
371 #define __T_bcch_allocation__
372 /*
373 * BCCH allocation
374 * CCDGEN:WriteStruct_Count==2121
375 */
376 typedef struct
377 {
378 U16 rf_chan_cnt; /*< 0: 2> number of channels in the mobile allocation list or number of bcch in the list */
379 U8 _align0; /*< 2: 1> alignment */
380 U8 _align1; /*< 3: 1> alignment */
381 T_chan_number chan_number; /*< 4: 64> channel list */
382 } T_bcch_allocation;
383 #endif
384
385 #ifndef __T_amr_configuration__
386 #define __T_amr_configuration__
387 /*
388 * Parameters for AMR
389 * CCDGEN:WriteStruct_Count==2122
390 */
391 typedef struct
392 {
393 U8 noise_suppression_control_bit; /*< 0: 1> noise suppression control bit */
394 U8 initial_codec_mode_indicator; /*< 1: 1> initial code mode indicator */
395 U8 initial_codec_mode; /*< 2: 1> initial code mode */
396 U8 active_codec_set; /*< 3: 1> active codec set */
397 U8 threshold[3]; /*< 4: 3> threshold */
398 U8 hysteresis[3]; /*< 7: 3> hysteresis */
399 U8 _align0; /*< 10: 1> alignment */
400 U8 _align1; /*< 11: 1> alignment */
401 } T_amr_configuration;
402 #endif
403
404 #ifndef __T_ncell_list__
405 #define __T_ncell_list__
406 /*
407 * Parameters of a neighbour cell
408 * CCDGEN:WriteStruct_Count==2123
409 */
410 typedef struct
411 {
412 U16 radio_freq; /*< 0: 2> channel number */
413 U8 _align0; /*< 2: 1> alignment */
414 U8 _align1; /*< 3: 1> alignment */
415 U32 fn_offset; /*< 4: 4> frame offset */
416 U32 time_alignment; /*< 8: 4> Difference in quarter bits between the first bit in a frame of the serving cell and the first bit in the next frame of the non-serving cell. Validity of time_alignment dependent upon timing_validity indication. (0 - 4999) */
417 U8 timing_validity; /*< 12: 1> timing validity */
418 U8 _align2; /*< 13: 1> alignment */
419 U8 _align3; /*< 14: 1> alignment */
420 U8 _align4; /*< 15: 1> alignment */
421 } T_ncell_list;
422 #endif
423
424
425 // STRUCT-FF: !TI_DUAL_MODE
426 #ifndef __T_RADIO_FRAME__
427 #define __T_RADIO_FRAME__
428 /*
429 * Layer 2 frame
430 * CCDGEN:WriteStruct_Count==2124
431 */
432 typedef struct
433 {
434 U8 A[MAX_L2_FRAME_SIZE]; /*< 0: 23> frame content */
435 U8 _align0; /*< 23: 1> alignment */
436 } T_RADIO_FRAME;
437 #endif
438
439
440 /*
441 * End of substructure section, begin of primitive definition section
442 */
443
444 #ifndef __T_MPHC_NETWORK_SYNC_REQ__
445 #define __T_MPHC_NETWORK_SYNC_REQ__
446 /*
447 *
448 * CCDGEN:WriteStruct_Count==2125
449 */
450 typedef struct
451 {
452 U16 radio_freq; /*< 0: 2> channel number */
453 U8 _align0; /*< 2: 1> alignment */
454 U8 _align1; /*< 3: 1> alignment */
455 U32 fn_offset; /*< 4: 4> frame offset */
456 U32 time_alignment; /*< 8: 4> Difference in quarter bits between the first bit in a frame of the serving cell and the first bit in the next frame of the non-serving cell. Validity of time_alignment dependent upon timing_validity indication. (0 - 4999) */
457 U8 timing_validity; /*< 12: 1> timing validity */
458 U8 search_mode; /*< 13: 1> search mode */
459 U8 _align2; /*< 14: 1> alignment */
460 U8 _align3; /*< 15: 1> alignment */
461 } T_MPHC_NETWORK_SYNC_REQ;
462 #endif
463
464 #ifndef __T_MPHC_NETWORK_SYNC_IND__
465 #define __T_MPHC_NETWORK_SYNC_IND__
466 /*
467 *
468 * CCDGEN:WriteStruct_Count==2126
469 */
470 typedef struct
471 {
472 U16 radio_freq; /*< 0: 2> channel number */
473 U8 sb_flag; /*< 2: 1> Flag indicating whether synchronisation channel was read correctly or not */
474 U8 _align0; /*< 3: 1> alignment */
475 U32 fn_offset; /*< 4: 4> frame offset */
476 U32 time_alignment; /*< 8: 4> Difference in quarter bits between the first bit in a frame of the serving cell and the first bit in the next frame of the non-serving cell. Validity of time_alignment dependent upon timing_validity indication. (0 - 4999) */
477 U8 bsic; /*< 12: 1> base station identification code */
478 U8 _align1; /*< 13: 1> alignment */
479 U8 _align2; /*< 14: 1> alignment */
480 U8 _align3; /*< 15: 1> alignment */
481 } T_MPHC_NETWORK_SYNC_IND;
482 #endif
483
484 #ifndef __T_MPHC_STOP_NETWORK_SYNC_REQ__
485 #define __T_MPHC_STOP_NETWORK_SYNC_REQ__
486 /*
487 *
488 * CCDGEN:WriteStruct_Count==2127
489 */
490 typedef struct
491 {
492 U8 param; /*< 0: 1> dummy parameter */
493 U8 _align0; /*< 1: 1> alignment */
494 U8 _align1; /*< 2: 1> alignment */
495 U8 _align2; /*< 3: 1> alignment */
496 } T_MPHC_STOP_NETWORK_SYNC_REQ;
497 #endif
498
499 #ifndef __T_MPHC_STOP_NETWORK_SYNC_CON__
500 #define __T_MPHC_STOP_NETWORK_SYNC_CON__
501 /*
502 *
503 * CCDGEN:WriteStruct_Count==2128
504 */
505 typedef struct
506 {
507 U8 param; /*< 0: 1> dummy parameter */
508 U8 _align0; /*< 1: 1> alignment */
509 U8 _align1; /*< 2: 1> alignment */
510 U8 _align2; /*< 3: 1> alignment */
511 } T_MPHC_STOP_NETWORK_SYNC_CON;
512 #endif
513
514 #ifndef __T_MPHC_START_CCCH_REQ__
515 #define __T_MPHC_START_CCCH_REQ__
516 /*
517 *
518 * CCDGEN:WriteStruct_Count==2129
519 */
520 typedef struct
521 {
522 U8 bs_pa_mfrms; /*< 0: 1> Multiframe Period */
523 U8 bs_ag_blks_res; /*< 1: 1> Blocks reserved for AGCH */
524 U8 bcch_combined; /*< 2: 1> combined BCCH flag */
525 U8 ccch_group; /*< 3: 1> CCCH group */
526 U8 page_group; /*< 4: 1> paging group */
527 U8 page_block_index; /*< 5: 1> page block index */
528 U8 page_mode; /*< 6: 1> paging mode */
529 U8 _align0; /*< 7: 1> alignment */
530 } T_MPHC_START_CCCH_REQ;
531 #endif
532
533 #ifndef __T_MPHC_STOP_CCCH_REQ__
534 #define __T_MPHC_STOP_CCCH_REQ__
535 /*
536 *
537 * CCDGEN:WriteStruct_Count==2130
538 */
539 typedef struct
540 {
541 U8 param; /*< 0: 1> dummy parameter */
542 U8 _align0; /*< 1: 1> alignment */
543 U8 _align1; /*< 2: 1> alignment */
544 U8 _align2; /*< 3: 1> alignment */
545 } T_MPHC_STOP_CCCH_REQ;
546 #endif
547
548 #ifndef __T_MPHC_STOP_CCCH_CON__
549 #define __T_MPHC_STOP_CCCH_CON__
550 /*
551 *
552 * CCDGEN:WriteStruct_Count==2131
553 */
554 typedef struct
555 {
556 U8 param; /*< 0: 1> dummy parameter */
557 U8 _align0; /*< 1: 1> alignment */
558 U8 _align1; /*< 2: 1> alignment */
559 U8 _align2; /*< 3: 1> alignment */
560 } T_MPHC_STOP_CCCH_CON;
561 #endif
562
563 #ifndef __T_MPHC_SCELL_NBCCH_REQ__
564 #define __T_MPHC_SCELL_NBCCH_REQ__
565 /*
566 *
567 * CCDGEN:WriteStruct_Count==2132
568 */
569 typedef struct
570 {
571 U8 schedule_array_size; /*< 0: 1> number of channel numbers */
572 U8 _align0; /*< 1: 1> alignment */
573 U8 _align1; /*< 2: 1> alignment */
574 U8 _align2; /*< 3: 1> alignment */
575 T_schedule_array schedule_array[MAX_SCHED_SIZE]; /*< 4: 40> positional info */
576 } T_MPHC_SCELL_NBCCH_REQ;
577 #endif
578
579 #ifndef __T_MPHC_SCELL_EBCCH_REQ__
580 #define __T_MPHC_SCELL_EBCCH_REQ__
581 /*
582 *
583 * CCDGEN:WriteStruct_Count==2133
584 */
585 typedef struct
586 {
587 U8 schedule_array_size; /*< 0: 1> number of channel numbers */
588 U8 _align0; /*< 1: 1> alignment */
589 U8 _align1; /*< 2: 1> alignment */
590 U8 _align2; /*< 3: 1> alignment */
591 T_schedule_array schedule_array[MAX_SCHED_SIZE]; /*< 4: 40> positional info */
592 } T_MPHC_SCELL_EBCCH_REQ;
593 #endif
594
595 #ifndef __T_MPHC_STOP_SCELL_BCCH_REQ__
596 #define __T_MPHC_STOP_SCELL_BCCH_REQ__
597 /*
598 *
599 * CCDGEN:WriteStruct_Count==2134
600 */
601 typedef struct
602 {
603 U8 param; /*< 0: 1> dummy parameter */
604 U8 _align0; /*< 1: 1> alignment */
605 U8 _align1; /*< 2: 1> alignment */
606 U8 _align2; /*< 3: 1> alignment */
607 } T_MPHC_STOP_SCELL_BCCH_REQ;
608 #endif
609
610 #ifndef __T_MPHC_STOP_SCELL_BCCH_CON__
611 #define __T_MPHC_STOP_SCELL_BCCH_CON__
612 /*
613 *
614 * CCDGEN:WriteStruct_Count==2135
615 */
616 typedef struct
617 {
618 U8 param; /*< 0: 1> dummy parameter */
619 U8 _align0; /*< 1: 1> alignment */
620 U8 _align1; /*< 2: 1> alignment */
621 U8 _align2; /*< 3: 1> alignment */
622 } T_MPHC_STOP_SCELL_BCCH_CON;
623 #endif
624
625 #ifndef __T_MPHC_DATA_IND__
626 #define __T_MPHC_DATA_IND__
627 /*
628 *
629 * CCDGEN:WriteStruct_Count==2136
630 */
631 typedef struct
632 {
633 U16 radio_freq; /*< 0: 2> channel number */
634 U8 l2_channel; /*< 2: 1> layer 2 channel type */
635 U8 error_flag; /*< 3: 1> error cause */
636 T_l2_frame l2_frame; /*< 4: 24> layer 2 frame */
637 U8 tc; /*< 28: 1> multiframe number modulo 8 */
638 U8 ccch_lev; /*< 29: 1> Power strength level */
639 U8 _align0; /*< 30: 1> alignment */
640 U8 _align1; /*< 31: 1> alignment */
641 U32 fn; /*< 32: 4> frame number */
642 } T_MPHC_DATA_IND;
643 #endif
644
645 #ifndef __T_MPHC_NCELL_SYNC_REQ__
646 #define __T_MPHC_NCELL_SYNC_REQ__
647 /*
648 *
649 * CCDGEN:WriteStruct_Count==2137
650 */
651 typedef struct
652 {
653 U16 radio_freq; /*< 0: 2> channel number */
654 U8 _align0; /*< 2: 1> alignment */
655 U8 _align1; /*< 3: 1> alignment */
656 U32 fn_offset; /*< 4: 4> frame offset */
657 U32 time_alignment; /*< 8: 4> Difference in quarter bits between the first bit in a frame of the serving cell and the first bit in the next frame of the non-serving cell. Validity of time_alignment dependent upon timing_validity indication. (0 - 4999) */
658 U8 timing_validity; /*< 12: 1> timing validity */
659 U8 _align2; /*< 13: 1> alignment */
660 U8 _align3; /*< 14: 1> alignment */
661 U8 _align4; /*< 15: 1> alignment */
662 } T_MPHC_NCELL_SYNC_REQ;
663 #endif
664
665 #ifndef __T_MPHC_NCELL_LIST_SYNC_REQ__
666 #define __T_MPHC_NCELL_LIST_SYNC_REQ__
667 /*
668 *
669 * CCDGEN:WriteStruct_Count==2138
670 */
671 typedef struct
672 {
673 U8 eotd; /*< 0: 1> EOTD or neighbour cell monitoring */
674 U8 list_size; /*< 1: 1> 1 up to 12 neighbour cells */
675 U8 _align0; /*< 2: 1> alignment */
676 U8 _align1; /*< 3: 1> alignment */
677 T_ncell_list ncell_list[MAX_NCELL_EOTD_L1]; /*< 4:192> Parameters of a neighbour cell */
678 } T_MPHC_NCELL_LIST_SYNC_REQ;
679 #endif
680
681 #ifndef __T_MPHC_NCELL_SYNC_IND__
682 #define __T_MPHC_NCELL_SYNC_IND__
683 /*
684 *
685 * CCDGEN:WriteStruct_Count==2139
686 */
687 typedef struct
688 {
689 U16 radio_freq; /*< 0: 2> channel number */
690 U8 sb_flag; /*< 2: 1> Flag indicating whether synchronisation channel was read correctly or not */
691 U8 _align0; /*< 3: 1> alignment */
692 U32 fn_offset; /*< 4: 4> frame offset */
693 U32 time_alignment; /*< 8: 4> Difference in quarter bits between the first bit in a frame of the serving cell and the first bit in the next frame of the non-serving cell. Validity of time_alignment dependent upon timing_validity indication. (0 - 4999) */
694 U8 bsic; /*< 12: 1> base station identification code */
695 U8 neigh_id; /*< 13: 1> reserved */
696 U8 attempt; /*< 14: 1> reserved */
697 U8 _align1; /*< 15: 1> alignment */
698 U32 pm; /*< 16: 4> reserved */
699 U32 toa; /*< 20: 4> reserved */
700 U32 angle; /*< 24: 4> reserved */
701 U32 snr; /*< 28: 4> reserved */
702 U8 eodt_data_valid; /*< 32: 1> EOTD data present */
703 U8 mode; /*< 33: 1> idle or dedicated mode */
704 S16 d_eotd_first; /*< 34: 2> Delay to first correlation */
705 S16 d_eotd_max; /*< 36: 2> Delay to maximum correlation */
706 U8 _align2; /*< 38: 1> alignment */
707 U8 _align3; /*< 39: 1> alignment */
708 U32 d_eotd_nrj; /*< 40: 4> sum of amplitudes */
709 S16 a_eotd_crosscor[18]; /*< 44: 36> Cross correlation */
710 U32 time_tag; /*< 80: 4> Time tag */
711 U32 fn_sb_neigh; /*< 84: 4> reserved */
712 U32 fn_in_sb; /*< 88: 4> reserved */
713 U32 toa_correction; /*< 92: 4> reserved */
714 U32 delta_fn; /*< 96: 4> reserved */
715 U32 delta_qbit; /*<100: 4> reserved */
716 } T_MPHC_NCELL_SYNC_IND;
717 #endif
718
719 #ifndef __T_MPHC_STOP_NCELL_SYNC_REQ__
720 #define __T_MPHC_STOP_NCELL_SYNC_REQ__
721 /*
722 *
723 * CCDGEN:WriteStruct_Count==2140
724 */
725 typedef struct
726 {
727 U8 radio_freq_array_size; /*< 0: 1> Number of entries in the radio_freq_array within a stop request. When 6 (maximum number of requests to be served in parallel) are provided the message is interpreted as a complete process stop request. */
728 U8 _align0; /*< 1: 1> alignment */
729 U16 radio_freq_array[MAX_NCELL_EOTD_L1]; /*< 2: 24> channel list */
730 U8 _align1; /*< 26: 1> alignment */
731 U8 _align2; /*< 27: 1> alignment */
732 } T_MPHC_STOP_NCELL_SYNC_REQ;
733 #endif
734
735 #ifndef __T_MPHC_STOP_NCELL_SYNC_CON__
736 #define __T_MPHC_STOP_NCELL_SYNC_CON__
737 /*
738 *
739 * CCDGEN:WriteStruct_Count==2141
740 */
741 typedef struct
742 {
743 U8 param; /*< 0: 1> dummy parameter */
744 U8 _align0; /*< 1: 1> alignment */
745 U8 _align1; /*< 2: 1> alignment */
746 U8 _align2; /*< 3: 1> alignment */
747 } T_MPHC_STOP_NCELL_SYNC_CON;
748 #endif
749
750 #ifndef __T_MPHC_NCELL_BCCH_REQ__
751 #define __T_MPHC_NCELL_BCCH_REQ__
752 /*
753 *
754 * CCDGEN:WriteStruct_Count==2142
755 */
756 typedef struct
757 {
758 U16 radio_freq; /*< 0: 2> channel number */
759 U8 _align0; /*< 2: 1> alignment */
760 U8 _align1; /*< 3: 1> alignment */
761 U32 fn_offset; /*< 4: 4> frame offset */
762 U32 time_alignment; /*< 8: 4> Difference in quarter bits between the first bit in a frame of the serving cell and the first bit in the next frame of the non-serving cell. Validity of time_alignment dependent upon timing_validity indication. (0 - 4999) */
763 U8 tsc; /*< 12: 1> training sequence code */
764 U8 _align2; /*< 13: 1> alignment */
765 U16 bcch_blocks_required; /*< 14: 2> sys info bitmap */
766 U8 gprs_prio; /*< 16: 1> Gprs priority */
767 U8 _align3; /*< 17: 1> alignment */
768 U8 _align4; /*< 18: 1> alignment */
769 U8 _align5; /*< 19: 1> alignment */
770 } T_MPHC_NCELL_BCCH_REQ;
771 #endif
772
773 #ifndef __T_MPHC_NCELL_BCCH_IND__
774 #define __T_MPHC_NCELL_BCCH_IND__
775 /*
776 *
777 * CCDGEN:WriteStruct_Count==2143
778 */
779 typedef struct
780 {
781 U16 radio_freq; /*< 0: 2> channel number */
782 U8 l2_channel; /*< 2: 1> layer 2 channel type */
783 U8 error_flag; /*< 3: 1> error cause */
784 T_l2_frame l2_frame; /*< 4: 24> layer 2 frame */
785 U8 tc; /*< 28: 1> multiframe number modulo 8 */
786 U8 _align0; /*< 29: 1> alignment */
787 U8 _align1; /*< 30: 1> alignment */
788 U8 _align2; /*< 31: 1> alignment */
789 U32 fn; /*< 32: 4> frame number */
790 } T_MPHC_NCELL_BCCH_IND;
791 #endif
792
793 #ifndef __T_MPHC_STOP_NCELL_BCCH_REQ__
794 #define __T_MPHC_STOP_NCELL_BCCH_REQ__
795 /*
796 *
797 * CCDGEN:WriteStruct_Count==2144
798 */
799 typedef struct
800 {
801 U8 radio_freq_array_size; /*< 0: 1> Number of entries in the radio_freq_array within a stop request. When 6 (maximum number of requests to be served in parallel) are provided the message is interpreted as a complete process stop request. */
802 U8 _align0; /*< 1: 1> alignment */
803 U16 radio_freq_array[6]; /*< 2: 12> channel list */
804 U8 _align1; /*< 14: 1> alignment */
805 U8 _align2; /*< 15: 1> alignment */
806 } T_MPHC_STOP_NCELL_BCCH_REQ;
807 #endif
808
809 #ifndef __T_MPHC_STOP_NCELL_BCCH_CON__
810 #define __T_MPHC_STOP_NCELL_BCCH_CON__
811 /*
812 *
813 * CCDGEN:WriteStruct_Count==2145
814 */
815 typedef struct
816 {
817 U8 param; /*< 0: 1> dummy parameter */
818 U8 _align0; /*< 1: 1> alignment */
819 U8 _align1; /*< 2: 1> alignment */
820 U8 _align2; /*< 3: 1> alignment */
821 } T_MPHC_STOP_NCELL_BCCH_CON;
822 #endif
823
824 #ifndef __T_MPHC_RXLEV_PERIODIC_REQ__
825 #define __T_MPHC_RXLEV_PERIODIC_REQ__
826 /*
827 *
828 * CCDGEN:WriteStruct_Count==2146
829 */
830 typedef struct
831 {
832 T_chan_list chan_list; /*< 0: 68> channel list */
833 U8 num_of_chans; /*< 68: 1> Number of valid carrier numbers contained in the BA list (chan_number) array (1 to 33) */
834 U8 ba_id; /*< 69: 1> band allocation identification */
835 U8 next_radio_freq_measured; /*< 70: 1> channel index */
836 U8 _align0; /*< 71: 1> alignment */
837 } T_MPHC_RXLEV_PERIODIC_REQ;
838 #endif
839
840 #ifndef __T_MPHC_RXLEV_PERIODIC_IND__
841 #define __T_MPHC_RXLEV_PERIODIC_IND__
842 /*
843 *
844 * CCDGEN:WriteStruct_Count==2147
845 */
846 typedef struct
847 {
848 T_result result[MAX_MEAS_VALUES]; /*< 0: 32> measurement results */
849 U8 nbr_of_carriers; /*< 32: 1> The number of cell carriers measured during the PCH block */
850 U8 s_rxlev; /*< 33: 1> The serving cell received power level (average of the 4 PCH bursts read during the particular PCH block). */
851 U8 ba_id; /*< 34: 1> band allocation identification */
852 U8 _align0; /*< 35: 1> alignment */
853 } T_MPHC_RXLEV_PERIODIC_IND;
854 #endif
855
856 #ifndef __T_MPHC_STOP_RXLEV_PERIODIC_REQ__
857 #define __T_MPHC_STOP_RXLEV_PERIODIC_REQ__
858 /*
859 *
860 * CCDGEN:WriteStruct_Count==2148
861 */
862 typedef struct
863 {
864 U8 param; /*< 0: 1> dummy parameter */
865 U8 _align0; /*< 1: 1> alignment */
866 U8 _align1; /*< 2: 1> alignment */
867 U8 _align2; /*< 3: 1> alignment */
868 } T_MPHC_STOP_RXLEV_PERIODIC_REQ;
869 #endif
870
871 #ifndef __T_MPHC_STOP_RXLEV_PERIODIC_CON__
872 #define __T_MPHC_STOP_RXLEV_PERIODIC_CON__
873 /*
874 *
875 * CCDGEN:WriteStruct_Count==2149
876 */
877 typedef struct
878 {
879 U8 param; /*< 0: 1> dummy parameter */
880 U8 _align0; /*< 1: 1> alignment */
881 U8 _align1; /*< 2: 1> alignment */
882 U8 _align2; /*< 3: 1> alignment */
883 } T_MPHC_STOP_RXLEV_PERIODIC_CON;
884 #endif
885
886 #ifndef __T_MPHC_RXLEV_REQ__
887 #define __T_MPHC_RXLEV_REQ__
888 /*
889 *
890 * CCDGEN:WriteStruct_Count==2150
891 */
892 typedef struct
893 {
894 U32 shared_ptr; /*< 0: 4> Pointer */
895 } T_MPHC_RXLEV_REQ;
896 #endif
897
898 #ifndef __T_MPHC_RXLEV_IND__
899 #define __T_MPHC_RXLEV_IND__
900 /*
901 *
902 * CCDGEN:WriteStruct_Count==2151
903 */
904 typedef struct
905 {
906 U32 shared_ptr; /*< 0: 4> Pointer */
907 } T_MPHC_RXLEV_IND;
908 #endif
909
910 #ifndef __T_MPHC_STOP_RXLEV_REQ__
911 #define __T_MPHC_STOP_RXLEV_REQ__
912 /*
913 *
914 * CCDGEN:WriteStruct_Count==2152
915 */
916 typedef struct
917 {
918 U8 param; /*< 0: 1> dummy parameter */
919 U8 _align0; /*< 1: 1> alignment */
920 U8 _align1; /*< 2: 1> alignment */
921 U8 _align2; /*< 3: 1> alignment */
922 } T_MPHC_STOP_RXLEV_REQ;
923 #endif
924
925 #ifndef __T_MPHC_STOP_RXLEV_CON__
926 #define __T_MPHC_STOP_RXLEV_CON__
927 /*
928 *
929 * CCDGEN:WriteStruct_Count==2153
930 */
931 typedef struct
932 {
933 U8 param; /*< 0: 1> dummy parameter */
934 U8 _align0; /*< 1: 1> alignment */
935 U8 _align1; /*< 2: 1> alignment */
936 U8 _align2; /*< 3: 1> alignment */
937 } T_MPHC_STOP_RXLEV_CON;
938 #endif
939
940 #ifndef __T_MPHC_CONFIG_CBCH_REQ__
941 #define __T_MPHC_CONFIG_CBCH_REQ__
942 /*
943 *
944 * CCDGEN:WriteStruct_Count==2154
945 */
946 typedef struct
947 {
948 T_cbch_desc cbch_desc; /*< 0: 12> CBCH channel description */
949 T_cbch_freq_list cbch_freq_list; /*< 12:132> CBCH frequency list */
950 } T_MPHC_CONFIG_CBCH_REQ;
951 #endif
952
953 #ifndef __T_MPHC_CBCH_SCHEDULE_REQ__
954 #define __T_MPHC_CBCH_SCHEDULE_REQ__
955 /*
956 *
957 * CCDGEN:WriteStruct_Count==2155
958 */
959 typedef struct
960 {
961 U8 cbch_select; /*< 0: 1> which cbch channel to read */
962 U8 schedule_length; /*< 1: 1> length of schedule period */
963 U8 _align0; /*< 2: 1> alignment */
964 U8 _align1; /*< 3: 1> alignment */
965 U32 first_blocks_0; /*< 4: 4> Bitmap defining a set of blocks to be read during the schedule period. The bits represent the blocks as follows: bit MSB=31 -> block=32; bit LSB=0 -> block=1. */
966 U16 first_blocks_1; /*< 8: 2> Bitmap defining a set of blocks to be read during the schedule period. The bits represent the blocks as follows: bit MSB=15 -> block=48; bit LSB=0 -> block=33. */
967 U8 _align2; /*< 10: 1> alignment */
968 U8 _align3; /*< 11: 1> alignment */
969 } T_MPHC_CBCH_SCHEDULE_REQ;
970 #endif
971
972 #ifndef __T_MPHC_CBCH_INFO_REQ__
973 #define __T_MPHC_CBCH_INFO_REQ__
974 /*
975 *
976 * CCDGEN:WriteStruct_Count==2156
977 */
978 typedef struct
979 {
980 U8 tb_bitmap; /*< 0: 1> blocks to read */
981 U8 _align0; /*< 1: 1> alignment */
982 U8 _align1; /*< 2: 1> alignment */
983 U8 _align2; /*< 3: 1> alignment */
984 } T_MPHC_CBCH_INFO_REQ;
985 #endif
986
987 #ifndef __T_MPHC_CBCH_UPDATE_REQ__
988 #define __T_MPHC_CBCH_UPDATE_REQ__
989 /*
990 *
991 * CCDGEN:WriteStruct_Count==2157
992 */
993 typedef struct
994 {
995 U8 cbch_select; /*< 0: 1> which cbch channel to read */
996 U8 _align0; /*< 1: 1> alignment */
997 U8 _align1; /*< 2: 1> alignment */
998 U8 _align2; /*< 3: 1> alignment */
999 U32 first_blocks_0; /*< 4: 4> Bitmap defining a set of blocks to be read during the schedule period. The bits represent the blocks as follows: bit MSB=31 -> block=32; bit LSB=0 -> block=1. */
1000 U16 first_blocks_1; /*< 8: 2> Bitmap defining a set of blocks to be read during the schedule period. The bits represent the blocks as follows: bit MSB=15 -> block=48; bit LSB=0 -> block=33. */
1001 U8 _align3; /*< 10: 1> alignment */
1002 U8 _align4; /*< 11: 1> alignment */
1003 } T_MPHC_CBCH_UPDATE_REQ;
1004 #endif
1005
1006 #ifndef __T_MPHC_STOP_CBCH_REQ__
1007 #define __T_MPHC_STOP_CBCH_REQ__
1008 /*
1009 *
1010 * CCDGEN:WriteStruct_Count==2158
1011 */
1012 typedef struct
1013 {
1014 U8 normal_cbch; /*< 0: 1> normal cbch */
1015 U8 extended_cbch; /*< 1: 1> extended cbch */
1016 U8 _align0; /*< 2: 1> alignment */
1017 U8 _align1; /*< 3: 1> alignment */
1018 } T_MPHC_STOP_CBCH_REQ;
1019 #endif
1020
1021 #ifndef __T_MPHC_STOP_CBCH_CON__
1022 #define __T_MPHC_STOP_CBCH_CON__
1023 /*
1024 *
1025 * CCDGEN:WriteStruct_Count==2159
1026 */
1027 typedef struct
1028 {
1029 U8 param; /*< 0: 1> dummy parameter */
1030 U8 _align0; /*< 1: 1> alignment */
1031 U8 _align1; /*< 2: 1> alignment */
1032 U8 _align2; /*< 3: 1> alignment */
1033 } T_MPHC_STOP_CBCH_CON;
1034 #endif
1035
1036 #ifndef __T_MPHC_NEW_SCELL_REQ__
1037 #define __T_MPHC_NEW_SCELL_REQ__
1038 /*
1039 *
1040 * CCDGEN:WriteStruct_Count==2160
1041 */
1042 typedef struct
1043 {
1044 U16 radio_freq; /*< 0: 2> channel number */
1045 U8 _align0; /*< 2: 1> alignment */
1046 U8 _align1; /*< 3: 1> alignment */
1047 U32 fn_offset; /*< 4: 4> frame offset */
1048 U32 time_alignment; /*< 8: 4> Difference in quarter bits between the first bit in a frame of the serving cell and the first bit in the next frame of the non-serving cell. Validity of time_alignment dependent upon timing_validity indication. (0 - 4999) */
1049 U8 tsc; /*< 12: 1> training sequence code */
1050 U8 _align2; /*< 13: 1> alignment */
1051 U8 _align3; /*< 14: 1> alignment */
1052 U8 _align4; /*< 15: 1> alignment */
1053 } T_MPHC_NEW_SCELL_REQ;
1054 #endif
1055
1056 #ifndef __T_MPHC_NEW_SCELL_CON__
1057 #define __T_MPHC_NEW_SCELL_CON__
1058 /*
1059 *
1060 * CCDGEN:WriteStruct_Count==2161
1061 */
1062 typedef struct
1063 {
1064 U8 param; /*< 0: 1> dummy parameter */
1065 U8 _align0; /*< 1: 1> alignment */
1066 U8 _align1; /*< 2: 1> alignment */
1067 U8 _align2; /*< 3: 1> alignment */
1068 } T_MPHC_NEW_SCELL_CON;
1069 #endif
1070
1071 #ifndef __T_MPHC_RA_REQ__
1072 #define __T_MPHC_RA_REQ__
1073 /*
1074 *
1075 * CCDGEN:WriteStruct_Count==2162
1076 */
1077 typedef struct
1078 {
1079 U8 txpwr; /*< 0: 1> Indicates the power level which the mobile should use for transmission . */
1080 U8 rand; /*< 1: 1> TDMA frames before sending RACH burst */
1081 U8 channel_request; /*< 2: 1> content of channel request message */
1082 U8 powerclass_gsm; /*< 3: 1> GSM power class of the MS. */
1083 U8 powerclass_dcs; /*< 4: 1> DCS power class of the MS. */
1084 U8 _align0; /*< 5: 1> alignment */
1085 U8 _align1; /*< 6: 1> alignment */
1086 U8 _align2; /*< 7: 1> alignment */
1087 } T_MPHC_RA_REQ;
1088 #endif
1089
1090 #ifndef __T_MPHC_RA_CON__
1091 #define __T_MPHC_RA_CON__
1092 /*
1093 *
1094 * CCDGEN:WriteStruct_Count==2163
1095 */
1096 typedef struct
1097 {
1098 U32 fn; /*< 0: 4> frame number */
1099 U8 channel_request; /*< 4: 1> content of channel request message */
1100 U8 _align0; /*< 5: 1> alignment */
1101 U8 _align1; /*< 6: 1> alignment */
1102 U8 _align2; /*< 7: 1> alignment */
1103 } T_MPHC_RA_CON;
1104 #endif
1105
1106 #ifndef __T_MPHC_STOP_RA_REQ__
1107 #define __T_MPHC_STOP_RA_REQ__
1108 /*
1109 *
1110 * CCDGEN:WriteStruct_Count==2164
1111 */
1112 typedef struct
1113 {
1114 U8 param; /*< 0: 1> dummy parameter */
1115 U8 _align0; /*< 1: 1> alignment */
1116 U8 _align1; /*< 2: 1> alignment */
1117 U8 _align2; /*< 3: 1> alignment */
1118 } T_MPHC_STOP_RA_REQ;
1119 #endif
1120
1121 #ifndef __T_MPHC_STOP_RA_CON__
1122 #define __T_MPHC_STOP_RA_CON__
1123 /*
1124 *
1125 * CCDGEN:WriteStruct_Count==2165
1126 */
1127 typedef struct
1128 {
1129 U8 param; /*< 0: 1> dummy parameter */
1130 U8 _align0; /*< 1: 1> alignment */
1131 U8 _align1; /*< 2: 1> alignment */
1132 U8 _align2; /*< 3: 1> alignment */
1133 } T_MPHC_STOP_RA_CON;
1134 #endif
1135
1136 #ifndef __T_MPHC_IMMED_ASSIGN_REQ__
1137 #define __T_MPHC_IMMED_ASSIGN_REQ__
1138 /*
1139 *
1140 * CCDGEN:WriteStruct_Count==2166
1141 */
1142 typedef struct
1143 {
1144 T_channel_desc channel_desc; /*< 0: 12> channel description */
1145 U8 timing_advance; /*< 12: 1> timing advance */
1146 U8 _align0; /*< 13: 1> alignment */
1147 U8 _align1; /*< 14: 1> alignment */
1148 U8 _align2; /*< 15: 1> alignment */
1149 T_frequency_list frequency_list; /*< 16:132> frequency list */
1150 T_starting_time starting_time; /*<148: 8> starting time */
1151 T_frequency_list_bef_sti frequency_list_bef_sti; /*<156:132> frequency list before starting time */
1152 U8 maio_bef_sti; /*<288: 1> MAIO used before starting time */
1153 U8 dtx_allowed; /*<289: 1> DTX allowed */
1154 U8 _align3; /*<290: 1> alignment */
1155 U8 _align4; /*<291: 1> alignment */
1156 T_bcch_allocation bcch_allocation; /*<292: 68> BCCH allocation */
1157 U8 ba_id; /*<360: 1> band allocation identification */
1158 U8 pwrc; /*<361: 1> power control indicator */
1159 U8 _align5; /*<362: 1> alignment */
1160 U8 _align6; /*<363: 1> alignment */
1161 } T_MPHC_IMMED_ASSIGN_REQ;
1162 #endif
1163
1164 #ifndef __T_MPHC_IMMED_ASSIGN_CON__
1165 #define __T_MPHC_IMMED_ASSIGN_CON__
1166 /*
1167 *
1168 * CCDGEN:WriteStruct_Count==2167
1169 */
1170 typedef struct
1171 {
1172 U8 param; /*< 0: 1> dummy parameter */
1173 U8 _align0; /*< 1: 1> alignment */
1174 U8 _align1; /*< 2: 1> alignment */
1175 U8 _align2; /*< 3: 1> alignment */
1176 } T_MPHC_IMMED_ASSIGN_CON;
1177 #endif
1178
1179 #ifndef __T_MPHC_CHANNEL_ASSIGN_REQ__
1180 #define __T_MPHC_CHANNEL_ASSIGN_REQ__
1181 /*
1182 *
1183 * CCDGEN:WriteStruct_Count==2168
1184 */
1185 typedef struct
1186 {
1187 T_channel_desc_1 channel_desc_1; /*< 0: 12> channel description */
1188 U8 channel_mode_1; /*< 12: 1> channel mode */
1189 U8 txpwr; /*< 13: 1> Indicates the power level which the mobile should use for transmission . */
1190 U8 _align0; /*< 14: 1> alignment */
1191 U8 _align1; /*< 15: 1> alignment */
1192 T_frequency_list frequency_list; /*< 16:132> frequency list */
1193 T_starting_time starting_time; /*<148: 8> starting time */
1194 T_channel_desc_2 channel_desc_2; /*<156: 12> channel description */
1195 U8 channel_mode_2; /*<168: 1> channel mode */
1196 U8 _align2; /*<169: 1> alignment */
1197 U8 _align3; /*<170: 1> alignment */
1198 U8 _align4; /*<171: 1> alignment */
1199 T_frequency_list_bef_sti frequency_list_bef_sti; /*<172:132> frequency list before starting time */
1200 T_channel_desc_1_bef_sti channel_desc_1_bef_sti; /*<304: 12> channel description before starting time */
1201 T_channel_desc_2_bef_sti channel_desc_2_bef_sti; /*<316: 12> channel description before starting time */
1202 U8 cipher_mode; /*<328: 1> cipher mode */
1203 U8 a5_algorithm; /*<329: 1> A5 algorithm */
1204 U8 _align5; /*<330: 1> alignment */
1205 U8 _align6; /*<331: 1> alignment */
1206 T_cipher_key cipher_key; /*<332: 8> encryption key */
1207 U8 dtx_allowed; /*<340: 1> DTX allowed */
1208 U8 _align7; /*<341: 1> alignment */
1209 U8 _align8; /*<342: 1> alignment */
1210 U8 _align9; /*<343: 1> alignment */
1211 T_amr_configuration amr_configuration; /*<344: 12> Parameters for AMR */
1212 } T_MPHC_CHANNEL_ASSIGN_REQ;
1213 #endif
1214
1215 #ifndef __T_MPHC_CHANNEL_ASSIGN_CON__
1216 #define __T_MPHC_CHANNEL_ASSIGN_CON__
1217 /*
1218 *
1219 * CCDGEN:WriteStruct_Count==2169
1220 */
1221 typedef struct
1222 {
1223 U8 param; /*< 0: 1> dummy parameter */
1224 U8 _align0; /*< 1: 1> alignment */
1225 U8 _align1; /*< 2: 1> alignment */
1226 U8 _align2; /*< 3: 1> alignment */
1227 } T_MPHC_CHANNEL_ASSIGN_CON;
1228 #endif
1229
1230 #ifndef __T_MPHC_ASYNC_HO_REQ__
1231 #define __T_MPHC_ASYNC_HO_REQ__
1232 /*
1233 *
1234 * CCDGEN:WriteStruct_Count==2170
1235 */
1236 typedef struct
1237 {
1238 T_handover_command handover_command; /*< 0:340> Handover Command */
1239 U32 fn_offset; /*<340: 4> frame offset */
1240 U32 time_alignmnt; /*<344: 4> Difference in quarter bits between serving and handover destination cell (0 to 5000) */
1241 T_cipher_key cipher_key; /*<348: 8> encryption key */
1242 T_amr_configuration amr_configuration; /*<356: 12> Parameters for AMR */
1243 } T_MPHC_ASYNC_HO_REQ;
1244 #endif
1245
1246 #ifndef __T_MPHC_ASYNC_HO_CON__
1247 #define __T_MPHC_ASYNC_HO_CON__
1248 /*
1249 *
1250 * CCDGEN:WriteStruct_Count==2171
1251 */
1252 typedef struct
1253 {
1254 U8 param; /*< 0: 1> dummy parameter */
1255 U8 _align0; /*< 1: 1> alignment */
1256 U8 _align1; /*< 2: 1> alignment */
1257 U8 _align2; /*< 3: 1> alignment */
1258 } T_MPHC_ASYNC_HO_CON;
1259 #endif
1260
1261 #ifndef __T_MPHC_HANDOVER_FINISHED__
1262 #define __T_MPHC_HANDOVER_FINISHED__
1263 /*
1264 *
1265 * CCDGEN:WriteStruct_Count==2172
1266 */
1267 typedef struct
1268 {
1269 U8 cause; /*< 0: 1> handover success */
1270 U8 _align0; /*< 1: 1> alignment */
1271 U8 _align1; /*< 2: 1> alignment */
1272 U8 _align2; /*< 3: 1> alignment */
1273 } T_MPHC_HANDOVER_FINISHED;
1274 #endif
1275
1276 #ifndef __T_MPHC_SYNC_HO_REQ__
1277 #define __T_MPHC_SYNC_HO_REQ__
1278 /*
1279 *
1280 * CCDGEN:WriteStruct_Count==2173
1281 */
1282 typedef struct
1283 {
1284 T_handover_command handover_command; /*< 0:340> Handover Command */
1285 U32 fn_offset; /*<340: 4> frame offset */
1286 U32 time_alignmnt; /*<344: 4> Difference in quarter bits between serving and handover destination cell (0 to 5000) */
1287 T_cipher_key cipher_key; /*<348: 8> encryption key */
1288 U8 nci; /*<356: 1> normal cell indication */
1289 U8 _align0; /*<357: 1> alignment */
1290 U8 _align1; /*<358: 1> alignment */
1291 U8 _align2; /*<359: 1> alignment */
1292 T_amr_configuration amr_configuration; /*<360: 12> Parameters for AMR */
1293 } T_MPHC_SYNC_HO_REQ;
1294 #endif
1295
1296 #ifndef __T_MPHC_SYNC_HO_CON__
1297 #define __T_MPHC_SYNC_HO_CON__
1298 /*
1299 *
1300 * CCDGEN:WriteStruct_Count==2174
1301 */
1302 typedef struct
1303 {
1304 U8 param; /*< 0: 1> dummy parameter */
1305 U8 _align0; /*< 1: 1> alignment */
1306 U8 _align1; /*< 2: 1> alignment */
1307 U8 _align2; /*< 3: 1> alignment */
1308 } T_MPHC_SYNC_HO_CON;
1309 #endif
1310
1311 #ifndef __T_MPHC_TA_FAIL_IND__
1312 #define __T_MPHC_TA_FAIL_IND__
1313 /*
1314 *
1315 * CCDGEN:WriteStruct_Count==2175
1316 */
1317 typedef struct
1318 {
1319 U8 param; /*< 0: 1> dummy parameter */
1320 U8 _align0; /*< 1: 1> alignment */
1321 U8 _align1; /*< 2: 1> alignment */
1322 U8 _align2; /*< 3: 1> alignment */
1323 } T_MPHC_TA_FAIL_IND;
1324 #endif
1325
1326 #ifndef __T_MPHC_PRE_SYNC_HO_REQ__
1327 #define __T_MPHC_PRE_SYNC_HO_REQ__
1328 /*
1329 *
1330 * CCDGEN:WriteStruct_Count==2176
1331 */
1332 typedef struct
1333 {
1334 T_handover_command handover_command; /*< 0:340> Handover Command */
1335 U32 fn_offset; /*<340: 4> frame offset */
1336 U32 time_alignmnt; /*<344: 4> Difference in quarter bits between serving and handover destination cell (0 to 5000) */
1337 T_cipher_key cipher_key; /*<348: 8> encryption key */
1338 U8 nci; /*<356: 1> normal cell indication */
1339 U8 timing_advance_valid; /*<357: 1> timing advance information valid flag */
1340 U8 timing_advance; /*<358: 1> timing advance */
1341 U8 _align0; /*<359: 1> alignment */
1342 T_amr_configuration amr_configuration; /*<360: 12> Parameters for AMR */
1343 } T_MPHC_PRE_SYNC_HO_REQ;
1344 #endif
1345
1346 #ifndef __T_MPHC_PRE_SYNC_HO_CON__
1347 #define __T_MPHC_PRE_SYNC_HO_CON__
1348 /*
1349 *
1350 * CCDGEN:WriteStruct_Count==2177
1351 */
1352 typedef struct
1353 {
1354 U8 param; /*< 0: 1> dummy parameter */
1355 U8 _align0; /*< 1: 1> alignment */
1356 U8 _align1; /*< 2: 1> alignment */
1357 U8 _align2; /*< 3: 1> alignment */
1358 } T_MPHC_PRE_SYNC_HO_CON;
1359 #endif
1360
1361 #ifndef __T_MPHC_HANDOVER_FAIL_REQ__
1362 #define __T_MPHC_HANDOVER_FAIL_REQ__
1363 /*
1364 *
1365 * CCDGEN:WriteStruct_Count==2178
1366 */
1367 typedef struct
1368 {
1369 U8 param; /*< 0: 1> dummy parameter */
1370 U8 _align0; /*< 1: 1> alignment */
1371 U8 _align1; /*< 2: 1> alignment */
1372 U8 _align2; /*< 3: 1> alignment */
1373 } T_MPHC_HANDOVER_FAIL_REQ;
1374 #endif
1375
1376 #ifndef __T_MPHC_HANDOVER_FAIL_CON__
1377 #define __T_MPHC_HANDOVER_FAIL_CON__
1378 /*
1379 *
1380 * CCDGEN:WriteStruct_Count==2179
1381 */
1382 typedef struct
1383 {
1384 U8 param; /*< 0: 1> dummy parameter */
1385 U8 _align0; /*< 1: 1> alignment */
1386 U8 _align1; /*< 2: 1> alignment */
1387 U8 _align2; /*< 3: 1> alignment */
1388 } T_MPHC_HANDOVER_FAIL_CON;
1389 #endif
1390
1391 #ifndef __T_MPHC_CHANGE_FREQUENCY__
1392 #define __T_MPHC_CHANGE_FREQUENCY__
1393 /*
1394 *
1395 * CCDGEN:WriteStruct_Count==2180
1396 */
1397 typedef struct
1398 {
1399 T_channel_desc channel_desc; /*< 0: 12> channel description */
1400 T_frequency_list frequency_list; /*< 12:132> frequency list */
1401 T_starting_time starting_time; /*<144: 8> starting time */
1402 } T_MPHC_CHANGE_FREQUENCY;
1403 #endif
1404
1405 #ifndef __T_MPHC_CHANGE_FREQUENCY_CON__
1406 #define __T_MPHC_CHANGE_FREQUENCY_CON__
1407 /*
1408 *
1409 * CCDGEN:WriteStruct_Count==2181
1410 */
1411 typedef struct
1412 {
1413 U8 param; /*< 0: 1> dummy parameter */
1414 U8 _align0; /*< 1: 1> alignment */
1415 U8 _align1; /*< 2: 1> alignment */
1416 U8 _align2; /*< 3: 1> alignment */
1417 } T_MPHC_CHANGE_FREQUENCY_CON;
1418 #endif
1419
1420 #ifndef __T_MPHC_CHANNEL_MODE_MODIFY_REQ__
1421 #define __T_MPHC_CHANNEL_MODE_MODIFY_REQ__
1422 /*
1423 *
1424 * CCDGEN:WriteStruct_Count==2182
1425 */
1426 typedef struct
1427 {
1428 U8 sub_channel; /*< 0: 1> sub channel */
1429 U8 channel_mode; /*< 1: 1> channel mode */
1430 U8 _align0; /*< 2: 1> alignment */
1431 U8 _align1; /*< 3: 1> alignment */
1432 T_amr_configuration amr_configuration; /*< 4: 12> Parameters for AMR */
1433 } T_MPHC_CHANNEL_MODE_MODIFY_REQ;
1434 #endif
1435
1436 #ifndef __T_MPHC_CHANNEL_MODE_MODIFY_CON__
1437 #define __T_MPHC_CHANNEL_MODE_MODIFY_CON__
1438 /*
1439 *
1440 * CCDGEN:WriteStruct_Count==2183
1441 */
1442 typedef struct
1443 {
1444 U8 param; /*< 0: 1> dummy parameter */
1445 U8 _align0; /*< 1: 1> alignment */
1446 U8 _align1; /*< 2: 1> alignment */
1447 U8 _align2; /*< 3: 1> alignment */
1448 } T_MPHC_CHANNEL_MODE_MODIFY_CON;
1449 #endif
1450
1451 #ifndef __T_MPHC_SET_CIPHERING_REQ__
1452 #define __T_MPHC_SET_CIPHERING_REQ__
1453 /*
1454 *
1455 * CCDGEN:WriteStruct_Count==2184
1456 */
1457 typedef struct
1458 {
1459 U8 cipher_mode; /*< 0: 1> cipher mode */
1460 U8 a5_algorithm; /*< 1: 1> A5 algorithm */
1461 U8 _align0; /*< 2: 1> alignment */
1462 U8 _align1; /*< 3: 1> alignment */
1463 T_new_ciph_param new_ciph_param; /*< 4: 8> Cipher Key Kc */
1464 } T_MPHC_SET_CIPHERING_REQ;
1465 #endif
1466
1467 #ifndef __T_MPHC_SET_CIPHERING_CON__
1468 #define __T_MPHC_SET_CIPHERING_CON__
1469 /*
1470 *
1471 * CCDGEN:WriteStruct_Count==2185
1472 */
1473 typedef struct
1474 {
1475 U8 param; /*< 0: 1> dummy parameter */
1476 U8 _align0; /*< 1: 1> alignment */
1477 U8 _align1; /*< 2: 1> alignment */
1478 U8 _align2; /*< 3: 1> alignment */
1479 } T_MPHC_SET_CIPHERING_CON;
1480 #endif
1481
1482 #ifndef __T_MPHC_MEAS_REPORT__
1483 #define __T_MPHC_MEAS_REPORT__
1484 /*
1485 *
1486 * CCDGEN:WriteStruct_Count==2186
1487 */
1488 typedef struct
1489 {
1490 U8 dtx_used; /*< 0: 1> DTX used flag */
1491 U8 meas_valid; /*< 1: 1> measurement valid flag */
1492 U16 rxlev_full_acc; /*< 2: 2> rxlevel full serving cell accumulated */
1493 U8 rxlev_full_nbr_meas; /*< 4: 1> number of rxlevel full serving cell samples */
1494 U8 _align0; /*< 5: 1> alignment */
1495 U16 rxlev_sub_acc; /*< 6: 2> rxlevel sub serving cell accumulated */
1496 U8 rxlev_sub_nbr_meas; /*< 8: 1> number of rxlevel sub serving cell samples */
1497 U8 _align1; /*< 9: 1> alignment */
1498 U16 rxqual_full_acc_errors; /*< 10: 2> rxqual full serving cell bit errors */
1499 U16 rxqual_full_nbr_bits; /*< 12: 2> number of examined bits for rxqual full serving cell */
1500 U16 rxqual_sub_acc_errors; /*< 14: 2> rxlevel sub serving cell bit errors */
1501 U16 rxqual_sub_nbr_bits; /*< 16: 2> number of examined bits for rxqual sub serving cell */
1502 U8 no_of_ncells_meas; /*< 18: 1> number of neighbour cell results */
1503 U8 _align2; /*< 19: 1> alignment */
1504 T_ncell_meas ncell_meas; /*< 20:264> neighbour cell measurement results */
1505 U8 ba_id; /*<284: 1> band allocation identification */
1506 U8 timing_advance; /*<285: 1> timing advance */
1507 U8 txpwr_used; /*<286: 1> TX power level currently used by L1 (For TEST MOBILE only). */
1508 U8 facch_dl_count; /*<287: 1> reserved */
1509 U8 facch_ul_count; /*<288: 1> reserved */
1510 U8 _align3; /*<289: 1> alignment */
1511 U8 _align4; /*<290: 1> alignment */
1512 U8 _align5; /*<291: 1> alignment */
1513 } T_MPHC_MEAS_REPORT;
1514 #endif
1515
1516 #ifndef __T_MPHC_UPDATE_BA_LIST__
1517 #define __T_MPHC_UPDATE_BA_LIST__
1518 /*
1519 *
1520 * CCDGEN:WriteStruct_Count==2187
1521 */
1522 typedef struct
1523 {
1524 U8 num_of_chans; /*< 0: 1> Number of valid carrier numbers contained in the BA list (chan_number) array (1 to 33) */
1525 U8 _align0; /*< 1: 1> alignment */
1526 U8 _align1; /*< 2: 1> alignment */
1527 U8 _align2; /*< 3: 1> alignment */
1528 T_chan_list chan_list; /*< 4: 68> channel list */
1529 U8 pwrc; /*< 72: 1> power control indicator */
1530 U8 dtx_allowed; /*< 73: 1> DTX allowed */
1531 U8 ba_id; /*< 74: 1> band allocation identification */
1532 U8 _align3; /*< 75: 1> alignment */
1533 } T_MPHC_UPDATE_BA_LIST;
1534 #endif
1535
1536 #ifndef __T_MPHC_STOP_DEDICATED_REQ__
1537 #define __T_MPHC_STOP_DEDICATED_REQ__
1538 /*
1539 *
1540 * CCDGEN:WriteStruct_Count==2188
1541 */
1542 typedef struct
1543 {
1544 U8 param; /*< 0: 1> dummy parameter */
1545 U8 _align0; /*< 1: 1> alignment */
1546 U8 _align1; /*< 2: 1> alignment */
1547 U8 _align2; /*< 3: 1> alignment */
1548 } T_MPHC_STOP_DEDICATED_REQ;
1549 #endif
1550
1551 #ifndef __T_MPHC_NCELL_FB_SB_READ__
1552 #define __T_MPHC_NCELL_FB_SB_READ__
1553 /*
1554 *
1555 * CCDGEN:WriteStruct_Count==2189
1556 */
1557 typedef struct
1558 {
1559 U16 radio_freq; /*< 0: 2> channel number */
1560 U8 _align0; /*< 2: 1> alignment */
1561 U8 _align1; /*< 3: 1> alignment */
1562 } T_MPHC_NCELL_FB_SB_READ;
1563 #endif
1564
1565 #ifndef __T_MPHC_NCELL_SB_READ__
1566 #define __T_MPHC_NCELL_SB_READ__
1567 /*
1568 *
1569 * CCDGEN:WriteStruct_Count==2190
1570 */
1571 typedef struct
1572 {
1573 U8 sb_flag; /*< 0: 1> Flag indicating whether synchronisation channel was read correctly or not */
1574 U8 _align0; /*< 1: 1> alignment */
1575 U16 radio_freq; /*< 2: 2> channel number */
1576 U8 bsic; /*< 4: 1> base station identification code */
1577 U8 _align1; /*< 5: 1> alignment */
1578 U8 _align2; /*< 6: 1> alignment */
1579 U8 _align3; /*< 7: 1> alignment */
1580 U32 fn_offset; /*< 8: 4> frame offset */
1581 U32 time_alignmnt; /*< 12: 4> Difference in quarter bits between serving and handover destination cell (0 to 5000) */
1582 } T_MPHC_NCELL_SB_READ;
1583 #endif
1584
1585 #ifndef __T_OML1_CLOSE_TCH_LOOP_REQ__
1586 #define __T_OML1_CLOSE_TCH_LOOP_REQ__
1587 /*
1588 *
1589 * CCDGEN:WriteStruct_Count==2191
1590 */
1591 typedef struct
1592 {
1593 U8 sub_channel; /*< 0: 1> sub channel */
1594 U8 frame_erasure; /*< 1: 1> TCH loop type */
1595 U8 _align0; /*< 2: 1> alignment */
1596 U8 _align1; /*< 3: 1> alignment */
1597 } T_OML1_CLOSE_TCH_LOOP_REQ;
1598 #endif
1599
1600 #ifndef __T_OML1_CLOSE_TCH_LOOP_CON__
1601 #define __T_OML1_CLOSE_TCH_LOOP_CON__
1602 /*
1603 *
1604 * CCDGEN:WriteStruct_Count==2192
1605 */
1606 typedef struct
1607 {
1608 U8 param; /*< 0: 1> dummy parameter */
1609 U8 _align0; /*< 1: 1> alignment */
1610 U8 _align1; /*< 2: 1> alignment */
1611 U8 _align2; /*< 3: 1> alignment */
1612 } T_OML1_CLOSE_TCH_LOOP_CON;
1613 #endif
1614
1615 #ifndef __T_OML1_OPEN_TCH_LOOP_REQ__
1616 #define __T_OML1_OPEN_TCH_LOOP_REQ__
1617 /*
1618 *
1619 * CCDGEN:WriteStruct_Count==2193
1620 */
1621 typedef struct
1622 {
1623 U8 param; /*< 0: 1> dummy parameter */
1624 U8 _align0; /*< 1: 1> alignment */
1625 U8 _align1; /*< 2: 1> alignment */
1626 U8 _align2; /*< 3: 1> alignment */
1627 } T_OML1_OPEN_TCH_LOOP_REQ;
1628 #endif
1629
1630 #ifndef __T_OML1_OPEN_TCH_LOOP_CON__
1631 #define __T_OML1_OPEN_TCH_LOOP_CON__
1632 /*
1633 *
1634 * CCDGEN:WriteStruct_Count==2194
1635 */
1636 typedef struct
1637 {
1638 U8 param; /*< 0: 1> dummy parameter */
1639 U8 _align0; /*< 1: 1> alignment */
1640 U8 _align1; /*< 2: 1> alignment */
1641 U8 _align2; /*< 3: 1> alignment */
1642 } T_OML1_OPEN_TCH_LOOP_CON;
1643 #endif
1644
1645 #ifndef __T_OML1_START_DAI_TEST_REQ__
1646 #define __T_OML1_START_DAI_TEST_REQ__
1647 /*
1648 *
1649 * CCDGEN:WriteStruct_Count==2195
1650 */
1651 typedef struct
1652 {
1653 U8 tested_device; /*< 0: 1> DAI test device */
1654 U8 _align0; /*< 1: 1> alignment */
1655 U8 _align1; /*< 2: 1> alignment */
1656 U8 _align2; /*< 3: 1> alignment */
1657 } T_OML1_START_DAI_TEST_REQ;
1658 #endif
1659
1660 #ifndef __T_OML1_START_DAI_TEST_CON__
1661 #define __T_OML1_START_DAI_TEST_CON__
1662 /*
1663 *
1664 * CCDGEN:WriteStruct_Count==2196
1665 */
1666 typedef struct
1667 {
1668 U8 param; /*< 0: 1> dummy parameter */
1669 U8 _align0; /*< 1: 1> alignment */
1670 U8 _align1; /*< 2: 1> alignment */
1671 U8 _align2; /*< 3: 1> alignment */
1672 } T_OML1_START_DAI_TEST_CON;
1673 #endif
1674
1675 #ifndef __T_OML1_STOP_DAI_TEST_REQ__
1676 #define __T_OML1_STOP_DAI_TEST_REQ__
1677 /*
1678 *
1679 * CCDGEN:WriteStruct_Count==2197
1680 */
1681 typedef struct
1682 {
1683 U8 param; /*< 0: 1> dummy parameter */
1684 U8 _align0; /*< 1: 1> alignment */
1685 U8 _align1; /*< 2: 1> alignment */
1686 U8 _align2; /*< 3: 1> alignment */
1687 } T_OML1_STOP_DAI_TEST_REQ;
1688 #endif
1689
1690 #ifndef __T_OML1_STOP_DAI_TEST_CON__
1691 #define __T_OML1_STOP_DAI_TEST_CON__
1692 /*
1693 *
1694 * CCDGEN:WriteStruct_Count==2198
1695 */
1696 typedef struct
1697 {
1698 U8 param; /*< 0: 1> dummy parameter */
1699 U8 _align0; /*< 1: 1> alignment */
1700 U8 _align1; /*< 2: 1> alignment */
1701 U8 _align2; /*< 3: 1> alignment */
1702 } T_OML1_STOP_DAI_TEST_CON;
1703 #endif
1704
1705 #ifndef __T_TST_SLEEP_REQ__
1706 #define __T_TST_SLEEP_REQ__
1707 /*
1708 *
1709 * CCDGEN:WriteStruct_Count==2199
1710 */
1711 typedef struct
1712 {
1713 U8 sleep_mode; /*< 0: 1> sleep mode */
1714 U8 _align0; /*< 1: 1> alignment */
1715 U16 Clocks; /*< 2: 2> clock modules */
1716 } T_TST_SLEEP_REQ;
1717 #endif
1718
1719 #ifndef __T_MPHC_ADC_IND__
1720 #define __T_MPHC_ADC_IND__
1721 /*
1722 *
1723 * CCDGEN:WriteStruct_Count==2200
1724 */
1725 typedef struct
1726 {
1727 U16 adc_results[9]; /*< 0: 18> result */
1728 U8 _align0; /*< 18: 1> alignment */
1729 U8 _align1; /*< 19: 1> alignment */
1730 } T_MPHC_ADC_IND;
1731 #endif
1732
1733 #ifndef __T_MPHC_INIT_L1_REQ__
1734 #define __T_MPHC_INIT_L1_REQ__
1735 /*
1736 *
1737 * CCDGEN:WriteStruct_Count==2201
1738 */
1739 typedef struct
1740 {
1741 U8 radio_band_config; /*< 0: 1> Bitmap of frequency bands */
1742 U8 _align0; /*< 1: 1> alignment */
1743 U8 _align1; /*< 2: 1> alignment */
1744 U8 _align2; /*< 3: 1> alignment */
1745 } T_MPHC_INIT_L1_REQ;
1746 #endif
1747
1748 #ifndef __T_MPHC_INIT_L1_CON__
1749 #define __T_MPHC_INIT_L1_CON__
1750 /*
1751 *
1752 * CCDGEN:WriteStruct_Count==2202
1753 */
1754 typedef struct
1755 {
1756 U8 param; /*< 0: 1> dummy parameter */
1757 U8 _align0; /*< 1: 1> alignment */
1758 U8 _align1; /*< 2: 1> alignment */
1759 U8 _align2; /*< 3: 1> alignment */
1760 } T_MPHC_INIT_L1_CON;
1761 #endif
1762
1763 #ifndef __T_MPHC_DEACTIVATE_REQ__
1764 #define __T_MPHC_DEACTIVATE_REQ__
1765 /*
1766 *
1767 * CCDGEN:WriteStruct_Count==2203
1768 */
1769 typedef struct
1770 {
1771 U8 param; /*< 0: 1> dummy parameter */
1772 U8 _align0; /*< 1: 1> alignment */
1773 U8 _align1; /*< 2: 1> alignment */
1774 U8 _align2; /*< 3: 1> alignment */
1775 } T_MPHC_DEACTIVATE_REQ;
1776 #endif
1777
1778 #ifndef __T_TST_TEST_HW_REQ__
1779 #define __T_TST_TEST_HW_REQ__
1780 /*
1781 *
1782 * CCDGEN:WriteStruct_Count==2204
1783 */
1784 typedef struct
1785 {
1786 U8 param; /*< 0: 1> dummy parameter */
1787 U8 _align0; /*< 1: 1> alignment */
1788 U8 _align1; /*< 2: 1> alignment */
1789 U8 _align2; /*< 3: 1> alignment */
1790 } T_TST_TEST_HW_REQ;
1791 #endif
1792
1793 #ifndef __T_TST_TEST_HW_CON__
1794 #define __T_TST_TEST_HW_CON__
1795 /*
1796 *
1797 * CCDGEN:WriteStruct_Count==2205
1798 */
1799 typedef struct
1800 {
1801 U16 dsp_code_version; /*< 0: 2> Version number of the DSP code */
1802 U16 dsp_checksum; /*< 2: 2> Checksum of DSP code */
1803 U16 dsp_patch_version; /*< 4: 2> Version number of the DSP patch code */
1804 U16 mcu_alr_version; /*< 6: 2> Version number of the MCU ALR code */
1805 U16 mcu_gprs_version; /*< 8: 2> Version number of the MCU GPRS code */
1806 U16 mcu_tm_version; /*< 10: 2> Version number of the Testmode */
1807 } T_TST_TEST_HW_CON;
1808 #endif
1809
1810 #ifndef __T_PH_DATA_IND__
1811 #define __T_PH_DATA_IND__
1812 /*
1813 *
1814 * CCDGEN:WriteStruct_Count==2206
1815 */
1816 typedef struct
1817 {
1818 U16 rf_chan_num; /*< 0: 2> channel number */
1819 U8 l2_channel_type; /*< 2: 1> layer 2 channel type */
1820 U8 error_cause; /*< 3: 1> error cause */
1821 T_RADIO_FRAME l2_frame; /*< 4: 24> Layer 2 frame */
1822 U8 bsic; /*< 28: 1> base station identification code */
1823 U8 tc; /*< 29: 1> multiframe number modulo 8 */
1824 U8 _align0; /*< 30: 1> alignment */
1825 U8 _align1; /*< 31: 1> alignment */
1826 } T_PH_DATA_IND;
1827 #endif
1828
1829 #ifndef __T_MPHC_STOP_DEDICATED_CON__
1830 #define __T_MPHC_STOP_DEDICATED_CON__
1831 /*
1832 *
1833 * CCDGEN:WriteStruct_Count==2207
1834 */
1835 typedef struct
1836 {
1837 U8 param; /*< 0: 1> dummy parameter */
1838 U8 _align0; /*< 1: 1> alignment */
1839 U8 _align1; /*< 2: 1> alignment */
1840 U8 _align2; /*< 3: 1> alignment */
1841 } T_MPHC_STOP_DEDICATED_CON;
1842 #endif
1843
1844
1845 #include "CDG_LEAVE.h"
1846
1847
1848 #endif