FreeCalypso > hg > fc-magnetite
comparison src/cs/system/Main/init.c @ 268:f5c10ec9c5fd
init.c: module passes compilation,
Init_Drivers() and Init_Serial_Flows() functions are good,
Init_Target() and Init_Unmask_IT() need further work
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sun, 06 Aug 2017 09:21:57 +0000 |
parents | f62b71017afd |
children | a498108254c9 |
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267:f62b71017afd | 268:f5c10ec9c5fd |
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296 * | 296 * |
297 * Performs low-level HW Initialization. | 297 * Performs low-level HW Initialization. |
298 */ | 298 */ |
299 void Init_Target(void) | 299 void Init_Target(void) |
300 { | 300 { |
301 | |
302 | |
303 #if (BOARD==70)|| (BOARD==71) | |
304 /* Variable for reading the BCR for MCP RAM */ | |
305 unsigned short bcrTmpVal; | |
306 #endif | |
307 (*(volatile Uint16 *) 0xFFFF702A) = 0x0002;//reset the UART module. | |
308 #if (CHIPSET == 15) | |
309 char detect_code[80]; | |
310 typedef void (*pf_t)(UWORD32, UWORD16 *, UWORD16 *); | |
311 extern void ffsdrv_device_id_read(UWORD32 base_addr, UWORD16 *manufact, UWORD16 *device); | |
312 pf_t myfp; | |
313 UWORD16 manufact; | |
314 UWORD16 device_id[3]; | |
315 | |
316 #endif | |
317 #if (BOARD == 5) | 301 #if (BOARD == 5) |
318 #define WS_ROM (1) | 302 #define WS_ROM (1) |
319 #define WS_RAM (1) | 303 #define WS_RAM (1) |
320 #define WS_APIF (1) | 304 #define WS_APIF (1) |
321 #define WS_CS2 (7) /* LCD on EVA3. */ | 305 #define WS_CS2 (7) /* LCD on EVA3. */ |
580 #endif | 564 #endif |
581 #endif | 565 #endif |
582 #endif | 566 #endif |
583 #endif /* (CHIPSET == 15) */ | 567 #endif /* (CHIPSET == 15) */ |
584 | 568 |
585 | |
586 /* | |
587 * Initialize current DSP clock to 0 in order to pass through | |
588 * the right DSP latency configuration (increase DSP clock) | |
589 * in f_dynamic_clock_cfg(). | |
590 * Obviously, the real DSP clock is not 0kHz. | |
591 * d_dsp_cur_clk will be updated after clock configuration in f_dynamic_clock_cfg(). | |
592 */ | |
593 d_dsp_cur_clk = 0; // Used to keep track of current DSP clock. | |
594 | |
595 /* Dynamic clock configuration */ | |
596 f_dynamic_clock_cfg(C_CLOCK_CFG_DEFAULT); | |
597 | 569 |
598 // Write_en_0 = 0 , Write_en_1 = 0 | 570 // Write_en_0 = 0 , Write_en_1 = 0 |
599 RHEA_INITARM(0,0); | 571 RHEA_INITARM(0,0); |
600 | 572 |
601 #if (CHIPSET ==15) | 573 #if (CHIPSET ==15) |