--- a/src/cs/drivers/drv_app/ffs/board/dev.c	Mon Nov 19 02:00:21 2018 +0000
+++ b/src/cs/drivers/drv_app/ffs/board/dev.c	Tue Dec 11 07:37:44 2018 +0000
@@ -128,7 +128,8 @@
 };
 #endif
 
-#ifdef CONFIG_TARGET_LEONARDO
+#if defined(CONFIG_TARGET_LEONARDO) || defined(CONFIG_TARGET_PIRELLI) || \
+	defined(CONFIG_TARGET_FCFAM)
 // 128x64kb
 static const struct block_info_s flash_128x64[] =
 {
@@ -359,20 +360,61 @@
 
 #ifdef CONFIG_TARGET_PIRELLI
 
-    // Spansion S71PL129NC0 used in Pirelli DP-L10
-    // ID made up (same as what Pirelli's fw uses), not using autodetect
-    // This is an aftermarket FFS config for the Pirelli target
+    /*
+     * Our familiar version of the Pirelli DP-L10 hw features Spansion
+     * S71PL129NC0HFW4B flash (N version, 256 KiB sectors), but apparently
+     * an earlier hw version had S71PL-J flash with 64 KiB sectors,
+     * and Pirelli's official fw supports both.  They have modified
+     * TI's flash ID code to generate device ID 0x2100 for the J version
+     * or 0x2101 for the N version.  We have now replicated this ID logic
+     * in our FreeCalypso code base, and we can now support both flash
+     * chip versions as well.
+     *
+     * Our FFS configuration for the Pirelli target is aftermarket.
+     */
+
+    /* J flash */
+    { &flash_128x64[0], (char *) 0x02480000, MANUFACT_AMD,     0x2100,
+      FFS_DRIVER_AMD, 24 },
+
+    /* N flash */
     { &flash_32x256[0], (char *) 0x02480000, MANUFACT_AMD,     0x2101,
       FFS_DRIVER_AMD,  6 },
 
 #elif defined(CONFIG_TARGET_FCFAM)
 
-    // We are using the same flash+pSRAM chip in our own
-    // FreeCalypso hardware designs, but on a different chip select.
-    // Let's use the first 2 MiB of the 2nd bank for the FFS.
+    /*
+     * Our FreeCalypso hardware family is currently in its infancy
+     * (we have only one board design so far, but hoping to have more),
+     * thus the set of possible flash chip types on FC hw platforms
+     * is expected to grow.  The footprint on our current FCDEV3B PCB
+     * ideally fits Spansion MCPs with two chip select banks (either
+     * S71PL-J or S71PL-N), but can also be fitted with Openmoko's
+     * Samsung K5A3281.  Spansion S71PL129NC0HFW4B (copied from the
+     * Pirelli DP-L10) is our official flash+RAM chip, populated on
+     * our production boards, but now that we have fixed TI's autodetect
+     * code to work with the newer Spansion chips, we can support
+     * all 3 possibilities in our fw with autodetection: S71PL-J,
+     * S71PL-N or K5A32xx.
+     *
+     * For future FreeCalypso hw designs, the Mother's plan is to
+     * keep the high-capacity S71PL129NC0HFW4B for the handset prototype
+     * and UI development board, but for embedded modem products
+     * we will probably switch to Openmoko's K5A32xx.
+     */
+
+    /* S71PL-N, FreeCalypso official, FFS in the first 2 MiB of the 2nd bank */
     { &flash_32x256[0], (char *) 0x01800000, MANUFACT_AMD,     0x2101,
       FFS_DRIVER_AMD,  8 },
 
+    /* S71PL-J, currently only theoretical */
+    { &flash_128x64[0], (char *) 0x01800000, MANUFACT_AMD,     0x2100,
+      FFS_DRIVER_AMD, 32 },
+
+    /* K5A32xxCTM from Openmoko */
+    { &flash_16x64[0], (char *) 0x380000, MANUFACT_SAMSUNG, 0x22A0,
+      FFS_DRIVER_AMD,  7 },
+
 #elif defined(CONFIG_TARGET_COMPAL)
 
     /* aftermarket FFS configurations for FreeCalypso on Mot C1xx phones */