FreeCalypso > hg > fc-magnetite
diff src/cs/drivers/drv_app/fchg/fchg_process.c @ 363:cce24b9de6db
FCHG: CV control loop implemented
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Fri, 29 Dec 2017 07:28:29 +0000 |
| parents | 4c3d05866531 |
| children | 44795dbadbae |
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--- a/src/cs/drivers/drv_app/fchg/fchg_process.c Fri Dec 29 07:06:06 2017 +0000 +++ b/src/cs/drivers/drv_app/fchg/fchg_process.c Fri Dec 29 07:28:29 2017 +0000 @@ -178,11 +178,9 @@ { if (pwr_ctrl->batt_mv < pwr_ctrl->config.overvoltage) return 0; - if (pwr_ctrl->cv_dac_curr >= pwr_ctrl->cv_dac_init) - return 0; - if ((pwr_ctrl->cv_dac_init - pwr_ctrl->cv_dac_curr) < - pwr_ctrl->config.cv_dac_max_decr) - return 0; + if (pwr_ctrl->cv_dac_curr != + (pwr_ctrl->cv_dac_init - pwr_ctrl->config.cv_dac_max_decr)) + return; rvf_send_trace("Stopping charge by overvoltage condition", 40, NULL_PARAM, RV_TRACE_LEVEL_DEBUG_HIGH, FCHG_USE_ID); ABB_Write_Register_on_page(PAGE0, BCICTL2, 0); @@ -191,6 +189,44 @@ return 1; } +static void cv_ctrl_loop_high_check(void) +{ + if (pwr_ctrl->batt_mv < pwr_ctrl->config.cv_ctrl_loop_high) { + pwr_ctrl->cv_high_vbat_count = 0; + return; + } + pwr_ctrl->cv_high_vbat_count++; + if (pwr_ctrl->cv_high_vbat_count < pwr_ctrl->config.cv_samples_needed) + return; + if (pwr_ctrl->cv_dac_curr == + (pwr_ctrl->cv_dac_init - pwr_ctrl->config.cv_dac_max_decr)) + return; + pwr_ctrl->cv_dac_curr--; + ABB_Write_Register_on_page(PAGE0, CHGREG, pwr_ctrl->cv_dac_curr); + rvf_send_trace("Sub CV DAC", 10, pwr_ctrl->cv_dac_curr, + RV_TRACE_LEVEL_DEBUG_MEDIUM, FCHG_USE_ID); + pwr_ctrl->cv_high_vbat_count = 0; +} + +static void cv_ctrl_loop_low_check(void) +{ + if (pwr_ctrl->batt_mv >= pwr_ctrl->config.cv_ctrl_loop_low) { + pwr_ctrl->cv_low_vbat_count = 0; + return; + } + pwr_ctrl->cv_low_vbat_count++; + if (pwr_ctrl->cv_low_vbat_count < pwr_ctrl->config.cv_samples_needed) + return; + if (pwr_ctrl->cv_dac_curr == + (pwr_ctrl->cv_dac_init + pwr_ctrl->config.cv_dac_max_incr)) + return; + pwr_ctrl->cv_dac_curr++; + ABB_Write_Register_on_page(PAGE0, CHGREG, pwr_ctrl->cv_dac_curr); + rvf_send_trace("Add CV DAC", 10, pwr_ctrl->cv_dac_curr, + RV_TRACE_LEVEL_DEBUG_MEDIUM, FCHG_USE_ID); + pwr_ctrl->cv_low_vbat_count = 0; +} + void pwr_process_adc(struct pwr_adc_ind_s *msg) { pwr_ctrl->batt_mv = madc_vbat_2_physical(msg->data[0]); @@ -263,7 +299,8 @@ return; if (overvoltage_end_charge_check()) return; - /* DAC control loop will go here */ + cv_ctrl_loop_high_check(); + cv_ctrl_loop_low_check(); return; default: rvf_send_trace("Invalid state in pwr_process_adc()", 32,