view cdg-hybrid/cdginc/p_8010_142_smreg_sap.val @ 624:012028896cfb

FFS dev.c, Leonardo target: Fujitsu MB84VF5F5F4J2 #if 0'ed out The FFS code we got from TI/Openmoko had a stanza for "Fujitsu MB84VF5F5F4J2 stacked device", using a fake device ID code that would need to be patched manually into cfgffs.c (suppressing and overriding autodetection) and using an FFS base address in the nCS2 bank, indicating that this FFS config was probably meant for the MCP version of Leonardo which allows for 16 MiB flash with a second bank on nCS2. We previously had this FFS config stanza conditionalized under CONFIG_TARGET_LEONARDO because the base address contained therein is invalid for other targets, but now that we actually have a Leonardo build target in FC Magnetite, I realize that the better approach is to #if 0 out this stanza altogether: it is already non-functional because it uses a fake device ID code, thus it is does not add support for more Leonardo board variants, instead it is just noise.
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 22 Dec 2019 21:24:29 +0000
parents e7a67accfad9
children
line wrap: on
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/*
+--------------------------------------------------------------------------+
| PROJECT : PROTOCOL STACK                                                 |
| FILE    : p_8010_142_smreg_sap.val                                       |
| SOURCE  : "sap\8010_142_smreg_sap.pdf"                                   |
| LastModified : "2003-08-22"                                              |
| IdAndVersion : "8010.142.02.011"                                         |
| SrcFileTime  : "Thu Nov 29 09:28:36 2007"                                |
| Generated by CCDGEN_2.5.5A on Fri Oct 14 21:41:52 2016                   |
|           !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!!                |
+--------------------------------------------------------------------------+
*/

/* PRAGMAS
 * PREFIX                 : SMREG
 * COMPATIBILITY_DEFINES  : NO
 * ALWAYS_ENUM_IN_VAL_FILE: YES
 * ENABLE_GROUP: NO
 * CAPITALIZE_TYPENAME: NO
 */


#ifndef P_8010_142_SMREG_SAP_VAL
#define P_8010_142_SMREG_SAP_VAL


#define CDG_ENTER__P_8010_142_SMREG_SAP_VAL

#define CDG_ENTER__FILENAME _P_8010_142_SMREG_SAP_VAL
#define CDG_ENTER__P_8010_142_SMREG_SAP_VAL__FILE_TYPE CDGINC
#define CDG_ENTER__P_8010_142_SMREG_SAP_VAL__LAST_MODIFIED _2003_08_22
#define CDG_ENTER__P_8010_142_SMREG_SAP_VAL__ID_AND_VERSION _8010_142_02_011

#define CDG_ENTER__P_8010_142_SMREG_SAP_VAL__SRC_FILE_TIME _Thu_Nov_29_09_28_36_2007

#include "CDG_ENTER.h"

#undef CDG_ENTER__P_8010_142_SMREG_SAP_VAL

#undef CDG_ENTER__FILENAME

#include "p_8010_152_ps_include.val"   /* Access values independent from the corresponding h-file. */

#include "p_8010_137_nas_include.val"   /* Access values independent from the corresponding h-file. */

#include "p_8010_153_cause_include.val"   /* Access values independent from the corresponding h-file. */


/*
 * Enum to value table VAL_pdp_type
 * CCDGEN:WriteEnum_Count==69
 */
#ifndef __T_SMREG_VAL_pdp_type__
#define __T_SMREG_VAL_pdp_type__
typedef enum
{
  SMREG_PDP_PPP                  = 0x1,           /* PDP type PPP                   */
  SMREG_PDP_EMPTY                = 0xf,           /* Dynamic address assignment in effect */
  SMREG_PDP_IPV4                 = 0x21,          /* IP version 4                   */
  SMREG_PDP_IPV6                 = 0x57           /* IP version 6                   */
}T_SMREG_VAL_pdp_type;
#endif

#include "CDG_LEAVE.h"


#endif