view cdg-hybrid/gen-file-list @ 624:012028896cfb

FFS dev.c, Leonardo target: Fujitsu MB84VF5F5F4J2 #if 0'ed out The FFS code we got from TI/Openmoko had a stanza for "Fujitsu MB84VF5F5F4J2 stacked device", using a fake device ID code that would need to be patched manually into cfgffs.c (suppressing and overriding autodetection) and using an FFS base address in the nCS2 bank, indicating that this FFS config was probably meant for the MCP version of Leonardo which allows for 16 MiB flash with a second bank on nCS2. We previously had this FFS config stanza conditionalized under CONFIG_TARGET_LEONARDO because the base address contained therein is invalid for other targets, but now that we actually have a Leonardo build target in FC Magnetite, I realize that the better approach is to #if 0 out this stanza altogether: it is already non-functional because it uses a fake device ID code, thus it is does not add support for more Leonardo board variants, instead it is just noise.
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 22 Dec 2019 21:24:29 +0000
parents e7a67accfad9
children
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calc.cdg
calcidx.cdg
ccdent.cdg
ccdid.h
ccdmtab.cdg
ccdptab.cdg
cdemstr.cdg
cdemval.cdg
cdepval.cdg
m_cc.h
m_cc.val
m_fac.h
m_fac.val
m_gmm.h
m_gmm.val
m_grlc.h
m_grlc.val
m_grr.h
m_grr.val
m_mm.h
m_mm.val
m_rr.h
m_rr.val
m_rr_com.h
m_rr_com.val
m_rr_short_pd.h
m_rr_short_pd.val
m_sat.h
m_sat.val
m_sm.h
m_sm.val
m_sms.h
m_sms.val
m_ss.h
m_ss.val
m_t30.h
m_t30.val
m_tst.h
m_tst.val
malias.cdg
mcomp.cdg
mconst.cdg
melem.cdg
mmtxidx.cdg
mmtxval.cdg
mstr.cdg
mval.cdg
mvar.cdg
p_8010_128_sm_sap.h
p_8010_128_sm_sap.val
p_8010_134_mmpm_sap.h
p_8010_134_mmpm_sap.val
p_8010_135_sn_sap.h
p_8010_135_sn_sap.val
p_8010_136_simdrv_sap.h
p_8010_136_simdrv_sap.val
p_8010_137_nas_include.h
p_8010_137_nas_include.val
p_8010_142_smreg_sap.h
p_8010_142_smreg_sap.val
p_8010_147_l1_include.h
p_8010_147_l1_include.val
p_8010_152_ps_include.h
p_8010_152_ps_include.val
p_8010_153_cause_include.h
p_8010_153_cause_include.val
p_8010_157_upm_sap.h
p_8010_157_upm_sap.val
p_aci.h
p_aci.val
p_app.h
p_app.val
p_bat.h
p_bat.val
p_cci.h
p_cci.val
p_cgrlc.h
p_cgrlc.val
p_cl.h
p_cl.val
p_cst.h
p_cst.val
p_dcm.h
p_dcm.val
p_dio.h
p_dio.val
p_dl.h
p_dl.val
p_dti.h
p_dti.val
p_dti2.h
p_dti2.val
p_em.h
p_em.val
p_fad.h
p_fad.val
p_gmmaa.h
p_gmmaa.val
p_gmmreg.h
p_gmmreg.val
p_gmmrr.h
p_gmmrr.val
p_gmmsms.h
p_gmmsms.val
p_grlc.h
p_grlc.val
p_gsim.h
p_gsim.val
p_gsmcom.h
p_gsmcom.val
p_ip.h
p_ip.val
p_ipa.h
p_ipa.val
p_l1test.h
p_l1test.val
p_l2r.h
p_l2r.val
p_ll.h
p_ll.val
p_llgmm.h
p_llgmm.val
p_mac.h
p_mac.val
p_mdl.h
p_mdl.val
p_mmcm.h
p_mmcm.val
p_mmgmm.h
p_mmgmm.val
p_mmi.h
p_mmi.val
p_mmreg.h
p_mmreg.val
p_mmsms.h
p_mmsms.val
p_mmss.h
p_mmss.val
p_mncc.h
p_mncc.val
p_mnlc.h
p_mnlc.val
p_mnsms.h
p_mnsms.val
p_mnss.h
p_mnss.val
p_mon.h
p_mon.val
p_mph.h
p_mph.val
p_mphc.h
p_mphc.val
p_mphp.h
p_mphp.val
p_ph.h
p_ph.val
p_pkt.h
p_pkt.val
p_ppp.h
p_ppp.val
p_psi.h
p_psi.val
p_ra.h
p_ra.val
p_rlp.h
p_rlp.val
p_rr.h
p_rr.val
p_rrgrr.h
p_rrgrr.val
p_rrlc.h
p_rrlc.val
p_rrlp.h
p_rrlp.val
p_rrrrlp.h
p_rrrrlp.val
p_sim.h
p_sim.val
p_t30.h
p_t30.val
p_tb.h
p_tb.val
p_tcpip.h
p_tcpip.val
p_tra.h
p_tra.val
p_uart.h
p_uart.val
p_udp.h
p_udp.val
p_udpa.h
p_udpa.val
palias.cdg
pcomp.cdg
pconst.cdg
pelem.cdg
pmtxidx.cdg
pmtxval.cdg
pstr.cdg
pval.cdg
pvar.cdg
spare.cdg
uicc.h
uicc.intf