FreeCalypso > hg > fc-magnetite

view components/drivers_flash @ 605:07d0dc4431f4

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bootloader.s: same MEMIF fix as in int.s plus DPLL BYPASS fix Both MEMIF and DPLL settings are now the same between int.s and bootloader.s assembly code paths. Previously bootloader.s was setting DPLL BYPASS /2 mode, which persisted until _INT_Initialize code with the bootloader body omitted, or was changed to /1 in the hardware init function in the bootloader.lib:start.obj module.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 17 Jun 2019 18:40:32 +0000
parents c39e9d96c464
children 0cbe7438f974
line wrap: on
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# Building drivers_flash.lib

CFLAGS="-me -pw2 -mn -x -mt -o2 -mw"
CPPFLAGS="-DTOOL_CHOICE=0 -D_TMS470"

# Includes

CPPFLAGS="$CPPFLAGS -I../config"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/os/nucleus"
CPPFLAGS="$CPPFLAGS -I.."
CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/frame/cust_os"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/system"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/audio_cust0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/audio_include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/cust0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/hmacs"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/p_include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tm_include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tm_cust0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/dyn_dwl_include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/abb"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/armio"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/clkm"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/conf"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dma"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dsp_dwnld"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/inth"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/memif"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/rhea"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/security"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/spi"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/timer"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/uart"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/ulpd"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/p_source0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/source0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/source"

SRCDIR=$SRC/cs/drivers/drv_core

# 1st set of source modules

cfile_plain $SRCDIR/dsp_dwnld/leadapi.c
cfile_plain $SRCDIR/inth/niq.c
cfile_plain $SRCDIR/uart/uart.c
cfile_plain $SRCDIR/inth/inth.c
cfile_plain $SRCDIR/timer/timer.c
cfile_plain $SRCDIR/timer/timer1.c
cfile_plain $SRCDIR/timer/timer2.c
cfile_plain $SRCDIR/timer/timer_sec.c
cfile_plain $SRCDIR/security/certificate.c
cfile_plain $SRCDIR/clkm/clkm.c
cfile_plain $SRCDIR/armio/armio.c

# 2nd set of source modules

CFLAGS="-me -pw2 -mn -mt"

cfile_plain $SRCDIR/spi/spi_drv.c
cfile_plain $SRCDIR/abb/abb.c
cfile_plain $SRCDIR/abb/abb_core_inth.c

# niq32

CFLAGS="-me -pw2 -x -o -mw"

cfile_plain $SRCDIR/inth/niq32.c