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view src/aci2/alr/alr_test/alr_cbch_constraints.h @ 605:07d0dc4431f4

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bootloader.s: same MEMIF fix as in int.s plus DPLL BYPASS fix Both MEMIF and DPLL settings are now the same between int.s and bootloader.s assembly code paths. Previously bootloader.s was setting DPLL BYPASS /2 mode, which persisted until _INT_Initialize code with the bootloader body omitted, or was changed to /1 in the hardware init function in the bootloader.lib:start.obj module.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 17 Jun 2019 18:40:32 +0000
parents 93999a60b835
children
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/*
  +------------------------------------------------------------------------------
  |  File:       alr_cbch_constraints.h
  +------------------------------------------------------------------------------
  |              Copyright 2003 Texas Instruments
  |              All rights reserved.
  |
  |              This file is confidential and a trade secret of Texas Instruments.
  |              The receipt of or possession of this file does not convey
  |              any rights to reproduce or disclose its contents or to
  |              manufacture, use, or sell anything it may describe, in
  |              whole, or in part, without the specific written consent of
  |              Texas Instruments.
  +------------------------------------------------------------------------------
  | Purpose:     Contains prototype constraints for alr
  |
  +------------------------------------------------------------------------------
*/
#ifndef ALR_CBCH_CONSTRAINTS_H
#define ALR_CBCH_CONSTRAINTS_H

#include "p_mphc.h"
#include "p_mph.h"
#include "p_mmi.h"
#include "p_mon.h"
#include "p_em.h"
#include "p_ph.h"
#include "p_dl.h"
#include "m_rr.h"
//#include "m_rr_fix.h"

#include "tdc.h"
#endif