view src/cs/drivers/drv_app/fchg/fchg_messages.h @ 605:07d0dc4431f4

bootloader.s: same MEMIF fix as in int.s plus DPLL BYPASS fix Both MEMIF and DPLL settings are now the same between int.s and bootloader.s assembly code paths. Previously bootloader.s was setting DPLL BYPASS /2 mode, which persisted until _INT_Initialize code with the bootloader body omitted, or was changed to /1 in the hardware init function in the bootloader.lib:start.obj module.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 17 Jun 2019 18:40:32 +0000
parents c4077830aeeb
children
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/*
 * In this header file we are going to define the messages
 * that can be sent to the FCHG task.
 */

#ifndef __FCHG_MESSAGES_H
#define __FCHG_MESSAGES_H

#include "rv/rv_general.h"

// Request mail
struct pwr_req_s {
     T_RV_HDR header;
};

// Indication mail with ADC measurements
struct pwr_adc_ind_s {
     T_RV_HDR header;
     unsigned short data[9+1]; // ADC measurements + status of VRPCSTS register
};

// Message IDs for all PWR module messages
enum pwr_msg_id {
	/* message types new to FCHG */
	USER_START_CHARGE_REQ	= 1,
	USER_STOP_CHARGE_REQ,
	/* messages sent to us by SPI task, same as TI's LCC */
	PWR_CHARGER_PLUGGED_IND  = 40,
	PWR_CHARGER_UNPLUGGED_IND,
	PWR_ADC_IND = 90
};

#endif