FreeCalypso > hg > fc-magnetite
view cdg-hybrid/cdginc/p_mon.val @ 629:3231dd9b38c1
armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets
Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively,
and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code
for C-Sample and earlier turns them into GPIOs configured as outputs also
driving 1 - so far, so good - but TI's code for BOARD 41 (which covers
D-Sample, Leonardo and all real world Calypso devices derived from the
latter) switches them from MCUEN to GPIOs, but then leaves them as inputs.
Given that the hardware powerup state of these two pins is outputs driving 1,
every Calypso board design MUST be compatible with such driving; typically
these GPIO signals will be either unused and unconnected or connected as
outputs driving some peripheral. Turning these pins into GPIO inputs will
result in floating inputs on every reasonably-wired board, thus I am
convinced that this configuration is nothing but a bug on the part of
whoever wrote this code at TI.
This floating input bug had already been fixed earlier for GTA modem and
FCDEV3B targets; the present change makes the fix unconditional for all
"classic" targets. The newly affected targets are D-Sample, Leonardo,
Tango and GTM900.
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Thu, 02 Jan 2020 05:38:26 +0000 |
| parents | e7a67accfad9 |
| children |
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/* +--------------------------------------------------------------------------+ | PROJECT : PROTOCOL STACK | | FILE : p_mon.val | | SOURCE : "sap\mon.pdf" | | LastModified : "2003-02-04" | | IdAndVersion : "8304.129.96.103" | | SrcFileTime : "Thu Nov 29 09:49:00 2007" | | Generated by CCDGEN_2.5.5A on Fri Oct 14 21:41:52 2016 | | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! | +--------------------------------------------------------------------------+ */ /* PRAGMAS * PREFIX : NONE * COMPATIBILITY_DEFINES : NO (require PREFIX) * ALWAYS_ENUM_IN_VAL_FILE: NO * ENABLE_GROUP: NO * CAPITALIZE_TYPENAME: NO */ #ifndef P_MON_VAL #define P_MON_VAL #define CDG_ENTER__P_MON_VAL #define CDG_ENTER__FILENAME _P_MON_VAL #define CDG_ENTER__P_MON_VAL__FILE_TYPE CDGINC #define CDG_ENTER__P_MON_VAL__LAST_MODIFIED _2003_02_04 #define CDG_ENTER__P_MON_VAL__ID_AND_VERSION _8304_129_96_103 #define CDG_ENTER__P_MON_VAL__SRC_FILE_TIME _Thu_Nov_29_09_49_00_2007 #include "CDG_ENTER.h" #undef CDG_ENTER__P_MON_VAL #undef CDG_ENTER__FILENAME /* * Value constants for VAL_arfcn */ #define VAL_ARFCN___FFFF (0xffff) /* not present */ /* * Value constants for VAL_att_flag */ #define ATT_NOT_ALLOW (0x0) /* attach / detach not allowed */ #define ATT_ALLOW (0x1) /* attach / detach allowed */ /* * Value constants for VAL_conf_ccch */ #define CCCH_NOT_COMB_1_CHAN (0x0) /* CCCH not combined with SDCCH, 1 channel */ #define CCCH_COMB_1_CHAN (0x1) /* CCCH combined with SDCCH, 1 channel */ #define CCCH_NOT_COMB_2_CHAN (0x2) /* CCCH not combined with SDCCH, 2 channels */ #define CCCH_NOT_COMB_3_CHAN (0x4) /* CCCH not combined with SDCCH, 3 channels */ #define CCCH_NOT_COMB_4_CHAN (0x6) /* CCCH not combined with SDCCH, 4 channels */ /* * Value constants for VAL_tn */ /* * Value constants for VAL_dlt */ /* * Value constants for VAL_pg */ /* * Value constants for VAL_bs_pa_mfrms */ #define VAL_BS_PA_MFRMS___0 (0x0) /* 2 Multiframe Periods */ #define VAL_BS_PA_MFRMS___1 (0x1) /* 3 Multiframe Periods */ #define VAL_BS_PA_MFRMS___2 (0x2) /* 4 Multiframe Periods */ #define VAL_BS_PA_MFRMS___3 (0x3) /* 5 Multiframe Periods */ #define VAL_BS_PA_MFRMS___4 (0x4) /* 6 Multiframe Periods */ #define VAL_BS_PA_MFRMS___5 (0x5) /* 7 Multiframe Periods */ #define VAL_BS_PA_MFRMS___6 (0x6) /* 8 Multiframe Periods */ #define VAL_BS_PA_MFRMS___7 (0x7) /* 9 Multiframe Periods */ /* * Value constants for VAL_power */ /* * Value constants for VAL_rx_lev */ /* * Value constants for VAL_rx_qual_full */ /* * Value constants for VAL_bsic */ #define VAL_BSIC___FF (0xff) /* not present */ /* * Value constants for VAL_ch_type */ #define CH_TCH_F (0x1) /* TCH/F */ #define CH_TCH_H_1 (0x2) /* TCH/H(1) */ #define CH_TCH_H_2 (0x3) /* TCH/H(2) */ #define CH_SDCCH_4_0 (0x4) /* SDCCH/4(0) */ #define CH_SDCCH_4_1 (0x5) /* SDCCH/4(1) */ #define CH_SDCCH_4_2 (0x6) /* SDCCH/4(2) */ #define CH_SDCCH_4_3 (0x7) /* SDCCH/4(3) */ #define CH_SDCCH_8_0 (0x8) /* SDCCH/8(0) */ #define CH_SDCCH_8_1 (0x9) /* SDCCH/8(1) */ #define CH_SDCCH_8_2 (0xa) /* SDCCH/8(2) */ #define CH_SDCCH_8_3 (0xb) /* SDCCH/8(3) */ #define CH_SDCCH_8_4 (0xc) /* SDCCH/8(4) */ #define CH_SDCCH_8_5 (0xd) /* SDCCH/8(5) */ #define CH_SDCCH_8_6 (0xe) /* SDCCH/8(6) */ #define CH_SDCCH_8_7 (0xf) /* SDCCH/8(7) */ /* * Value constants for VAL_ch_mode */ #define MODE_SIG_ONLY (0x0) /* signalling only */ #define MODE_SPEECH_FULL (0x1) /* speech full rate */ #define MODE_SPEECH_HALF (0x5) /* speech half rate */ #define MODE_DATA_12 (0x3) /* data 12 kBits/s */ #define MODE_DATA_6_FULL (0xb) /* data 6 kBits/s fullrate */ #define MODE_DATA_6_HALF (0xf) /* data 6 kBits/s halfrate */ #define MODE_DATA_3_6_FULL (0x13) /* data 3.6 kBits/s fullrate */ #define MODE_DATA_3_6_HALF (0x17) /* data 3.6 kBits/s halfrate */ #define MODE_ENHANCED_FULL (0x21) /* enhanced full rate */ /* * Value constants for VAL_hop */ #define VAL_HOP___0 (0x0) /* no frequency hopping */ #define VAL_HOP___1 (0x1) /* with frequency hopping */ /* * user defined constants */ #define SIZE_MCC (0x3) #define SIZE_MNC (0x3) #include "CDG_LEAVE.h" #endif