FreeCalypso > hg > fc-magnetite
view cdg-hybrid/cdginc/p_rrrrlp.h @ 629:3231dd9b38c1
armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets
Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively,
and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code
for C-Sample and earlier turns them into GPIOs configured as outputs also
driving 1 - so far, so good - but TI's code for BOARD 41 (which covers
D-Sample, Leonardo and all real world Calypso devices derived from the
latter) switches them from MCUEN to GPIOs, but then leaves them as inputs.
Given that the hardware powerup state of these two pins is outputs driving 1,
every Calypso board design MUST be compatible with such driving; typically
these GPIO signals will be either unused and unconnected or connected as
outputs driving some peripheral. Turning these pins into GPIO inputs will
result in floating inputs on every reasonably-wired board, thus I am
convinced that this configuration is nothing but a bug on the part of
whoever wrote this code at TI.
This floating input bug had already been fixed earlier for GTA modem and
FCDEV3B targets; the present change makes the fix unconditional for all
"classic" targets. The newly affected targets are D-Sample, Leonardo,
Tango and GTM900.
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Thu, 02 Jan 2020 05:38:26 +0000 |
parents | e7a67accfad9 |
children |
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/* +--------------------------------------------------------------------------+ | PROJECT : PROTOCOL STACK | | FILE : p_rrrrlp.h | | SOURCE : "sap\rrrrlp.pdf" | | LastModified : "2002-09-10" | | IdAndVersion : "0000.000.00.002" | | SrcFileTime : "Thu Nov 29 09:53:22 2007" | | Generated by CCDGEN_2.5.5A on Fri Oct 14 21:41:52 2016 | | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! | +--------------------------------------------------------------------------+ */ /* PRAGMAS * PREFIX : NONE * COMPATIBILITY_DEFINES : NO (require PREFIX) * ALWAYS_ENUM_IN_VAL_FILE: NO * ENABLE_GROUP: NO * CAPITALIZE_TYPENAME: NO */ #ifndef P_RRRRLP_H #define P_RRRRLP_H #define CDG_ENTER__P_RRRRLP_H #define CDG_ENTER__FILENAME _P_RRRRLP_H #define CDG_ENTER__P_RRRRLP_H__FILE_TYPE CDGINC #define CDG_ENTER__P_RRRRLP_H__LAST_MODIFIED _2002_09_10 #define CDG_ENTER__P_RRRRLP_H__ID_AND_VERSION _0000_000_00_002 #define CDG_ENTER__P_RRRRLP_H__SRC_FILE_TIME _Thu_Nov_29_09_53_22_2007 #include "CDG_ENTER.h" #undef CDG_ENTER__P_RRRRLP_H #undef CDG_ENTER__FILENAME #include "p_rrrrlp.val" /* * End of substructure section, begin of primitive definition section */ #ifndef __T_RRRRLP_DATA_IND__ #define __T_RRRRLP_DATA_IND__ /* * * CCDGEN:WriteStruct_Count==3004 */ typedef struct { U8 cr; /*< 0: 1> Command or Response */ U8 _align0; /*< 1: 1> alignment */ U8 _align1; /*< 2: 1> alignment */ U8 _align2; /*< 3: 1> alignment */ T_sdu sdu; /*< 4: ? > Service Data Unit */ } T_RRRRLP_DATA_IND; #endif #ifndef __T_RRRRLP_DATA_REQ__ #define __T_RRRRLP_DATA_REQ__ /* * * CCDGEN:WriteStruct_Count==3005 */ typedef struct { U8 cr; /*< 0: 1> Command or Response */ U8 _align0; /*< 1: 1> alignment */ U8 _align1; /*< 2: 1> alignment */ U8 _align2; /*< 3: 1> alignment */ T_sdu sdu; /*< 4: ? > Service Data Unit */ } T_RRRRLP_DATA_REQ; #endif #ifndef __T_RRRRLP_DATA_CNF__ #define __T_RRRRLP_DATA_CNF__ /* * * CCDGEN:WriteStruct_Count==3006 */ typedef struct { U8 dummy; /*< 0: 1> Dummy */ U8 _align0; /*< 1: 1> alignment */ U8 _align1; /*< 2: 1> alignment */ U8 _align2; /*< 3: 1> alignment */ } T_RRRRLP_DATA_CNF; #endif #ifndef __T_RRRRLP_ERROR_IND__ #define __T_RRRRLP_ERROR_IND__ /* * * CCDGEN:WriteStruct_Count==3007 */ typedef struct { U8 dummy; /*< 0: 1> Dummy */ U8 _align0; /*< 1: 1> alignment */ U8 _align1; /*< 2: 1> alignment */ U8 _align2; /*< 3: 1> alignment */ } T_RRRRLP_ERROR_IND; #endif #include "CDG_LEAVE.h" #endif