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view cdg-hybrid/sap-inline/cl_inline.h @ 629:3231dd9b38c1

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armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively, and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code for C-Sample and earlier turns them into GPIOs configured as outputs also driving 1 - so far, so good - but TI's code for BOARD 41 (which covers D-Sample, Leonardo and all real world Calypso devices derived from the latter) switches them from MCUEN to GPIOs, but then leaves them as inputs. Given that the hardware powerup state of these two pins is outputs driving 1, every Calypso board design MUST be compatible with such driving; typically these GPIO signals will be either unused and unconnected or connected as outputs driving some peripheral. Turning these pins into GPIO inputs will result in floating inputs on every reasonably-wired board, thus I am convinced that this configuration is nothing but a bug on the part of whoever wrote this code at TI. This floating input bug had already been fixed earlier for GTA modem and FCDEV3B targets; the present change makes the fix unconditional for all "classic" targets. The newly affected targets are D-Sample, Leonardo, Tango and GTM900.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 02 Jan 2020 05:38:26 +0000
parents e7a67accfad9
children
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/***
;********************************************************************************
;*** File           : cl_inline.h
;*** Creation       : Wed Mar 11 09:58:09 CST 2009
;*** XSLT Processor : Apache Software Foundation / http://xml.apache.org/xalan-j / supports XSLT-Ver: 1
;*** Copyright      : (c) Texas Instruments AG, Berlin Germany 2002
;********************************************************************************
;*** Document Type  : Service Access Point Specification
;*** Document Name  : cl
;*** Document No.   : 8010.149.04.012
;*** Document Date  : 2004-06-08
;*** Document Status: SUBMITTED
;*** Document Author: rpk
;********************************************************************************
;*** !!! THIS INCLUDE FILE WAS GENERATED AUTOMATICALLY, DO NOT MODIFY !!!
;********************************************************************************
 ***/
#ifndef _CL_INLINE_H_
#define _CL_INLINE_H_



extern  void cl_nwrl_set_sgsn_release ( U8 sgsn_rel );

extern  U8 cl_nwrl_get_sgsn_release ( void );

extern  U8 cl_qos_convert_r99_to_r97 ( T_PS_qos_r99 *src_qos_r99, T_PS_qos_r97 *dst_qos_r97 );

extern  U8 cl_qos_convert_r97_to_r99 ( T_PS_qos_r97 *src_qos_r97, T_PS_qos_r99 *dst_qos_r99 );




#endif /* !_CL_INLINE_H_ */