FreeCalypso > hg > fc-magnetite
view cdg211/cdginc/m_grlc.h @ 629:3231dd9b38c1
armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets
Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively,
and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code
for C-Sample and earlier turns them into GPIOs configured as outputs also
driving 1 - so far, so good - but TI's code for BOARD 41 (which covers
D-Sample, Leonardo and all real world Calypso devices derived from the
latter) switches them from MCUEN to GPIOs, but then leaves them as inputs.
Given that the hardware powerup state of these two pins is outputs driving 1,
every Calypso board design MUST be compatible with such driving; typically
these GPIO signals will be either unused and unconnected or connected as
outputs driving some peripheral. Turning these pins into GPIO inputs will
result in floating inputs on every reasonably-wired board, thus I am
convinced that this configuration is nothing but a bug on the part of
whoever wrote this code at TI.
This floating input bug had already been fixed earlier for GTA modem and
FCDEV3B targets; the present change makes the fix unconditional for all
"classic" targets. The newly affected targets are D-Sample, Leonardo,
Tango and GTM900.
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Thu, 02 Jan 2020 05:38:26 +0000 |
| parents | 56abf6cf8a0b |
| children |
line wrap: on
line source
/* +--------------------------------------------------------------------------+ | PROJECT : PROTOCOL STACK | | FILE : m_grlc.h | | SOURCE : "__out__\g23m_dfile\msg\grlc.mdf" | | LastModified : "2003-03-26" | | IdAndVersion : "8441.601.99.001" | | SrcFileTime : "Thu Feb 17 14:27:10 2005" | | Generated by CCDGEN_2.5.5 on Fri Jun 08 13:59:14 2007 | | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! | +--------------------------------------------------------------------------+ */ /* PRAGMAS * PREFIX : NONE * COMPATIBILITY_DEFINES : NO (require PREFIX) * ALWAYS_ENUM_IN_VAL_FILE: NO * ENABLE_GROUP: NO * CAPITALIZE_TYPENAME: NO */ #ifndef M_GRLC_H #define M_GRLC_H #define CDG_ENTER__M_GRLC_H #define CDG_ENTER__FILENAME _M_GRLC_H #define CDG_ENTER__M_GRLC_H__FILE_TYPE CDGINC #define CDG_ENTER__M_GRLC_H__LAST_MODIFIED _2003_03_26 #define CDG_ENTER__M_GRLC_H__ID_AND_VERSION _8441_601_99_001 #define CDG_ENTER__M_GRLC_H__SRC_FILE_TIME _Thu_Feb_17_14_27_10_2005 #include "CDG_ENTER.h" #undef CDG_ENTER__M_GRLC_H #undef CDG_ENTER__FILENAME #include "m_grlc.val" #include "m_rr_com.h" /* * bitbuffer structure for the element tlli_value */ #ifndef __T_BUF_tlli_value__ #define __T_BUF_tlli_value__ typedef struct { U16 l_tlli_value; U16 o_tlli_value; U8 b_tlli_value[8]; } BUF_tlli_value; /* size <12> */ #endif /* * bitbuffer structure for the element cr_tlli */ #ifndef __T_BUF_cr_tlli__ #define __T_BUF_cr_tlli__ typedef struct { U16 l_cr_tlli; U16 o_cr_tlli; U8 b_cr_tlli[8]; } BUF_cr_tlli; /* size <12> */ #endif #ifndef __T_glob_tfi__ #define __T_glob_tfi__ /* * Global TFI * CCDGEN:WriteStruct_Count==688 */ typedef struct { U8 flag; /*< 0: 1> Flag */ U8 v_ul_tfi; /*< 1: 1> valid-flag */ U8 ul_tfi; /*< 2: 1> Uplink TFI */ U8 v_dl_tfi; /*< 3: 1> valid-flag */ U8 dl_tfi; /*< 4: 1> Downlink TFI */ U8 _align0; /*< 5: 1> alignment */ U8 _align1; /*< 6: 1> alignment */ U8 _align2; /*< 7: 1> alignment */ } T_glob_tfi; #endif #ifndef __T_chan_req_des__ #define __T_chan_req_des__ /* * Channel Request Description * CCDGEN:WriteStruct_Count==689 */ typedef struct { U8 peak_thr_class; /*< 0: 1> PEAK_THROUGHPUT_CLASS */ U8 radio_prio; /*< 1: 1> RADIO_PRIORITY */ U8 rlc_mode; /*< 2: 1> RLC_MODE */ U8 llc_pdu_type; /*< 3: 1> LLC_PDU_TYPE */ U16 rlc_octet_cnt; /*< 4: 2> RLC_OCTET_COUNT */ U8 _align0; /*< 6: 1> alignment */ U8 _align1; /*< 7: 1> alignment */ } T_chan_req_des; #endif #ifndef __T_block_struct__ #define __T_block_struct__ /* * Blocks Structure * CCDGEN:WriteStruct_Count==690 */ typedef struct { U8 bl_o_bl_per; /*< 0: 1> BLOCKS_OR_BLOCK_PERIODS */ U8 a_map_len; /*< 1: 1> ALLOCATION_BITMAP_LENGTH */ U8 c_alloc_map; /*< 2: 1> counter */ U8 alloc_map[127]; /*< 3:127> ALLOCATION_BITMAP */ U8 _align0; /*<130: 1> alignment */ U8 _align1; /*<131: 1> alignment */ } T_block_struct; #endif #ifndef __T_ext_bits__ #define __T_ext_bits__ /* * Extensions Bits IE * CCDGEN:WriteStruct_Count==691 */ typedef struct { U8 ext_len; /*< 0: 1> Extension Length */ U8 c_spare_ext; /*< 1: 1> counter */ U8 spare_ext[64]; /*< 2: 64> Extension Spare Bits */ U8 _align0; /*< 66: 1> alignment */ U8 _align1; /*< 67: 1> alignment */ } T_ext_bits; #endif #ifndef __T_ilev__ #define __T_ilev__ /* * I_LEVEL Structure * CCDGEN:WriteStruct_Count==692 */ typedef struct { U8 v_ilev0; /*< 0: 1> valid-flag */ U8 ilev0; /*< 1: 1> I_LEVEL_TNO */ U8 v_ilev1; /*< 2: 1> valid-flag */ U8 ilev1; /*< 3: 1> I_LEVEL_TN1 */ U8 v_ilev2; /*< 4: 1> valid-flag */ U8 ilev2; /*< 5: 1> I_LEVEL_TN2 */ U8 v_ilev3; /*< 6: 1> valid-flag */ U8 ilev3; /*< 7: 1> I_LEVEL_TN3 */ U8 v_ilev4; /*< 8: 1> valid-flag */ U8 ilev4; /*< 9: 1> I_LEVEL_TN4 */ U8 v_ilev5; /*< 10: 1> valid-flag */ U8 ilev5; /*< 11: 1> I_LEVEL_TN5 */ U8 v_ilev6; /*< 12: 1> valid-flag */ U8 ilev6; /*< 13: 1> I_LEVEL_TN6 */ U8 v_ilev7; /*< 14: 1> valid-flag */ U8 ilev7; /*< 15: 1> I_LEVEL_TN7 */ } T_ilev; #endif #ifndef __T_chan_qual_rep__ #define __T_chan_qual_rep__ /* * Channel Quality Report * CCDGEN:WriteStruct_Count==693 */ typedef struct { U8 c_value; /*< 0: 1> C_VALUE */ U8 rxqual; /*< 1: 1> RXQUAL */ U8 signvar; /*< 2: 1> SIGN_VAR */ U8 _align0; /*< 3: 1> alignment */ T_ilev ilev; /*< 4: 16> I_LEVEL Structure */ } T_chan_qual_rep; #endif #ifndef __T_ack_nack_des__ #define __T_ack_nack_des__ /* * Ack/Nack Description * CCDGEN:WriteStruct_Count==694 */ typedef struct { U8 f_ack_ind; /*< 0: 1> FINAL_ACK_INDICATION */ U8 ssn; /*< 1: 1> STARTING_SEQUENCE_NUMBER */ U8 rbb[64]; /*< 2: 64> RECEIVE_BLOCK_BITMAP */ U8 _align0; /*< 66: 1> alignment */ U8 _align1; /*< 67: 1> alignment */ } T_ack_nack_des; #endif #ifndef __T_abs__ #define __T_abs__ /* * TBF Starting Time Absolute * CCDGEN:WriteStruct_Count==695 */ typedef struct { U8 t1; /*< 0: 1> T1' */ U8 t3; /*< 1: 1> T3 */ U8 t2; /*< 2: 1> T2 */ U8 _align0; /*< 3: 1> alignment */ } T_abs; #endif #ifndef __T_tbf_s_time__ #define __T_tbf_s_time__ /* * TBF Starting Time * CCDGEN:WriteStruct_Count==696 */ typedef struct { U8 flag; /*< 0: 1> Flag */ U8 v_rel; /*< 1: 1> valid-flag */ U16 rel; /*< 2: 2> TBF Starting Time Relative */ U8 _align0; /*< 4: 1> alignment */ U8 _align1; /*< 5: 1> alignment */ U8 _align2; /*< 6: 1> alignment */ U8 v_abs; /*< 7: 1> valid-flag */ T_abs abs; /*< 8: 4> TBF Starting Time Absolute */ } T_tbf_s_time; #endif #ifndef __T_fa_s2__ #define __T_fa_s2__ /* * FA Sub2 * CCDGEN:WriteStruct_Count==697 */ typedef struct { T_tbf_s_time tbf_s_time; /*< 0: 12> TBF Starting Time */ U8 v_ts_alloc; /*< 12: 1> valid-flag */ U8 ts_alloc; /*< 13: 1> TIMESLOT_ALLOCATION */ U8 flag; /*< 14: 1> Flag */ U8 v_block_struct; /*< 15: 1> valid-flag */ T_block_struct block_struct; /*< 16:132> Blocks Structure */ U8 v_alloc_map; /*<148: 1> valid-flag */ U8 c_alloc_map; /*<149: 1> counter */ U8 alloc_map[127]; /*<150:127> ALLOCATION_BITMAP */ U8 _align0; /*<277: 1> alignment */ U8 _align1; /*<278: 1> alignment */ U8 _align2; /*<279: 1> alignment */ } T_fa_s2; #endif #ifndef __T_f_alloc_ack__ #define __T_f_alloc_ack__ /* * Fixed Allocation Uplink Ack/Nack * CCDGEN:WriteStruct_Count==698 */ typedef struct { U8 final_alloc; /*< 0: 1> FINAL_ALLOCATION */ U8 flag; /*< 1: 1> Flag */ U8 v_ts_overr; /*< 2: 1> valid-flag */ U8 ts_overr; /*< 3: 1> TS_OVERRIDE */ U8 _align0; /*< 4: 1> alignment */ U8 _align1; /*< 5: 1> alignment */ U8 _align2; /*< 6: 1> alignment */ U8 v_fa_s2; /*< 7: 1> valid-flag */ T_fa_s2 fa_s2; /*< 8:280> FA Sub2 */ } T_f_alloc_ack; #endif #ifndef __T_gamma_tn__ #define __T_gamma_tn__ /* * Gamma Array * CCDGEN:WriteStruct_Count==699 */ typedef struct { U8 v_gamma; /*< 0: 1> valid-flag */ U8 gamma; /*< 1: 1> GAMMA_TN */ U8 _align0; /*< 2: 1> alignment */ U8 _align1; /*< 3: 1> alignment */ } T_gamma_tn; #endif #ifndef __T_pwr_par__ #define __T_pwr_par__ /* * Power Control Parameters * CCDGEN:WriteStruct_Count==700 */ typedef struct { U8 alpha; /*< 0: 1> Alpha */ U8 _align0; /*< 1: 1> alignment */ U8 _align1; /*< 2: 1> alignment */ U8 _align2; /*< 3: 1> alignment */ T_gamma_tn gamma_tn[8]; /*< 4: 32> Gamma Array */ } T_pwr_par; #endif #ifndef __T_ta_index_tn__ #define __T_ta_index_tn__ /* * TA index and timeslot structure * CCDGEN:WriteStruct_Count==701 */ typedef struct { U8 ta_index; /*< 0: 1> TA_INDEX */ U8 ta_tn; /*< 1: 1> TIMING_ADVANCE_TIMESLOT_NUMBER */ U8 _align0; /*< 2: 1> alignment */ U8 _align1; /*< 3: 1> alignment */ } T_ta_index_tn; #endif #ifndef __T_pta__ #define __T_pta__ /* * Packet Timing Advance * CCDGEN:WriteStruct_Count==702 */ typedef struct { U8 v_ta_value; /*< 0: 1> valid-flag */ U8 ta_value; /*< 1: 1> TIMING_ADVANCE_VALUE */ U8 _align0; /*< 2: 1> alignment */ U8 v_ta_index_tn; /*< 3: 1> valid-flag */ T_ta_index_tn ta_index_tn; /*< 4: 4> TA index and timeslot structure */ } T_pta; #endif /* * End of substructure section, begin of message definition section */ #ifndef __T_U_GRLC_RESOURCE_REQ__ #define __T_U_GRLC_RESOURCE_REQ__ /* * * CCDGEN:WriteStruct_Count==703 */ typedef struct { U8 msg_type; /*< 0: 1> Message Type */ U8 v_access_type; /*< 1: 1> valid-flag */ U8 access_type; /*< 2: 1> Access Type */ U8 flag; /*< 3: 1> Flag */ U8 _align0; /*< 4: 1> alignment */ U8 _align1; /*< 5: 1> alignment */ U8 _align2; /*< 6: 1> alignment */ U8 v_glob_tfi; /*< 7: 1> valid-flag */ T_glob_tfi glob_tfi; /*< 8: 8> Global TFI */ U8 _align3; /*< 16: 1> alignment */ U8 _align4; /*< 17: 1> alignment */ U8 _align5; /*< 18: 1> alignment */ U8 v_tlli_value; /*< 19: 1> valid-flag */ BUF_tlli_value tlli_value; /*< 20: 12> TLLI */ U8 _align6; /*< 32: 1> alignment */ U8 _align7; /*< 33: 1> alignment */ U8 _align8; /*< 34: 1> alignment */ U8 v_ra_cap; /*< 35: 1> valid-flag */ T_ra_cap ra_cap; /*< 36: 84> MS RA capability value part (type defined in "m_rr_com.h") */ T_chan_req_des chan_req_des; /*<120: 8> Channel Request Description */ U8 v_ma_ch_mark; /*<128: 1> valid-flag */ U8 ma_ch_mark; /*<129: 1> MA_CHANGE_MARK */ U8 c_value; /*<130: 1> C_VALUE */ U8 v_signvar; /*<131: 1> valid-flag */ U8 signvar; /*<132: 1> SIGN_VAR */ U8 _align9; /*<133: 1> alignment */ U8 _align10; /*<134: 1> alignment */ U8 _align11; /*<135: 1> alignment */ T_ilev ilev; /*<136: 16> I_LEVEL Structure */ } T_U_GRLC_RESOURCE_REQ; #endif #ifndef __T_U_GRLC_DL_ACK__ #define __T_U_GRLC_DL_ACK__ /* * * CCDGEN:WriteStruct_Count==704 */ typedef struct { U8 msg_type; /*< 0: 1> Message Type */ U8 dl_tfi; /*< 1: 1> Downlink TFI */ U8 _align0; /*< 2: 1> alignment */ U8 _align1; /*< 3: 1> alignment */ T_ack_nack_des ack_nack_des; /*< 4: 68> Ack/Nack Description */ U8 _align2; /*< 72: 1> alignment */ U8 _align3; /*< 73: 1> alignment */ U8 _align4; /*< 74: 1> alignment */ U8 v_chan_req_des; /*< 75: 1> valid-flag */ T_chan_req_des chan_req_des; /*< 76: 8> Channel Request Description */ T_chan_qual_rep chan_qual_rep; /*< 84: 20> Channel Quality Report */ } T_U_GRLC_DL_ACK; #endif #ifndef __T_D_GRLC_UL_ACK__ #define __T_D_GRLC_UL_ACK__ /* * * CCDGEN:WriteStruct_Count==705 */ typedef struct { U8 msg_type; /*< 0: 1> Message Type */ U8 page_mode; /*< 1: 1> Page Mode */ U8 ul_tfi; /*< 2: 1> Uplink TFI */ U8 chan_coding_cmd; /*< 3: 1> CHANNEL_CODING_COMMAND */ T_ack_nack_des ack_nack_des; /*< 4: 68> Ack/Nack Description */ U8 _align0; /*< 72: 1> alignment */ U8 _align1; /*< 73: 1> alignment */ U8 _align2; /*< 74: 1> alignment */ U8 v_cr_tlli; /*< 75: 1> valid-flag */ BUF_cr_tlli cr_tlli; /*< 76: 12> CONTENTION_RESOLUTION_TLLI */ U8 _align3; /*< 88: 1> alignment */ U8 _align4; /*< 89: 1> alignment */ U8 _align5; /*< 90: 1> alignment */ U8 v_pta; /*< 91: 1> valid-flag */ T_pta pta; /*< 92: 8> Packet Timing Advance */ U8 _align6; /*<100: 1> alignment */ U8 _align7; /*<101: 1> alignment */ U8 _align8; /*<102: 1> alignment */ U8 v_pwr_par; /*<103: 1> valid-flag */ T_pwr_par pwr_par; /*<104: 36> Power Control Parameters */ U8 _align9; /*<140: 1> alignment */ U8 _align10; /*<141: 1> alignment */ U8 _align11; /*<142: 1> alignment */ U8 v_ext_bits; /*<143: 1> valid-flag */ T_ext_bits ext_bits; /*<144: 68> Extensions Bits IE */ U8 _align12; /*<212: 1> alignment */ U8 _align13; /*<213: 1> alignment */ U8 _align14; /*<214: 1> alignment */ U8 v_f_alloc_ack; /*<215: 1> valid-flag */ T_f_alloc_ack f_alloc_ack; /*<216:288> Fixed Allocation Uplink Ack/Nack */ } T_D_GRLC_UL_ACK; #endif #ifndef __T_U_GRLC_CTRL_ACK__ #define __T_U_GRLC_CTRL_ACK__ /* * * CCDGEN:WriteStruct_Count==706 */ typedef struct { U8 msg_type; /*< 0: 1> Message Type */ U8 _align0; /*< 1: 1> alignment */ U8 _align1; /*< 2: 1> alignment */ U8 _align2; /*< 3: 1> alignment */ BUF_tlli_value tlli_value; /*< 4: 12> TLLI */ U8 pctrl_ack; /*< 16: 1> P_CONTROL_ACK */ U8 _align3; /*< 17: 1> alignment */ U8 _align4; /*< 18: 1> alignment */ U8 _align5; /*< 19: 1> alignment */ } T_U_GRLC_CTRL_ACK; #endif #ifndef __T_U_GRLC_UL_DUMMY__ #define __T_U_GRLC_UL_DUMMY__ /* * * CCDGEN:WriteStruct_Count==707 */ typedef struct { U8 msg_type; /*< 0: 1> Message Type */ U8 _align0; /*< 1: 1> alignment */ U8 _align1; /*< 2: 1> alignment */ U8 _align2; /*< 3: 1> alignment */ BUF_tlli_value tlli_value; /*< 4: 12> TLLI */ } T_U_GRLC_UL_DUMMY; #endif #include "CDG_LEAVE.h" #endif