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armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively, and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code for C-Sample and earlier turns them into GPIOs configured as outputs also driving 1 - so far, so good - but TI's code for BOARD 41 (which covers D-Sample, Leonardo and all real world Calypso devices derived from the latter) switches them from MCUEN to GPIOs, but then leaves them as inputs. Given that the hardware powerup state of these two pins is outputs driving 1, every Calypso board design MUST be compatible with such driving; typically these GPIO signals will be either unused and unconnected or connected as outputs driving some peripheral. Turning these pins into GPIO inputs will result in floating inputs on every reasonably-wired board, thus I am convinced that this configuration is nothing but a bug on the part of whoever wrote this code at TI. This floating input bug had already been fixed earlier for GTA modem and FCDEV3B targets; the present change makes the fix unconditional for all "classic" targets. The newly affected targets are D-Sample, Leonardo, Tango and GTM900.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 02 Jan 2020 05:38:26 +0000
parents 56abf6cf8a0b
children
line wrap: on
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/*
+--------------------------------------------------------------------------+
| PROJECT : PROTOCOL STACK                                                 |
| FILE    : p_dl.val                                                       |
| SOURCE  : "__out__\g23m_dfile\prim\dl.pdf"                               |
| LastModified : "2004-04-28"                                              |
| IdAndVersion : "8010.100.02.010"                                         |
| SrcFileTime  : "Wed Jun 23 09:49:58 2004"                                |
| Generated by CCDGEN_2.5.5 on Fri Jun 08 13:59:15 2007                    |
|           !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!!                |
+--------------------------------------------------------------------------+
*/

/* PRAGMAS
 * PREFIX                 : DL
 * COMPATIBILITY_DEFINES  : NO
 * ALWAYS_ENUM_IN_VAL_FILE: YES
 * ENABLE_GROUP: NO
 * CAPITALIZE_TYPENAME: NO
 */


#ifndef P_DL_VAL
#define P_DL_VAL


#define CDG_ENTER__P_DL_VAL

#define CDG_ENTER__FILENAME _P_DL_VAL
#define CDG_ENTER__P_DL_VAL__FILE_TYPE CDGINC
#define CDG_ENTER__P_DL_VAL__LAST_MODIFIED _2004_04_28
#define CDG_ENTER__P_DL_VAL__ID_AND_VERSION _8010_100_02_010

#define CDG_ENTER__P_DL_VAL__SRC_FILE_TIME _Wed_Jun_23_09_49_58_2004

#include "CDG_ENTER.h"

#undef CDG_ENTER__P_DL_VAL

#undef CDG_ENTER__FILENAME

/* #include "p_8010_147_l1_include.val" */   /* Access values independent from the corresponding h-file. */

/* #include "p_8010_152_ps_include.val" */   /* Access values independent from the corresponding h-file. */

/* #include "p_8010_153_cause_include.val" */   /* Access values independent from the corresponding h-file. */


// VALTAB-FF: !TI_DUAL_MODE 
/*
 * Enum to value table VAL_l2_channel
 * CCDGEN:WriteEnum_Count==74
 */
#ifndef __T_DL_VAL_l2_channel__
#define __T_DL_VAL_l2_channel__
typedef enum
{
  DL_L2_CHANNEL_SACCH            = 0x1,           /* SACCH block                    */
  DL_L2_CHANNEL_SDCCH            = 0x2,           /* SDCCH block                    */
  DL_L2_CHANNEL_FACCH_H          = 0x3,           /* FACCH halfrate block           */
  DL_L2_CHANNEL_FACCH_F          = 0x4,           /* FACCH fullrate block           */
  DL_L2_CHANNEL_CCCH             = 0x5,           /* CCCH block                     */
  DL_L2_CHANNEL_NBCCH            = 0x6,           /* normal BCCH block              */
  DL_L2_CHANNEL_PCH              = 0x7,           /* PCH block                      */
  DL_L2_CHANNEL_EPCH             = 0x8,           /* extended PCH block             */
  DL_L2_CHANNEL_CBCH             = 0x9,           /* CBCH block                     */
  DL_L2_CHANNEL_EBCCH            = 0xa            /* extended BCCH                  */
}T_DL_VAL_l2_channel;
#endif

/*
 * Enum to value table VAL_sapi
 * CCDGEN:WriteEnum_Count==75
 */
#ifndef __T_DL_VAL_sapi__
#define __T_DL_VAL_sapi__
typedef enum
{
// VAL-FF: !TI_DUAL_MODE  
  DL_SAPI_0                      = 0x0,           /* SAPI 0                         */
// VAL-FF: !TI_DUAL_MODE  
  DL_SAPI_3                      = 0x3            /* SAPI 3                         */
}T_DL_VAL_sapi;
#endif

/*
 * Enum to value table VAL_indication
 * CCDGEN:WriteEnum_Count==76
 */
#ifndef __T_DL_VAL_indication__
#define __T_DL_VAL_indication__
typedef enum
{
  DL_ALL_DONE                    = 0x0,           /* no unacknowledges or unserved data requests */
  DL_UNSERVED                    = 0x1            /* unserved data requests         */
}T_DL_VAL_indication;
#endif

/*
 * Enum to value table VAL_mode
 * CCDGEN:WriteEnum_Count==77
 */
#ifndef __T_DL_VAL_mode__
#define __T_DL_VAL_mode__
typedef enum
{
  DL_NORMAL_RELEASE              = 0x0,           /* normal release procedure       */
  DL_LOCAL_END_RELEASE           = 0x1            /* local end release procedure    */
}T_DL_VAL_mode;
#endif

/*
 * Enum to value table VAL_cnf
 * CCDGEN:WriteEnum_Count==78
 */
#ifndef __T_DL_VAL_cnf__
#define __T_DL_VAL_cnf__
typedef enum
{
  DL_NO_CONFIRMATION             = 0x0            /* no confimation necessary       */
}T_DL_VAL_cnf;
#endif

/*
 * Enum to value table VAL_cs
 * CCDGEN:WriteEnum_Count==79
 */
#ifndef __T_DL_VAL_cs__
#define __T_DL_VAL_cs__
typedef enum
{
// VAL-FF: !TI_DUAL_MODE  
  DL_INFO_FIELD_MISMATCH         = 0x0            /* different information fields   */
}T_DL_VAL_cs;
#endif

/*
 * user defined constants
 */
#define DL_MAX_SDU_LEN                 (0x1)      
#define DL_N201_SACCH_A_B              (0x12)     
#define DL_N201_DCCH_A_B               (0x14)     
#define DL_N201_Bbis                   (0x17)     
#define DL_N201_SACCH_Bter             (0x15)     
#define DL_N201_DCCH_Bter              (0x17)     
#define DL_MAX_L2_FRAME_SIZE           (0x17)     

#include "CDG_LEAVE.h"


#endif