FreeCalypso > hg > fc-magnetite
view cdg211/cdginc/p_l1test.h @ 629:3231dd9b38c1
armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets
Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively,
and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code
for C-Sample and earlier turns them into GPIOs configured as outputs also
driving 1 - so far, so good - but TI's code for BOARD 41 (which covers
D-Sample, Leonardo and all real world Calypso devices derived from the
latter) switches them from MCUEN to GPIOs, but then leaves them as inputs.
Given that the hardware powerup state of these two pins is outputs driving 1,
every Calypso board design MUST be compatible with such driving; typically
these GPIO signals will be either unused and unconnected or connected as
outputs driving some peripheral. Turning these pins into GPIO inputs will
result in floating inputs on every reasonably-wired board, thus I am
convinced that this configuration is nothing but a bug on the part of
whoever wrote this code at TI.
This floating input bug had already been fixed earlier for GTA modem and
FCDEV3B targets; the present change makes the fix unconditional for all
"classic" targets. The newly affected targets are D-Sample, Leonardo,
Tango and GTM900.
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Thu, 02 Jan 2020 05:38:26 +0000 |
| parents | 56abf6cf8a0b |
| children |
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/* +--------------------------------------------------------------------------+ | PROJECT : PROTOCOL STACK | | FILE : p_l1test.h | | SOURCE : "__out__\g23m_dfile\prim\l1test.pdf" | | LastModified : "2003-06-06" | | IdAndVersion : "8010.148.03.003" | | SrcFileTime : "Fri Dec 19 14:04:50 2003" | | Generated by CCDGEN_2.5.5 on Fri Jun 08 13:59:15 2007 | | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! | +--------------------------------------------------------------------------+ */ /* PRAGMAS * PREFIX : L1TEST * COMPATIBILITY_DEFINES : NO * ALWAYS_ENUM_IN_VAL_FILE: NO * ENABLE_GROUP: NO * CAPITALIZE_TYPENAME: NO */ #ifndef P_L1TEST_H #define P_L1TEST_H #define CDG_ENTER__P_L1TEST_H #define CDG_ENTER__FILENAME _P_L1TEST_H #define CDG_ENTER__P_L1TEST_H__FILE_TYPE CDGINC #define CDG_ENTER__P_L1TEST_H__LAST_MODIFIED _2003_06_06 #define CDG_ENTER__P_L1TEST_H__ID_AND_VERSION _8010_148_03_003 #define CDG_ENTER__P_L1TEST_H__SRC_FILE_TIME _Fri_Dec_19_14_04_50_2003 #include "CDG_ENTER.h" #undef CDG_ENTER__P_L1TEST_H #undef CDG_ENTER__FILENAME #include "p_l1test.val" #include "p_mphc.h" #include "p_mac.h" /* * End of substructure section, begin of primitive definition section */ #ifndef __T_L1TEST_CALL_MPHC_READ_DCCH__ #define __T_L1TEST_CALL_MPHC_READ_DCCH__ /* * * CCDGEN:WriteStruct_Count==1249 */ typedef struct { U8 chn_mode; /*< 0: 1> Channel mode */ U8 _align0; /*< 1: 1> alignment */ U8 _align1; /*< 2: 1> alignment */ U8 _align2; /*< 3: 1> alignment */ } T_L1TEST_CALL_MPHC_READ_DCCH; #endif #ifndef __T_L1TEST_RETURN_MPHC_READ_DCCH__ #define __T_L1TEST_RETURN_MPHC_READ_DCCH__ /* * * CCDGEN:WriteStruct_Count==1250 */ typedef struct { T_l2_frame l2_frame; /*< 0: 24> layer 2 frame (type defined in "p_mphc.h") */ } T_L1TEST_RETURN_MPHC_READ_DCCH; #endif #ifndef __T_L1TEST_CALL_MPHC_DCCH_DOWNLINK__ #define __T_L1TEST_CALL_MPHC_DCCH_DOWNLINK__ /* * * CCDGEN:WriteStruct_Count==1251 */ typedef struct { T_l2_frame l2_frame; /*< 0: 24> layer 2 frame (type defined in "p_mphc.h") */ U8 valid_flag; /*< 24: 1> Valid flag for received data */ U8 _align0; /*< 25: 1> alignment */ U8 _align1; /*< 26: 1> alignment */ U8 _align2; /*< 27: 1> alignment */ } T_L1TEST_CALL_MPHC_DCCH_DOWNLINK; #endif #ifndef __T_L1TEST_RETURN_MPHC_DCCH_DOWNLINK__ #define __T_L1TEST_RETURN_MPHC_DCCH_DOWNLINK__ /* * * CCDGEN:WriteStruct_Count==1252 */ typedef struct { U8 dummy; /*< 0: 1> no parameters */ } T_L1TEST_RETURN_MPHC_DCCH_DOWNLINK; #endif #ifndef __T_L1TEST_CALL_MPHC_DATA_UL__ #define __T_L1TEST_CALL_MPHC_DATA_UL__ /* * * CCDGEN:WriteStruct_Count==1253 */ typedef struct { U8 dummy; /*< 0: 1> no parameters */ } T_L1TEST_CALL_MPHC_DATA_UL; #endif #ifndef __T_L1TEST_RETURN_MPHC_DATA_UL__ #define __T_L1TEST_RETURN_MPHC_DATA_UL__ /* * * CCDGEN:WriteStruct_Count==1254 */ typedef struct { T_l2_frame l2_frame; /*< 0: 24> layer 2 frame (type defined in "p_mphc.h") */ U16 d_ra_conf; /*< 24: 2> Traffic control register */ U16 d_ra_act; /*< 26: 2> Activity word */ U16 d_ra_statu; /*< 28: 2> Rate adaptation status word for uplink */ U16 d_fax; /*< 30: 2> Fax status and parameter word */ } T_L1TEST_RETURN_MPHC_DATA_UL; #endif #ifndef __T_L1TEST_CALL_MPHC_DATA_DL__ #define __T_L1TEST_CALL_MPHC_DATA_DL__ /* * * CCDGEN:WriteStruct_Count==1255 */ typedef struct { T_l2_frame l2_frame; /*< 0: 24> layer 2 frame (type defined in "p_mphc.h") */ U16 d_ra_act; /*< 24: 2> Activity word */ U16 d_ra_statd; /*< 26: 2> Rate adaptation status word for downlink */ } T_L1TEST_CALL_MPHC_DATA_DL; #endif #ifndef __T_L1TEST_RETURN_MPHC_DATA_DL__ #define __T_L1TEST_RETURN_MPHC_DATA_DL__ /* * * CCDGEN:WriteStruct_Count==1256 */ typedef struct { U8 dummy; /*< 0: 1> no parameters */ } T_L1TEST_RETURN_MPHC_DATA_DL; #endif #ifndef __T_L1TEST_CALL_MPHP_POWER_CONTROL__ #define __T_L1TEST_CALL_MPHP_POWER_CONTROL__ /* * * CCDGEN:WriteStruct_Count==1257 */ typedef struct { U8 assignment_id; /*< 0: 1> Assignment Id */ U8 crc_error; /*< 1: 1> CRC error */ S8 bcch_level; /*< 2: 1> BCCH level */ U8 _align0; /*< 3: 1> alignment */ U16 radio_freq[L1TEST_BURST_PER_BLOCK]; /*< 4: 8> Radio frequency */ S8 burst_level[L1TEST_BURST_PER_BLOCK]; /*< 12: 4> Burst level */ } T_L1TEST_CALL_MPHP_POWER_CONTROL; #endif #ifndef __T_L1TEST_RETURN_MPHP_POWER_CONTROL__ #define __T_L1TEST_RETURN_MPHP_POWER_CONTROL__ /* * * CCDGEN:WriteStruct_Count==1258 */ typedef struct { U8 pch[L1TEST_MAX_TIMESLOTS]; /*< 0: 8> PCH */ } T_L1TEST_RETURN_MPHP_POWER_CONTROL; #endif #ifndef __T_L1TEST_CALL_MPHP_UPLINK__ #define __T_L1TEST_CALL_MPHP_UPLINK__ /* * * CCDGEN:WriteStruct_Count==1259 */ typedef struct { U8 assignment_id; /*< 0: 1> Assignment Id */ U8 tx_data_no; /*< 1: 1> Tx data number */ U8 _align0; /*< 2: 1> alignment */ U8 _align1; /*< 3: 1> alignment */ U32 fn; /*< 4: 4> Frame number */ U8 timing_advance_value; /*< 8: 1> Timing advance value */ U8 allocation_exhausted; /*< 9: 1> Allocation exhausted */ U8 _align2; /*< 10: 1> alignment */ U8 _align3; /*< 11: 1> alignment */ } T_L1TEST_CALL_MPHP_UPLINK; #endif #ifndef __T_L1TEST_RETURN_MPHP_UPLINK__ #define __T_L1TEST_RETURN_MPHP_UPLINK__ /* * * CCDGEN:WriteStruct_Count==1260 */ typedef struct { T_ul_poll_resp ul_poll_resp[4]; /*< 0:128> Uplink Poll Response (type defined in "p_mac.h") */ T_ul_data ul_data[4]; /*<128:240> Uplink Data (type defined in "p_mac.h") */ } T_L1TEST_RETURN_MPHP_UPLINK; #endif #ifndef __T_L1TEST_CALL_MPHP_DOWNLINK__ #define __T_L1TEST_CALL_MPHP_DOWNLINK__ /* * * CCDGEN:WriteStruct_Count==1261 */ typedef struct { U8 assignment_id; /*< 0: 1> Assignment Id */ U8 _align0; /*< 1: 1> alignment */ U8 _align1; /*< 2: 1> alignment */ U8 _align2; /*< 3: 1> alignment */ U32 fn; /*< 4: 4> Frame number */ U8 _align3; /*< 8: 1> alignment */ U8 _align4; /*< 9: 1> alignment */ U8 _align5; /*< 10: 1> alignment */ U8 c_dl_data; /*< 11: 1> counter */ T_dl_data dl_data[4]; /*< 12:256> Downlink Data (type defined in "p_mac.h") */ U8 rlc_blocks_sent; /*<268: 1> RLC blocks sent */ U8 last_poll_response; /*<269: 1> Last poll response */ U8 _align6; /*<270: 1> alignment */ U8 _align7; /*<271: 1> alignment */ } T_L1TEST_CALL_MPHP_DOWNLINK; #endif #ifndef __T_L1TEST_RETURN_MPHP_DOWNLINK__ #define __T_L1TEST_RETURN_MPHP_DOWNLINK__ /* * * CCDGEN:WriteStruct_Count==1262 */ typedef struct { U8 dummy; /*< 0: 1> no parameters */ } T_L1TEST_RETURN_MPHP_DOWNLINK; #endif #include "CDG_LEAVE.h" #endif