view cdg211/cdginc/p_rrlc.val @ 629:3231dd9b38c1

armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively, and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code for C-Sample and earlier turns them into GPIOs configured as outputs also driving 1 - so far, so good - but TI's code for BOARD 41 (which covers D-Sample, Leonardo and all real world Calypso devices derived from the latter) switches them from MCUEN to GPIOs, but then leaves them as inputs. Given that the hardware powerup state of these two pins is outputs driving 1, every Calypso board design MUST be compatible with such driving; typically these GPIO signals will be either unused and unconnected or connected as outputs driving some peripheral. Turning these pins into GPIO inputs will result in floating inputs on every reasonably-wired board, thus I am convinced that this configuration is nothing but a bug on the part of whoever wrote this code at TI. This floating input bug had already been fixed earlier for GTA modem and FCDEV3B targets; the present change makes the fix unconditional for all "classic" targets. The newly affected targets are D-Sample, Leonardo, Tango and GTM900.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 02 Jan 2020 05:38:26 +0000
parents 56abf6cf8a0b
children
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/*
+--------------------------------------------------------------------------+
| PROJECT : PROTOCOL STACK                                                 |
| FILE    : p_rrlc.val                                                     |
| SOURCE  : "__out__\g23m_dfile\prim\rrlc.pdf"                             |
| LastModified : "2002-10-11"                                              |
| IdAndVersion : "8443.101.02.008"                                         |
| SrcFileTime  : "Mon Nov 24 15:49:52 2003"                                |
| Generated by CCDGEN_2.5.5 on Fri Jun 08 13:59:16 2007                    |
|           !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!!                |
+--------------------------------------------------------------------------+
*/

/* PRAGMAS
 * PREFIX                 : NONE
 * COMPATIBILITY_DEFINES  : NO (require PREFIX)
 * ALWAYS_ENUM_IN_VAL_FILE: NO
 * ENABLE_GROUP: NO
 * CAPITALIZE_TYPENAME: NO
 */


#ifndef P_RRLC_VAL
#define P_RRLC_VAL


#define CDG_ENTER__P_RRLC_VAL

#define CDG_ENTER__FILENAME _P_RRLC_VAL
#define CDG_ENTER__P_RRLC_VAL__FILE_TYPE CDGINC
#define CDG_ENTER__P_RRLC_VAL__LAST_MODIFIED _2002_10_11
#define CDG_ENTER__P_RRLC_VAL__ID_AND_VERSION _8443_101_02_008

#define CDG_ENTER__P_RRLC_VAL__SRC_FILE_TIME _Mon_Nov_24_15_49_52_2003

#include "CDG_ENTER.h"

#undef CDG_ENTER__P_RRLC_VAL

#undef CDG_ENTER__FILENAME


/*
 * Value constants for VAL_cause
 */
#define LCS_OK                         (0x0)      /* no error                       */
#define LCS_WRONG_BTS                  (0xa)      /* Serving Cell BTS differs from Reference BTS */
#define LCS_HANDOVER                   (0x14)     /* handover occured during Position Measurement procedure */

/*
 * Value constants for VAL_sb_flag
 */
#define EOTD_INVALID                   (0x0)      /* invalid data                   */
#define EOTD_VALID                     (0x1)      /* valid data                     */

/*
 * Value constants for VAL_eotd_mode
 */
#define EOTD_IDLE                      (0x0)      /* Idle mode                      */
#define EOTD_DEDIC                     (0x1)      /* Dedicated or packet mode       */

/*
 * Value constants for VAL_exp_otd
 */

/*
 * Value constants for VAL_fn
 */
#define FNMAX                          (0x297000) /* max Frame Number + 1 (26*51*2048) */

/*
 * Value constants for VAL_mfrm_offset
 */

/*
 * Value constants for VAL_otd_type
 */
#define ROUGH_RTD                      (0x0)      /* only rough RTD has been provided by the NW */
#define EXPECTED_OTD                   (0x1)      /* only expectedOTD has been provided by the NW */
#define BOTH_OTD                       (0x2)      /* Both OTD / RTD types have been provided by the NW */

/*
 * Value constants for VAL_rough_rtd
 */

/*
 * Value constants for VAL_tav
 */
#define TA_NOT_AVAIL                   (0xff)     /* no Timing Advance in Idle Mode */

/*
 * Value constants for VAL_uncertainty
 */
#define UNC_MAX_2BIT                   (0x0)      /* uncertainty in bits. 0 - 2 bits */
#define UNC_MAX_4BIT                   (0x1)      /* uncertainty in bits. 3 - 4 bits */
#define UNC_MAX_8BIT                   (0x2)      /* uncertainty in bits. 5 - 8 bits */
#define UNC_MAX_12BIT                  (0x3)      /* uncertainty in bits. 9 - 12 bits */
#define UNC_MAX_16BIT                  (0x4)      /* uncertainty in bits. 13 - 16 bits */
#define UNC_MAX_22BIT                  (0x5)      /* uncertainty in bits. 17 - 22 bits */
#define UNC_MAX_30BIT                  (0x6)      /* uncertainty in bits. 23 - 30 bits */
#define UNC_GT_30BIT                   (0x7)      /* uncertainty in bits.  > 30 bits */

/*
 * user defined constants
 */
#define MAX_NCELL_EOTD_L1              (0xc)      
#define MAX_NCELL_EOTD                 (0xf)      
#define MAX_NCELL_EOTD_SI              (0x20)     
#define XCOR_NO                        (0x12)     

#include "CDG_LEAVE.h"


#endif