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armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively, and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code for C-Sample and earlier turns them into GPIOs configured as outputs also driving 1 - so far, so good - but TI's code for BOARD 41 (which covers D-Sample, Leonardo and all real world Calypso devices derived from the latter) switches them from MCUEN to GPIOs, but then leaves them as inputs. Given that the hardware powerup state of these two pins is outputs driving 1, every Calypso board design MUST be compatible with such driving; typically these GPIO signals will be either unused and unconnected or connected as outputs driving some peripheral. Turning these pins into GPIO inputs will result in floating inputs on every reasonably-wired board, thus I am convinced that this configuration is nothing but a bug on the part of whoever wrote this code at TI. This floating input bug had already been fixed earlier for GTA modem and FCDEV3B targets; the present change makes the fix unconditional for all "classic" targets. The newly affected targets are D-Sample, Leonardo, Tango and GTM900.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 02 Jan 2020 05:38:26 +0000
parents c15047b3d00d
children
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;********************************************************************************
;*** File           : mmss.pdf
;*** Creation       : Wed Mar 11 09:58:23 CST 2009
;*** XSLT Processor : Apache Software Foundation / http://xml.apache.org/xalan-j / supports XSLT-Ver: 1
;*** Copyright      : (c) Texas Instruments AG, Berlin Germany 2002
;********************************************************************************
;*** Document Type  : Service Access Point Specification
;*** Document Name  : mmss
;*** Document No.   : 6147.105.97.102
;*** Document Date  : 2002-07-19
;*** Document Status: BEING_PROCESSED
;*** Document Author: HM
;********************************************************************************



PRAGMA 	SRC_FILE_TIME 	"Thu Nov 29 09:47:24 2007"
PRAGMA 	LAST_MODIFIED 	"2002-07-19"
PRAGMA 	ID_AND_VERSION 	"6147.105.97.102"



CONST 	MAX_SDU_LEN 	1 	; maximum service data unit length



VALTAB 	VAL_ti
VAL 	0 - 6 	"ms originated transaction"
VAL 	8 - 14 	"ms originated transaction"
VAL 	7 	TI_RES_MO 	"reserved"
VAL 	15 	TI_RES_MT 	"reserved"




VAR 	cause 	"MM cause" 	S


VAR 	l_buf 	"length in bits" 	S


VAR 	o_buf 	"offset in bits" 	S


VAR 	buf 	"bit buffer" 	B


VAR 	ti 	"transaction identifier" 	B

VAL 	@p_mmss - VAL_ti@ 	

VAR 	d1 	"dummy, not used" 	B


VAR 	d2 	"dummy, not used" 	B





COMP 	sdu 	 "Service Data Unit"
{
 	l_buf 	 ; length in bits
 	o_buf 	 ; offset in bits
 	buf 	[MAX_SDU_LEN] 	 ; bit buffer
}






; MMSS_ESTABLISH_REQ 	0x80000008
; MMSS_RELEASE_REQ 	0x80010008
; MMSS_DATA_REQ 	0x80020008
; MMSS_DATA_IND 	0x80004008
; MMSS_ERROR_IND 	0x80014008
; MMSS_ESTABLISH_CNF 	0x80024008
; MMSS_ESTABLISH_IND 	0x80034008
; MMSS_RELEASE_IND 	0x80044008



PRIM 	MMSS_ESTABLISH_REQ 	0x80000008
{
 	ti 	 ; transaction identifier
}






PRIM 	MMSS_RELEASE_REQ 	0x80010008
{
 	ti 	 ; transaction identifier
}






PRIM 	MMSS_DATA_REQ 	0x80020008
{
 	d1 	 ; dummy
 	d2 	 ; dummy
 	sdu 	 ; service data unit
}






PRIM 	MMSS_DATA_IND 	0x80004008
{
 	d1 	 ; dummy
 	d2 	 ; dummy
 	sdu 	 ; service data unit
}






PRIM 	MMSS_ERROR_IND 	0x80014008
{
 	ti 	 ; transaction identifier
 	cause 	 ; error cause
}






PRIM 	MMSS_ESTABLISH_CNF 	0x80024008
{
 	ti 	 ; transaction identifier
}






PRIM 	MMSS_ESTABLISH_IND 	0x80034008
{
 	d1 	 ; dummy
 	d2 	 ; dummy
 	sdu 	 ; service data unit
}






PRIM 	MMSS_RELEASE_IND 	0x80044008
{
 	ti 	 ; transaction identifier
 	cause 	 ; release cause
}