view cfg-headers/fax-and-data/l1sw.cfg @ 629:3231dd9b38c1

armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively, and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code for C-Sample and earlier turns them into GPIOs configured as outputs also driving 1 - so far, so good - but TI's code for BOARD 41 (which covers D-Sample, Leonardo and all real world Calypso devices derived from the latter) switches them from MCUEN to GPIOs, but then leaves them as inputs. Given that the hardware powerup state of these two pins is outputs driving 1, every Calypso board design MUST be compatible with such driving; typically these GPIO signals will be either unused and unconnected or connected as outputs driving some peripheral. Turning these pins into GPIO inputs will result in floating inputs on every reasonably-wired board, thus I am convinced that this configuration is nothing but a bug on the part of whoever wrote this code at TI. This floating input bug had already been fixed earlier for GTA modem and FCDEV3B targets; the present change makes the fix unconditional for all "classic" targets. The newly affected targets are D-Sample, Leonardo, Tango and GTM900.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 02 Jan 2020 05:38:26 +0000
parents 84d81d34efa2
children
line wrap: on
line source

#ifndef __L1SW_CFG__
#define __L1SW_CFG__
#define AMR 1
#define CUST 0
#define DCO_ALGO 0
#define IDS 1
#define L1_12NEIGH 1
#define L1_EOTD 0
#define L1_EOTD_QBIT_ACC 0
#define L1_GPRS 0
#define L1_GTT 0
#define L1_MIDI 0
#define L1_VOICE_MEMO_AMR 1
#define MELODY_E2 1
#define OP_L1_STANDALONE 0
#define OP_RIV_AUDIO 1
#define ORDER2_TX_TEMP_CAL 1
#define RAZ_VULSWITCH_REGAUDIO 0
#define SECURITY 0
#define SPEECH_RECO 1
#define TESTMODE 1
#define TRACE_TYPE 4
#define VCXO_ALGO 1
#endif /* __L1SW_CFG__ */