armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively, and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code for C-Sample and earlier turns them into GPIOs configured as outputs also driving 1 - so far, so good - but TI's code for BOARD 41 (which covers D-Sample, Leonardo and all real world Calypso devices derived from the latter) switches them from MCUEN to GPIOs, but then leaves them as inputs. Given that the hardware powerup state of these two pins is outputs driving 1, every Calypso board design MUST be compatible with such driving; typically these GPIO signals will be either unused and unconnected or connected as outputs driving some peripheral. Turning these pins into GPIO inputs will result in floating inputs on every reasonably-wired board, thus I am convinced that this configuration is nothing but a bug on the part of whoever wrote this code at TI. This floating input bug had already been fixed earlier for GTA modem and FCDEV3B targets; the present change makes the fix unconditional for all "classic" targets. The newly affected targets are D-Sample, Leonardo, Tango and GTM900.

/************* Revision Controle System Header *************
 *                  GSM Layer 1 software
 * L1_DYN_DWL_SIGNA.H
 *
 *        Filename l1_dyn_dwl_signa.h
 *  Copyright 2004 (C) Texas Instruments
 *
 ************* Revision Controle System Header *************/
#if (L1_DYN_DSP_DWNLD == 1)

#ifndef _L1_DYN_DWL_SIGNA_H_
#define _L1_DYN_DWL_SIGNA_H_

#define P_DYN_DWNLD 0x41

// Messages L1S -> L1A
#define L1_DYN_DWNLD_STOP_CON              ( ( P_DYN_DWNLD << 8 ) | 0x02 )

// Messages API HISR -> L1A  //
#define API_L1_DYN_DWNLD_START_CON         ( ( P_DYN_DWNLD << 8 ) | 0x03 )
#define API_L1_DYN_DWNLD_FINISHED          ( ( P_DYN_DWNLD << 8 ) | 0x04 )
#define API_L1_DYN_DWNLD_STOP              ( ( P_DYN_DWNLD << 8 ) | 0x05 )
#define API_L1_CRC_NOT_OK                  ( ( P_DYN_DWNLD << 8 ) | 0x07 )
#define API_L1_CRC_OK                      ( ( P_DYN_DWNLD << 8 ) | 0x08 )
#define API_L1_DYN_DWNLD_UNINST_OK         ( ( P_DYN_DWNLD << 8 ) | 0x09 )

#endif  //_L1_DYN_DWL_SIGNA_H_

#endif  // L1_DYN_DSP_DWNLD