FreeCalypso > hg > fc-magnetite
view src/cs/layer1/tm_cust0/l1tm_cust.h @ 629:3231dd9b38c1
armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets
Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively,
and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code
for C-Sample and earlier turns them into GPIOs configured as outputs also
driving 1 - so far, so good - but TI's code for BOARD 41 (which covers
D-Sample, Leonardo and all real world Calypso devices derived from the
latter) switches them from MCUEN to GPIOs, but then leaves them as inputs.
Given that the hardware powerup state of these two pins is outputs driving 1,
every Calypso board design MUST be compatible with such driving; typically
these GPIO signals will be either unused and unconnected or connected as
outputs driving some peripheral. Turning these pins into GPIO inputs will
result in floating inputs on every reasonably-wired board, thus I am
convinced that this configuration is nothing but a bug on the part of
whoever wrote this code at TI.
This floating input bug had already been fixed earlier for GTA modem and
FCDEV3B targets; the present change makes the fix unconditional for all
"classic" targets. The newly affected targets are D-Sample, Leonardo,
Tango and GTM900.
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Thu, 02 Jan 2020 05:38:26 +0000 |
| parents | 945cf7f506b2 |
| children |
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/************* Revision Controle System Header ************* * GSM Layer 1 software * L1TM_CUST.H * * Filename l1tm_cust.h * Copyright 2003 (C) Texas Instruments * ************* Revision Controle System Header *************/ /*---------------------------------------------------------*/ /* Initial settings for test mode config => Cust_tm_init() */ /*---------------------------------------------------------*/ // Control algorithm settings: 0=>OFF, 1=>ON #define AGC_ENABLE 1 #define AFC_ENABLE 1 // ADC conversion setting: 0=>OFF, 1=>ON #define ADC_ENABLE 1 // AGC settings #define TM_AGC_VALUE 50 // AGC gain #define TM_LNA_OFF 0 // 0=>LNA ON, 1=>LNA OFF // Power measurement settings #define TM_NUM_MEAS 1 // number of measurements per TDMA #define TM_WIN_MEAS 1 // position of measurement within TDMA // BEACON and TCH settings #define TM_BCCH_ARFCN 80 // beacon #define TM_TCH_ARFCN 62 // TCH arfcn #define TM_MON_ARFCN 33 // monitor arfcn #define TM_CHAN_TYPE TCH_F // channel type #define TM_SUB_CHAN 0 // subchannel number #define TM_SLOT_NUM 4 // TS number #define TM_TSC 5 // Training Sequence #define TM_TXPWR 15 // TXPWR setting #define TM_TXPWR_SKIP 4 #define TM_TA 0 // timing advance setting #define TM_BURST_TYPE 0 // 0=>normal burst, 1=>RACH burst #define TM_BURST_DATA 0 // as defined in TM100.doc: tx_param_write #define TM_PM_ENABLE 1 // Enable power measurements in packet transfer mode // Statistics settings #define TM_NUM_LOOPS 0 // number of times a task is executed, 0 means infinite loop #define TM_AUTO_RESULT_LOOPS 0 // number of loops before stats result is returned, 0 means infinite #define TM_AUTO_RESET_LOOPS 0 // number of loops before stats I/F is reset, 0 means infinite #define TM_STAT_TYPE 1 // type of stats as defined in TM100.doc: stats_read #define TM_STAT_BITMASK 0x6057 // stats bitmaks as defined in TM100.doc: stats_read #if L1_GPRS // Settings for GPRS test mode: #define TM_PDTCH_ARFCN 62 // PDTCH arfcn #define TM_MULTISLOT_CLASS 1 // GPRS multi slot class #define TM_STAT_GPRS_SLOTS 0x80 // Bit mask for RX stats from PDTCH #define TM_RX_ALLOCATION 0x80 // RX slot allocation (bit7->TS0...bit0->TS7) #define TM_RX_CODING_SCHEME 1 // RX coding scheme #define TM_TX_ALLOCATION 0x80 // TX slot allocation (bit7->TS0...bit0->TS7) #define TM_TX_CODING_SCHEME 2 // TX coding scheme #define TM_TXPWR_GPRS 15 // GPRS txpwr level #endif