armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively, and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code for C-Sample and earlier turns them into GPIOs configured as outputs also driving 1 - so far, so good - but TI's code for BOARD 41 (which covers D-Sample, Leonardo and all real world Calypso devices derived from the latter) switches them from MCUEN to GPIOs, but then leaves them as inputs. Given that the hardware powerup state of these two pins is outputs driving 1, every Calypso board design MUST be compatible with such driving; typically these GPIO signals will be either unused and unconnected or connected as outputs driving some peripheral. Turning these pins into GPIO inputs will result in floating inputs on every reasonably-wired board, thus I am convinced that this configuration is nothing but a bug on the part of whoever wrote this code at TI. This floating input bug had already been fixed earlier for GTA modem and FCDEV3B targets; the present change makes the fix unconditional for all "classic" targets. The newly affected targets are D-Sample, Leonardo, Tango and GTM900.

/**
 * @file	rvt_pool_size.h
 *
 * Declarations of:
 * - the memory bank sizes and their watermark
 * - the SWE stack size
 * - the pool size needed (generally the sum of memory bank and stack sizes)
 *
 * @author	Vincent Oberle
 * @version 0.1
 */

/*
 * History:
 *
 *	Date       	Author					Modification
 *	-------------------------------------------------------------------
 *	07/08/2003	Vincent Oberle			Extracted from rvf_pool_size.h
 *
 * (C) Copyright 2003 by Texas Instruments Incorporated, All Rights Reserved
 */

#ifndef __RVT_POOL_SIZE_H_
#define __RVT_POOL_SIZE_H_


#ifndef _WINDOWS
  #include "rv.cfg"
  #include "swconfig.cfg"
#endif


/*
 * Values used in rvt_def_i.h
 */
#define TRACE_STACK_SIZE (2000)

#if (TEST==1)
  #define TRACE_MB1_SIZE (750000) /*(25000)*/
#elif (!GSMLITE)
  #define TRACE_MB1_SIZE (25000)
#else
  #define TRACE_MB1_SIZE (4000)
#endif

#define TRACE_POOL_SIZE  (TRACE_STACK_SIZE + TRACE_MB1_SIZE)


#endif /*__RVT_POOL_SIZE_H_*/