view src/cs/drivers/drv_app/fchg/fchg_struct.h @ 685:3fb7384e820d

tpudrv12.h: FCDEV3B goes back to being itself A while back we had the idea of a FreeCalypso modem family whereby our current fcdev3b target would some day morph into fcmodem, with multiple FC modem family products, potentially either triband or quadband, being firmware-compatible with each other and with our original FCDEV3B. But in light of the discovery of Tango modules that earlier idea is now being withdrawn: instead the already existing Tango hw is being adopted into our FreeCalypso family. Tango cannot be firmware-compatible with triband OM/FCDEV3B targets because the original quadband RFFE on Tango modules is wired in TI's original Leonardo arrangement. Because this Leonardo/Tango way is now becoming the official FreeCalypso way of driving quadband RFFEs thanks to the adoption of Tango into our FC family, our earlier idea of extending FIC's triband RFFE control signals with TSPACT5 no longer makes much sense - we will probably never produce any new hardware with that once-proposed arrangement. Therefore, that triband-or-quadband FCFAM provision is being removed from the code base, and FCDEV3B goes back to being treated the same way as CONFIG_TARGET_GTAMODEM for RFFE control purposes.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 24 Sep 2020 21:03:08 +0000
parents 4c3d05866531
children
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/*
 * Internal structure definitions for the FCHG SWE reside here.
 * abb_inth.c will also need to include this header in order to
 * get our T_PWR_CTRL_BLOCK definition.
 */

#ifndef __FCHG_STRUCT_H
#define __FCHG_STRUCT_H

#include "rv/rv_general.h"
#include "rvf/rvf_api.h"
#include "fchg/fchg_common.h"

struct charging_config {
	UINT16	start_delay;
	UINT16	start_thresh;
	UINT16	restart_thresh;
	UINT16	ci2cv_thresh;
	UINT16	cv_init_set;
	UINT16	cv_ctrl_loop_high;
	UINT16	cv_ctrl_loop_low;
	UINT16	cv_dac_max_incr;
	UINT16	cv_dac_max_decr;
	UINT16	cv_samples_needed;
	UINT16	overvoltage;
	UINT16	ci_current;
	UINT16	end_current;
	UINT16	ichg_max_spike;
	UINT16	ichg_samples_needed;
	UINT16	charge_time_limit;
	UINT16	recharge_delay;
	UINT16	bciconf;
};

/* from original PWR SWE */
typedef struct {
	UINT16		bat_voltage;
	T_PWR_PERCENT	remain_capa;
} T_PWR_THRESHOLDS;

#define	MAX_THRESHOLDS	101

#define	ICHG_AVG_WINDOW	6

typedef struct {
	/* RiViera boilerplate */
	T_RVF_ADDR_ID		addr_id;
	T_RVF_MB_ID		prim_id;
	/* configuration */
	struct charging_config	config;
	BOOL			config_present;
	T_PWR_THRESHOLDS	batt_thresholds[MAX_THRESHOLDS];
	UINT16			nb_thresholds;
	/* state */
	enum fchg_state		state;
	UINT16			batt_mv;
	UINT16			curr_disch_thresh;
	/* valid only during a charging cycle */
	UINT16			i2v_offset;
	UINT16			cv_dac_init;
	UINT16			cv_dac_curr;
	UINT16			cv_high_vbat_count;
	UINT16			cv_low_vbat_count;
	UINT16			ichg_avg_buf[ICHG_AVG_WINDOW];
	UINT16			ichg_fill_level;
	UINT16			ichg_ring_ptr;
	UINT16			ichg_average;
	UINT16			ichg_low_count;
	UINT32			start_time;
} T_PWR_CTRL_BLOCK;

#endif	/* include guard */