FreeCalypso > hg > fc-magnetite
view src/cs/drivers/drv_app/lcc/lcc_tm_i.h @ 673:62a5285e014a
Lorekeeping: allow tpudrv-leonardo.lib on Leonardo/Tango
Back in 2015 the Mother's idea was to produce a FreeCalypso development
board that would be a clone of TI Leonardo, including the original
quadband RFFE; one major additional stipulation was that this board
needed to be able to run original unmodified TCS211-20070608 firmware
with all blobs intact, with only minimal binary patches to main.lib
and tpudrv.lib. The necessary patched libs were produced at that time
in the tcs211-patches repository.
That plan was changed and we produced FCDEV3B instead, with Openmoko's
triband RFFE instead of Leonardo quadband, but when FC Magnetite started
in 2016, a TPUDRV_blob= provision was still made, allowing the possibility
of patching OM's tpudrv.lib for a restored Leonardo RFFE.
Now in 2020 we have FC Tango which is essentially a verbatim clone of
Leonardo core, including the original quadband RFFE. We have also
deblobbed our firmware so much that we have absolutely no real need
for a blob version of tpudrv.lib - but I thought it would be neat to put
the ancient TPUDRV_blob= mechanism (classic config) to its originally
intended use, just for the heck of it.
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Fri, 29 May 2020 03:55:36 +0000 |
parents | 945cf7f506b2 |
children |
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/****************************************************************************** * Power Task (pwr) * Design and coding by Svend Kristian Lindholm, skl@ti.com * * PWR ETM interface * * $Id: pwr_tm_i.h 1.1 Wed, 20 Aug 2003 10:22:37 +0200 skl $ * ******************************************************************************/ #ifndef _LCC_TM_I_H_ #define _LCC_TM_I_H_ #define PWR_CFG_ID_SIZE 2 #define PWR_COMMON_CFG_SIZE 14 #define PWR_BAT_CFG_SIZE 36 #define PWR_TEMP_CFG_SIZE 72 #define PWR_MMI_CFG_SIZE 2 #define PWR_CHG_CFG_SIZE 8 #define PWR_I2V_CAL_SIZE 6 #define PWR_VBAT_CAL_SIZE 6 #define PWR_DYNAMIC_SIZE 1 #define PWR_TMASK_SIZE 4 // This enumeration should be shared with the PC test mode side enum { PWR_CFG_ID = 0, PWR_COMMON, PWR_CHG, PWR_BAT, PWR_TEMP, PWR_MMI, PWR_I2V_CAL = 10, PWR_VBAT_CAL, PWR_MMI_TEST = 15, PWR_DYNAMIC = 20, PWR_TRACE_MASK= 21 } ; // Test mode indication mail sent to ETM // NOTE: Also used as request mail struct etm_tm_ind_s { T_RV_HDR header; uint8 size; uint8 status; uint8 data[127]; }; typedef struct etm_tm_ind_s T_ETM_TM_IND; // Use same buffer in both directions #endif //_LCC_TM_I_H_