FreeCalypso > hg > fc-magnetite
view cdg3/cdginc-locosto/p_pkt.val @ 600:8f50b202e81f
board preprocessor conditionals: prep for more FC hw in the future
This change eliminates the CONFIG_TARGET_FCDEV3B preprocessor symbol and
all preprocessor conditionals throughout the code base that tested for it,
replacing them with CONFIG_TARGET_FCFAM or CONFIG_TARGET_FCMODEM. These
new symbols are specified as follows:
CONFIG_TARGET_FCFAM is intended to cover all hardware designs created by
Mother Mychaela under the FreeCalypso trademark. This family will include
modem products (repackagings of the FCDEV3B, possibly with RFFE or even
RF transceiver changes), and also my desired FreeCalypso handset product.
CONFIG_TARGET_FCMODEM is intended to cover all FreeCalypso modem products
(which will be firmware-compatible with the FCDEV3B if they use TI Rita
transceiver, or will require a different fw build if we switch to one of
Silabs Aero transceivers), but not the handset product. Right now this
CONFIG_TARGET_FCMODEM preprocessor symbol is used to conditionalize
everything dealing with MCSI.
At the present moment the future of FC hardware evolution is still unknown:
it is not known whether we will ever have any beyond-FCDEV3B hardware at all
(contingent on uncertain funding), and if we do produce further FC hardware
designs, it is not known whether they will retain the same FIC modem core
(triband), if we are going to have a quadband design that still retains the
classic Rita transceiver, or if we are going to switch to Silabs Aero II
or some other transceiver. If we produce a quadband modem that still uses
Rita, it will run exactly the same fw as the FCDEV3B thanks to the way we
define TSPACT signals for the RF_FAM=12 && CONFIG_TARGET_FCFAM combination,
and the current fcdev3b build target will be renamed to fcmodem. OTOH, if
that putative quadband modem will be Aero-based, then it will require a
different fw build target, the fcdev3b target will stay as it is, and the
two targets will both define CONFIG_TARGET_FCFAM and CONFIG_TARGET_FCMODEM,
but will have different RF_FAM numbers. But no matter which way we are
going to evolve, it is not right to have conditionals on CONFIG_TARGET_FCDEV3B
in places like ACI, and the present change clears the way for future
evolution.
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Mon, 01 Apr 2019 01:05:24 +0000 |
| parents | c15047b3d00d |
| children |
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/* +--------------------------------------------------------------------------+ | PROJECT : PROTOCOL STACK | | FILE : p_pkt.val | | SOURCE : "sap\pkt.pdf" | | LastModified : "2002-10-17" | | IdAndVersion : "8443.105.02.106" | | SrcFileTime : "Thu Nov 29 09:50:46 2007" | | Generated by CCDGEN_2.5.5A on Thu Sep 25 09:18:53 2014 | | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! | +--------------------------------------------------------------------------+ */ /* PRAGMAS * PREFIX : NONE * COMPATIBILITY_DEFINES : NO (require PREFIX) * ALWAYS_ENUM_IN_VAL_FILE: NO * ENABLE_GROUP: NO * CAPITALIZE_TYPENAME: NO */ #ifndef P_PKT_VAL #define P_PKT_VAL #define CDG_ENTER__P_PKT_VAL #define CDG_ENTER__FILENAME _P_PKT_VAL #define CDG_ENTER__P_PKT_VAL__FILE_TYPE CDGINC #define CDG_ENTER__P_PKT_VAL__LAST_MODIFIED _2002_10_17 #define CDG_ENTER__P_PKT_VAL__ID_AND_VERSION _8443_105_02_106 #define CDG_ENTER__P_PKT_VAL__SRC_FILE_TIME _Thu_Nov_29_09_50_46_2007 #include "CDG_ENTER.h" #undef CDG_ENTER__P_PKT_VAL #undef CDG_ENTER__FILENAME /* * Value constants for VAL_sleep_mode */ #define DIO_SLEEP_ENABLE (0x1) /* Enter sleep mode if possible. */ #define DIO_SLEEP_DISABLE (0x2) /* Do not enter sleep mode. */ /* * Value constants for VAL_parity */ #define DIO_PARITY_NO (0x1) /* Don't send a parity bit. */ #define DIO_PARITY_ODD (0x2) /* Send an odd parity bit. */ #define DIO_PARITY_EVEN (0x4) /* Send an even parity bit. */ #define DIO_PARITY_SPACE (0x8) /* Send a space for parity bit. */ /* * Value constants for VAL_flow_control */ #define DIO_FLOW_NO_NO (0x1) /* No flow control for both directions. */ #define DIO_FLOW_SW_NO (0x2) /* Software flow control for receive direction and no flow control for transmit direction. */ #define DIO_FLOW_HW_NO (0x4) /* Hardware flow control for receive direction and no flow control for transmit direction. */ #define DIO_FLOW_NO_SW (0x8) /* No flow control for receive direction and software flow control for transmit direction. */ #define DIO_FLOW_SW_SW (0x10) /* Software flow control for both directions. */ #define DIO_FLOW_HW_SW (0x20) /* Hardware flow control for receive direction and software flow control for transmit direction. */ #define DIO_FLOW_NO_HW (0x40) /* No flow control for receive direction and hardware flow control for transmit direction. */ #define DIO_FLOW_SW_HW (0x80) /* Software flow control for receive direction and hardware flow control for transmit direction. */ #define DIO_FLOW_HW_HW (0x100) /* Hardware flow control for both directions. */ /* * Value constants for VAL_data_mode */ #define DIO_MODE_AT (0x1) /* The TE will transmit AT commands. */ #define DIO_MODE_DATA (0x2) /* The TE will transmit data. */ #define DIO_MODE_TRACE (0x4) /* The TE expects trace information via this device */ #define DIO_MODE_DEFAULT (0x3) /* Default value if the driver can not provide this information */ /* * Value constants for VAL_stop_bits */ #define DIO_STOP_1 (0x1) /* Send 1 stop bit. */ #define DIO_STOP_15 (0x2) /* Send 1.5 stop bits. */ #define DIO_STOP_2 (0x4) /* Send 2 stop bits. */ /* * Value constants for VAL_baud */ #define DIO_BAUD_812500 (0x80000) /* Transmission rate of 812500 bits/sec. */ #define DIO_BAUD_406250 (0x40000) /* Transmission rate of 406250 bits/sec. */ #define DIO_BAUD_203125 (0x20000) /* Transmission rate of 203125 bits/sec. */ #define DIO_BAUD_115200 (0x10000) /* Transmission rate of 115200 bits/sec. */ #define DIO_BAUD_57600 (0x8000) /* Transmission rate of 57600 bits/sec. */ #define DIO_BAUD_38400 (0x4000) /* Transmission rate of 38400 bits/sec. */ #define DIO_BAUD_33900 (0x2000) /* Transmission rate of 33900 bits/sec. */ #define DIO_BAUD_28800 (0x1000) /* Transmission rate of 28800 bits/sec. */ #define DIO_BAUD_19200 (0x800) /* Transmission rate of 19200 bits/sec. */ #define DIO_BAUD_14400 (0x400) /* Transmission rate of 14400 bits/sec. */ #define DIO_BAUD_9600 (0x200) /* Transmission rate of 9600 bits/sec. */ #define DIO_BAUD_7200 (0x100) /* Transmission rate of 7200 bits/sec. */ #define DIO_BAUD_4800 (0x80) /* Transmission rate of 4800 bits/sec. */ #define DIO_BAUD_2400 (0x40) /* Transmission rate of 2400 bits/sec. */ #define DIO_BAUD_1200 (0x20) /* Transmission rate of 1200 bits/sec. */ #define DIO_BAUD_600 (0x10) /* Transmission rate of 600 bits/sec. */ #define DIO_BAUD_300 (0x8) /* Transmission rate of 300 bits/sec. */ #define DIO_BAUD_150 (0x4) /* Transmission rate of 150 bits/sec. */ #define DIO_BAUD_75 (0x2) /* Transmission rate of 75 bits/sec. */ #define DIO_BAUD_AUTO (0x1) /* Automatic detection. */ /* * Value constants for VAL_mux_configuration */ #define DIO_MUX_MODE_BASIC (0x1) /* The multiplexer supports Basic option. */ #define DIO_MUX_MODE_ADVANCED (0x2) /* The multiplexer supports Advanced option. */ #define DIO_MUX_SUBSET_UIH (0x4) /* The multiplexer supports UIH frames. */ #define DIO_MUX_SUBSET_UI (0x8) /* The multiplexer supports UI frames. */ #define DIO_MUX_SUBSET_I (0x10) /* The multiplexer supports I frames. */ /* * Value constants for VAL_guard_period */ #define DIO_ESC_OFF (0x0) /* Turn escape sequence detection off. */ /* * Value constants for VAL_data_bits */ #define DIO_CHAR_5 (0x10) /* Send 5 bits per character. */ #define DIO_CHAR_6 (0x20) /* Send 6 bits per character. */ #define DIO_CHAR_7 (0x40) /* Send 7 bits per character. */ #define DIO_CHAR_8 (0x80) /* Send 8 bits per character. */ /* * Value constants for VAL_convergence */ #define DIO_CONV_SER (0x1) /* The device can contain serial data. */ #define DIO_CONV_PACKET (0x2) /* The device can contain packet data. */ #define DIO_CONV_MUX (0x4) /* The device can start a multiplexer. */ /* * Value constants for VAL_state */ #define DIO_SA (0x80000000)/* read/write, Device ready */ #define DIO_SB (0x40000000)/* read/write, Data valid */ #define DIO_X (0x20000000)/* read/write, Flow control */ #define DIO_RING (0x10000000)/* write, RING indicator */ #define DIO_ESC (0x8000000)/* read, escape sequence detected */ #define DIO_DISC (0x4000000)/* read, link disconnected */ #define DIO_MUX_STOP (0x1000000)/* read/write, stop the multiplexer */ #define DIO_BRK (0x2000000)/* read/write, break received / to be sent */ #define DIO_BRKLEN (0xff) /* read/write, length of the break signal in characters */ #define DIO_PACKET_UNKNOWN (0x0) /* Packet transfer: No packet type available. */ #define DIO_PACKET_IP (0x21) /* Packet transfer: Simple IP packet */ #define DIO_PACKET_CTCP (0x2d) /* Packet transfer: Van Jacobson compressed TCP/IP header */ #define DIO_PACKET_UTCP (0x2f) /* Packet transfer: Van Jacobson uncompressed TCP/IP header */ /* * Value constants for VAL_cause */ #define PKTCS_SUCCESS (0xd200) /* 0b11010010 00000000 No error, success */ #define PKTCS_INVALID_PARAMS (0xd201) /* 0b11010010 00000001 Device number invalid */ #define PKTCS_INVALID_PEER (0xd202) /* 0b11010010 00000010 Peer does not exist */ #define PKTCS_DISCONNECT (0xd203) /* 0b11010010 00000011 The driver signalled a DRV_SIGTYPE_DISCONNECT */ #define PKTCS_INTERNAL_DRV_ERROR (0xd204) /* 0b11010010 00000100 A driver function returned DRV_INTERNAL_ERROR */ /* * user defined constants */ #define DIO_MAX_NAME_LENGTH (0x10) #define DIO_MAX_DATA_LENGTH (0x64) #include "CDG_LEAVE.h" #endif