view src/cs/drivers/drv_app/spi/spi_task.h @ 600:8f50b202e81f

board preprocessor conditionals: prep for more FC hw in the future This change eliminates the CONFIG_TARGET_FCDEV3B preprocessor symbol and all preprocessor conditionals throughout the code base that tested for it, replacing them with CONFIG_TARGET_FCFAM or CONFIG_TARGET_FCMODEM. These new symbols are specified as follows: CONFIG_TARGET_FCFAM is intended to cover all hardware designs created by Mother Mychaela under the FreeCalypso trademark. This family will include modem products (repackagings of the FCDEV3B, possibly with RFFE or even RF transceiver changes), and also my desired FreeCalypso handset product. CONFIG_TARGET_FCMODEM is intended to cover all FreeCalypso modem products (which will be firmware-compatible with the FCDEV3B if they use TI Rita transceiver, or will require a different fw build if we switch to one of Silabs Aero transceivers), but not the handset product. Right now this CONFIG_TARGET_FCMODEM preprocessor symbol is used to conditionalize everything dealing with MCSI. At the present moment the future of FC hardware evolution is still unknown: it is not known whether we will ever have any beyond-FCDEV3B hardware at all (contingent on uncertain funding), and if we do produce further FC hardware designs, it is not known whether they will retain the same FIC modem core (triband), if we are going to have a quadband design that still retains the classic Rita transceiver, or if we are going to switch to Silabs Aero II or some other transceiver. If we produce a quadband modem that still uses Rita, it will run exactly the same fw as the FCDEV3B thanks to the way we define TSPACT signals for the RF_FAM=12 && CONFIG_TARGET_FCFAM combination, and the current fcdev3b build target will be renamed to fcmodem. OTOH, if that putative quadband modem will be Aero-based, then it will require a different fw build target, the fcdev3b target will stay as it is, and the two targets will both define CONFIG_TARGET_FCFAM and CONFIG_TARGET_FCMODEM, but will have different RF_FAM numbers. But no matter which way we are going to evolve, it is not right to have conditionals on CONFIG_TARGET_FCDEV3B in places like ACI, and the present change clears the way for future evolution.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 01 Apr 2019 01:05:24 +0000
parents 945cf7f506b2
children
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/*****************************************************************************/
/*                                                                           */
/*  Name        spi_task.h													 */
/*                                                                           */
/*  Function    this file contains timers definitions used by spi_core,      */
/*				in case the PWR SWE is defined.          					 */
/*                                                                           */
/*  Version		0.1															 */
/*	Author		Candice Bazanegue                   						 */
/*																			 */
/* 	Date       	Modification												 */
/*  ------------------------------------									 */
/*  20/08/2000	Create														 */
/*  01/09/2003	Modfication         										 */
/*	Author		Pascal Puel                         						 */
/*																			 */
/* (C) Copyright 2000 by Texas Instruments Incorporated, All Rights Reserved */
/*****************************************************************************/

#ifndef _SPI_TASK_H_
#define _SPI_TASK_H_

#include "rv/rv_defined_swe.h"	   // for RVM_PWR_SWE

#ifdef RVM_PWR_SWE

#include "pwr/pwr_cust.h"

#define SPI_TIMER0                      (RVF_TIMER_0)
#define SPI_TIMER0_INTERVAL_1           (PWR_BAT_TEST_TIME_1)
#define SPI_TIMER0_INTERVAL_2           (PWR_BAT_TEST_TIME_2)
#define SPI_TIMER0_INTERVAL_3           (PWR_CALIBRATION_TIME_1)
#define SPI_TIMER0_INTERVAL_4           (PWR_CALIBRATION_TIME_2)
#define SPI_TIMER0_WAIT_EVENT           (RVF_TIMER_0_EVT_MASK)

#define SPI_TIMER1                      (RVF_TIMER_1)
#define SPI_TIMER1_INTERVAL             (PWR_CI_CHECKING_TIME)
#define SPI_TIMER1_WAIT_EVENT           (RVF_TIMER_1_EVT_MASK)

#define SPI_TIMER2                      (RVF_TIMER_2)
#define SPI_TIMER2_INTERVAL             (PWR_CV_CHECKING_TIME)
#define SPI_TIMER2_WAIT_EVENT           (RVF_TIMER_2_EVT_MASK)

#define SPI_TIMER3                      (RVF_TIMER_3)
#define SPI_TIMER3_INTERVAL             (PWR_DISCHARGE_CHECKING_TIME_1)
#define SPI_TIMER3_INTERVAL_BIS         (PWR_DISCHARGE_CHECKING_TIME_2)
#define SPI_TIMER3_WAIT_EVENT           (RVF_TIMER_3_EVT_MASK)

#endif  // RVM_PWR_SWE


// Prototypes
void spi_adc_on (void);
T_RV_RET spi_core(void);

#endif	// _SPI_TASK_H_