FreeCalypso > hg > fc-magnetite
view src/cs/layer1/p_include/l1p_mfta.h @ 600:8f50b202e81f
board preprocessor conditionals: prep for more FC hw in the future
This change eliminates the CONFIG_TARGET_FCDEV3B preprocessor symbol and
all preprocessor conditionals throughout the code base that tested for it,
replacing them with CONFIG_TARGET_FCFAM or CONFIG_TARGET_FCMODEM. These
new symbols are specified as follows:
CONFIG_TARGET_FCFAM is intended to cover all hardware designs created by
Mother Mychaela under the FreeCalypso trademark. This family will include
modem products (repackagings of the FCDEV3B, possibly with RFFE or even
RF transceiver changes), and also my desired FreeCalypso handset product.
CONFIG_TARGET_FCMODEM is intended to cover all FreeCalypso modem products
(which will be firmware-compatible with the FCDEV3B if they use TI Rita
transceiver, or will require a different fw build if we switch to one of
Silabs Aero transceivers), but not the handset product. Right now this
CONFIG_TARGET_FCMODEM preprocessor symbol is used to conditionalize
everything dealing with MCSI.
At the present moment the future of FC hardware evolution is still unknown:
it is not known whether we will ever have any beyond-FCDEV3B hardware at all
(contingent on uncertain funding), and if we do produce further FC hardware
designs, it is not known whether they will retain the same FIC modem core
(triband), if we are going to have a quadband design that still retains the
classic Rita transceiver, or if we are going to switch to Silabs Aero II
or some other transceiver. If we produce a quadband modem that still uses
Rita, it will run exactly the same fw as the FCDEV3B thanks to the way we
define TSPACT signals for the RF_FAM=12 && CONFIG_TARGET_FCFAM combination,
and the current fcdev3b build target will be renamed to fcmodem. OTOH, if
that putative quadband modem will be Aero-based, then it will require a
different fw build target, the fcdev3b target will stay as it is, and the
two targets will both define CONFIG_TARGET_FCFAM and CONFIG_TARGET_FCMODEM,
but will have different RF_FAM numbers. But no matter which way we are
going to evolve, it is not right to have conditionals on CONFIG_TARGET_FCDEV3B
in places like ACI, and the present change clears the way for future
evolution.
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Mon, 01 Apr 2019 01:05:24 +0000 |
parents | 945cf7f506b2 |
children |
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/************* Revision Controle System Header ************* * GSM Layer 1 software * L1P_MFTAB.H * * Filename l1p_mfta.h * Copyright 2003 (C) Texas Instruments * ************* Revision Controle System Header *************/ #define L1P_MFTAB_H // Prototypes void l1s_hopping_algo (UWORD8 param1, UWORD8 param2); void l1ps_ctrl_single (UWORD8 param1, UWORD8 param2); void l1ps_read_single (UWORD8 param1, UWORD8 param2); void l1ps_ctrl_snb_dl (UWORD8 param1, UWORD8 param2); void l1ps_read_nb_dl (UWORD8 param1, UWORD8 param2); void l1ps_ctrl_pdtch (UWORD8 param1, UWORD8 param2); void l1ps_read_pdtch (UWORD8 param1, UWORD8 param2); void l1ps_ctrl_pbcch (UWORD8 param1, UWORD8 param2); void l1ps_ctrl_prach (UWORD8 param1, UWORD8 param2); void l1ps_read_pra_result (UWORD8 param1, UWORD8 param2); void l1ps_ctrl_poll (UWORD8 param1, UWORD8 param2); void l1ps_read_poll_result(UWORD8 param1, UWORD8 param2); void l1ps_ctrl_ptcch (UWORD8 param1, UWORD8 param2); void l1ps_read_ptcch (UWORD8 param1, UWORD8 param2); void l1ps_ctrl_itmeas (UWORD8 param1, UWORD8 param2); void l1ps_read_itmeas (UWORD8 param1, UWORD8 param2); /*********************************************************** * Content: * This file contains the MultiFrame tables for all L1S * Packet basic tasks. ***********************************************************/ /*******************************************************************************************/ /* Multiframe Blocks for Dynamic MFTAB Building purpose. */ /*******************************************************************************************/ // Multiframe table size.... #define BLOC_PDTCH_SIZE 6 // PDTCH. #define BLOC_PRACH_SIZE 3 // PRACH. #define BLOC_POLL_SIZE 6 // POLL. #define BLOC_POLL_NO_HOPP_SIZE 6 // POLL without hopping algo called. #define BLOC_SINGLE_SIZE 6 // SINGLE. #define BLOC_PCCCH_SIZE 6 // PNP, PEP and PALLC #define BLOC_PBCCHS_SIZE 6 // Serving Cell PBCCH #define BLOC_PTCCH_SIZE 3 // Serving Cell PTCCH #define BLOC_ITMEAS_SIZE 4 // Interference measurements #define BLOC_PBCCHN_TRAN_SIZE 6 // Neighbor Cell PBCCH in packet Transfer #define BLOC_PBCCHN_IDLE_SIZE 8 // Neighbor Cell PBCCH in Idle #ifdef L1P_ASYN_C /*----------------------------------------------------*/ /* TASK: Packet Normal Paging... */ /*----------------------------------------------------*/ /* frame 1 2 3 4 5 6 */ /* | | | | | | */ /* C W R | | | -> hopping + burst 1 */ /* C W R | | -> hopping + burst 2 */ /* C W R | -> hopping + burst 3 */ /* C W R -> hopping + burst 4 */ /*----------------------------------------------------*/ const T_FCT BLOC_PNP[] = { {l1s_hopping_algo,PNP,NO_PAR},{l1ps_ctrl_snb_dl,PNP,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 1 {l1s_hopping_algo,PNP,NO_PAR},{l1ps_ctrl_snb_dl,PNP,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 2 {l1s_hopping_algo,PNP,NO_PAR},{l1ps_read_nb_dl,PNP,BURST_1},{l1ps_ctrl_snb_dl,PNP,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 3 {l1s_hopping_algo,PNP,NO_PAR},{l1ps_read_nb_dl,PNP,BURST_2},{l1ps_ctrl_snb_dl,PNP,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 4 {l1ps_read_nb_dl,PNP,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 5 {l1ps_read_nb_dl,PNP,BURST_4},{NULL,NO_PAR,NO_PAR} // frame 6 }; /*----------------------------------------------------*/ /* TASK: Packet Extended Paging... */ /*----------------------------------------------------*/ /* frame 1 2 3 4 5 6 */ /* | | | | | | */ /* C W R | | | ->hopping + burst 1 */ /* C W R | | ->hopping + burst 2 */ /* C W R | ->hopping + burst 3 */ /* C W R ->hopping + burst 4 */ /*----------------------------------------------------*/ const T_FCT BLOC_PEP[] = { {l1s_hopping_algo,PEP,NO_PAR},{l1ps_ctrl_snb_dl,PEP,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 1 {l1s_hopping_algo,PEP,NO_PAR},{l1ps_ctrl_snb_dl,PEP,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 2 {l1s_hopping_algo,PEP,NO_PAR},{l1ps_read_nb_dl,PEP,BURST_1},{l1ps_ctrl_snb_dl,PEP,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 3 {l1s_hopping_algo,PEP,NO_PAR},{l1ps_read_nb_dl,PEP,BURST_2},{l1ps_ctrl_snb_dl,PEP,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 4 {l1ps_read_nb_dl,PEP,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 5 {l1ps_read_nb_dl,PEP,BURST_4},{NULL,NO_PAR,NO_PAR} // frame 6 }; /*----------------------------------------------------*/ /* TASK: All PCCCH Reading ... */ /*----------------------------------------------------*/ /* frame 1 2 3 4 5 6 */ /* | | | | | | */ /* C W R | | | -> hopping + burst 1 */ /* C W R | | -> hopping + burst 2 */ /* C W R | -> hopping + burst 3 */ /* C W R -> hopping + burst 4 */ /*----------------------------------------------------*/ const T_FCT BLOC_PALLC[] = { {l1s_hopping_algo,PALLC,NO_PAR},{l1ps_ctrl_snb_dl,PALLC,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 1 {l1s_hopping_algo,PALLC,NO_PAR},{l1ps_ctrl_snb_dl,PALLC,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 2 {l1s_hopping_algo,PALLC,NO_PAR},{l1ps_read_nb_dl,PALLC,BURST_1},{l1ps_ctrl_snb_dl,PALLC,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 3 {l1s_hopping_algo,PALLC,NO_PAR},{l1ps_read_nb_dl,PALLC,BURST_2},{l1ps_ctrl_snb_dl,PALLC,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 4 {l1ps_read_nb_dl,PALLC,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 5 {l1ps_read_nb_dl,PALLC,BURST_4},{NULL,NO_PAR,NO_PAR} // frame 6 }; /*--------------------------------------------------------------*/ /* TASK: Serving Cell PBCCH task... */ /*--------------------------------------------------------------*/ /* frame 1 2 3 4 5 6 */ /* | | | | | | */ /* C W R | | | -> hopping + Synch + burst 1 */ /* C W R | | -> hopping + burst 2 */ /* C W R | -> hopping + burst 3 */ /* C W R -> hopping + burst 4 + Synch back */ /*--------------------------------------------------------------*/ const T_FCT BLOC_PBCCHS[] = { {l1s_hopping_algo,PBCCHS,NO_PAR},{l1ps_ctrl_pbcch,PBCCHS,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 1 {l1s_hopping_algo,PBCCHS,NO_PAR},{l1ps_ctrl_pbcch,PBCCHS,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 2 {l1s_hopping_algo,PBCCHS,NO_PAR},{l1ps_read_nb_dl,PBCCHS,BURST_1},{l1ps_ctrl_pbcch,PBCCHS,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 3 {l1s_hopping_algo,PBCCHS,NO_PAR},{l1ps_read_nb_dl,PBCCHS,BURST_2},{l1ps_ctrl_pbcch,PBCCHS,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 4 {l1ps_read_nb_dl,PBCCHS,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 5 {l1ps_read_nb_dl,PBCCHS,BURST_4},{NULL,NO_PAR,NO_PAR} // frame 6 }; /*--------------------------------------------------------------*/ /* TASK: Neighbor Cell PBCCH task in Packet Transfer mode... */ /*--------------------------------------------------------------*/ /* frame 1 2 3 4 5 6 */ /* | | | | | | */ /* C W R | | | -> hopping + Synch + burst 1 */ /* C W R | | -> hopping + burst 2 */ /* C W R | -> hopping + burst 3 */ /* C W R -> hopping + burst 4 + Synch back */ /*--------------------------------------------------------------*/ const T_FCT BLOC_PBCCHN_TRAN[] = { {l1s_hopping_algo,PBCCHN_TRAN,NO_PAR},{l1ps_ctrl_pbcch,PBCCHN_TRAN,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 1 {l1s_hopping_algo,PBCCHN_TRAN,NO_PAR},{l1ps_ctrl_pbcch,PBCCHN_TRAN,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 2 {l1s_hopping_algo,PBCCHN_TRAN,NO_PAR},{l1ps_read_nb_dl,PBCCHN_TRAN,BURST_1},{l1ps_ctrl_pbcch,PBCCHN_TRAN,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 3 {l1s_hopping_algo,PBCCHN_TRAN,NO_PAR},{l1ps_read_nb_dl,PBCCHN_TRAN,BURST_2},{l1ps_ctrl_pbcch,PBCCHN_TRAN,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 4 {l1ps_read_nb_dl,PBCCHN_TRAN,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 5 {l1ps_read_nb_dl,PBCCHN_TRAN,BURST_4},{NULL,NO_PAR,NO_PAR} // frame 6 }; /*--------------------------------------------------------------*/ /* TASK: Neighbor Cell PBCCH task in Idle mode... */ /*--------------------------------------------------------------*/ /* frame 1 2 3 4 5 6 7 8 */ /* | | | | | | | | */ /* C W R | | | | | -> AGC */ /* C W R | | | -> hopping + Synch + burst 1 */ /* C W R | | -> hopping + burst 2 */ /* C W R | -> hopping + burst 3 */ /* C W R -> hopping + burst 4 + Synch back */ /*--------------------------------------------------------------*/ const T_FCT BLOC_PBCCHN_IDLE[] = { {l1s_ctrl_msagc,PBCCHN_IDLE,NO_PAR}, {NULL,NO_PAR,NO_PAR}, // frame 1 {NULL,NO_PAR,NO_PAR}, // frame 2 {l1s_read_msagc,PBCCHN_IDLE,NO_PAR},{l1s_hopping_algo,PBCCHN_IDLE,NO_PAR},{l1ps_ctrl_pbcch,PBCCHN_IDLE,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 3 {l1s_hopping_algo,PBCCHN_IDLE,NO_PAR},{l1ps_ctrl_pbcch,PBCCHN_IDLE,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 4 {l1s_hopping_algo,PBCCHN_IDLE,NO_PAR},{l1ps_read_nb_dl,PBCCHN_IDLE,BURST_1},{l1ps_ctrl_pbcch,PBCCHN_IDLE,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 5 {l1s_hopping_algo,PBCCHN_IDLE,NO_PAR},{l1ps_read_nb_dl,PBCCHN_IDLE,BURST_2},{l1ps_ctrl_pbcch,PBCCHN_IDLE,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 6 {l1ps_read_nb_dl,PBCCHN_IDLE,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 7 {l1ps_read_nb_dl,PBCCHN_IDLE,BURST_4},{NULL,NO_PAR,NO_PAR} // frame 8 }; /*----------------------------------------------------*/ /* TASK: PDTCH */ /*----------------------------------------------------*/ /* frame 1 2 3 4 5 6 */ /* | | | | | | */ /* C W R | | | -> hopping + burst 1 */ /* C W R | | -> hopping + burst 2 */ /* C W R | -> hopping + burst 3 */ /* C W R -> hopping + burst 4 */ /*----------------------------------------------------*/ const T_FCT BLOC_PDTCH[] = { {l1s_hopping_algo,PDTCH,NO_PAR},{l1ps_ctrl_pdtch,PDTCH,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 1 {l1s_hopping_algo,PDTCH,NO_PAR},{l1ps_ctrl_pdtch,PDTCH,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 2 {l1s_hopping_algo,PDTCH,NO_PAR},{l1ps_read_pdtch,PDTCH,BURST_1},{l1ps_ctrl_pdtch,PDTCH,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 3 {l1s_hopping_algo,PDTCH,NO_PAR},{l1ps_read_pdtch,PDTCH,BURST_2},{l1ps_ctrl_pdtch,PDTCH,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 4 {l1ps_read_pdtch,PDTCH,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 5 {l1ps_read_pdtch,PDTCH,BURST_4},{NULL,NO_PAR,NO_PAR} // frame 6 }; /*--------------------------------------------------------*/ /* TASK: SINGLE */ /*--------------------------------------------------------*/ /* frame 1 2 3 4 5 6 */ /* | | | | | | */ /* C W R | | | -> hopping + burst 1 + Sync */ /* C W R | | -> hopping + burst 2 */ /* C W R | -> hopping + burst 3 */ /* C W R -> hopping + burst 4 + Sync back */ /*--------------------------------------------------------*/ const T_FCT BLOC_SINGLE[] = { {l1s_hopping_algo,SINGLE,NO_PAR},{l1ps_ctrl_single,SINGLE,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 1 {l1s_hopping_algo,SINGLE,NO_PAR},{l1ps_ctrl_single,SINGLE,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 2 {l1s_hopping_algo,SINGLE,NO_PAR},{l1ps_read_single,SINGLE,BURST_1},{l1ps_ctrl_single,SINGLE,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 3 {l1s_hopping_algo,SINGLE,NO_PAR},{l1ps_read_single,SINGLE,BURST_2},{l1ps_ctrl_single,SINGLE,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 4 {l1ps_read_single,SINGLE,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 5 {l1ps_read_single,SINGLE,BURST_4},{NULL,NO_PAR,NO_PAR} // frame 6 }; /*----------------------------------------------------*/ /* TASK: PRACH task... */ /*----------------------------------------------------*/ const T_FCT BLOC_PRACH[] = { {l1ps_ctrl_prach,PRACH,NO_PAR}, {NULL,NO_PAR,NO_PAR}, // frame 1 {NULL,NO_PAR,NO_PAR}, // frame 2 {l1ps_read_pra_result,PRACH,NO_PAR}, {NULL,NO_PAR,NO_PAR} // frame 3 }; /*----------------------------------------------------*/ /* TASK: POLL task... */ /*----------------------------------------------------*/ /* frame 1 2 3 4 5 6 */ /* | | | | | | */ /* C W R | | | -> burst 1 */ /* C W R | | -> burst 2 */ /* C W R | -> burst 3 */ /* C W R -> burst 4 */ /*----------------------------------------------------*/ const T_FCT BLOC_POLL[] = { {l1s_hopping_algo,POLL,NO_PAR},{l1ps_ctrl_poll,POLL,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 1 {l1s_hopping_algo,POLL,NO_PAR},{l1ps_ctrl_poll,POLL,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 2 {l1s_hopping_algo,POLL,NO_PAR},{l1ps_read_poll_result,POLL,BURST_1},{l1ps_ctrl_poll,POLL,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 3 {l1s_hopping_algo,POLL,NO_PAR},{l1ps_read_poll_result,POLL,BURST_2},{l1ps_ctrl_poll,POLL,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 4 {l1ps_read_poll_result,POLL,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 5 {l1ps_read_poll_result,POLL,BURST_4},{NULL,NO_PAR,NO_PAR} // frame 6 }; /*----------------------------------------------------*/ /* TASK: POLL_NO_HOPP task... */ /*----------------------------------------------------*/ /* frame 1 2 3 4 5 6 */ /* | | | | | | */ /* C W R | | | -> burst 1 */ /* C W R | | -> burst 2 */ /* C W R | -> burst 3 */ /* C W R -> burst 4 */ /*----------------------------------------------------*/ const T_FCT BLOC_POLL_NO_HOPP[] = { {l1ps_ctrl_poll,POLL,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 1 {l1ps_ctrl_poll,POLL,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 2 {l1ps_read_poll_result,POLL,BURST_1},{l1ps_ctrl_poll,POLL,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 3 {l1ps_read_poll_result,POLL,BURST_2},{l1ps_ctrl_poll,POLL,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 4 {l1ps_read_poll_result,POLL,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 5 {l1ps_read_poll_result,POLL,BURST_4},{NULL,NO_PAR,NO_PAR} // frame 6 }; /*--------------------------------------------------------*/ /* TASK: PTCCH */ /*--------------------------------------------------------*/ /* frame 1 2 3 4 */ /* | | | | */ /* C W W R */ /*--------------------------------------------------------*/ const T_FCT BLOC_PTCCH[] = { {l1s_hopping_algo,PTCCH,NO_PAR},{l1ps_ctrl_ptcch,PTCCH,NO_PAR},{NULL,NO_PAR,NO_PAR}, // frame 1 {NULL,NO_PAR,NO_PAR}, // frame 2 {l1ps_read_ptcch,PTCCH,NO_PAR},{NULL,NO_PAR,NO_PAR} // frame 3 }; /*----------------------------------------------------*/ /* TASK: Interference measurements... */ /*----------------------------------------------------*/ /* frame 1 2 3 4 */ /* | | | | */ /* C W W R -> hopping + measurements */ /*----------------------------------------------------*/ const T_FCT BLOC_ITMEAS[] = { {l1s_hopping_algo,ITMEAS,NO_PAR},{l1ps_ctrl_itmeas,NO_PAR,NO_PAR},{NULL,NO_PAR,NO_PAR}, // frame 1 {NULL,NO_PAR,NO_PAR}, // frame 2 {NULL,NO_PAR,NO_PAR}, // frame 2 {l1ps_read_itmeas,NO_PAR,NO_PAR},{NULL,NO_PAR,NO_PAR} // frame 4 }; #else extern T_FCT BLOC_PNP[]; extern T_FCT BLOC_PEP[]; extern T_FCT BLOC_PALLC[]; extern T_FCT BLOC_PBCCHS[]; extern T_FCT BLOC_PBCCHN_TRAN[]; extern T_FCT BLOC_PBCCHN_IDLE[]; extern T_FCT BLOC_PDTCH[]; extern T_FCT BLOC_SINGLE[]; extern T_FCT BLOC_PRACH[]; extern T_FCT BLOC_POLL[]; extern T_FCT BLOC_POLL_NO_HOPP[]; extern T_FCT BLOC_PTCCH[]; extern T_FCT BLOC_ITMEAS[]; #endif