FreeCalypso > hg > fc-magnetite
view cdg211/msg/grlc.mdf @ 361:9e0608dc9170
l1_cust.c: madc_vbat_inverse() function added for the new FCHG
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Fri, 29 Dec 2017 05:51:08 +0000 |
parents | 56abf6cf8a0b |
children |
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;******************************************************************************** ;*** File : grlc.mdf ;*** Creation : Fri Jun 08 13:59:04 CST 2007 ;*** XSLT Processor : Apache Software Foundation / http://xml.apache.org/xalan-j / supports XSLT-Ver: 1 ;*** Copyright : (c) Texas Instruments AG, Berlin Germany 2002 ;******************************************************************************** ;*** Document Type : Air Interface Message Specification ;*** Document Name : grlc ;*** Document No. : 8441.601.99.001 ;*** Document Date : 2003-03-26 ;*** Document Status: BEING_PROCESSED ;*** Document Author: Adnan ;******************************************************************************** PRAGMA SRC_FILE_TIME "Thu Feb 17 14:27:10 2005" PRAGMA LAST_MODIFIED "2003-03-26" PRAGMA ID_AND_VERSION "8441.601.99.001" VALTAB VAL_final_alloc VAL 0 NO "not present" VAL 1 YES "present" VALTAB VAL_msg_type VAL 0b000101 U_GRLC_RESOURCE_REQ_c "Packet Resource Request" VAL 0b000010 U_GRLC_DL_ACK_c "Packet Downlink Ack/Nack" VAL 0b001001 D_GRLC_UL_ACK_c "Packet Uplink Ack/Nack" VAL 0b000001 U_GRLC_CTRL_ACK_c "Packet Control Acknowledgement" VAL 0b000011 U_GRLC_UL_DUMMY_c "Packet Uplink Dummy Control Block" VALTAB VAL_page_mode VAL 0b00 NORMAL_PAGING "Normal Paging" VAL 0b01 EXT_PAGING "Extended Paging" VAL 0b10 REORG_PAGING "Paging Reorganisation" VAL 0b11 SAME_PAGING "Same as before" VALTAB VAL_access_type VAL 0b00 TWO_PHASE "Two Phase Access Request" VAL 0b01 PAGE "Page Response" VAL 0b10 CELL_UPDATE "Cell Update" VAL 0b11 MM_PROC "Mobility Management procedure" VALTAB VAL_chan_coding_cmd VAL 0b00 "CS-1" VAL 0b01 "CS-2" VAL 0b10 "CS-3" VAL 0b11 "CS-4" VALTAB VAL_rlc_mode VAL 0 "RLC acknowledged mode" VAL 1 "RLC unacknowledged mode" VALTAB VAL_pctrl_ack VAL 0 "reserved - this value shall not be sent. If received it shall be interpreted as bit value '1'." VAL 1 "the MS received an RLC/MAC control block addressed to itself and with RBSN = 1, and did not receive an RLC/MAC control block with the same RTI value and RBSN = 0." VAL 2 "the MS received an RLC/MAC control block addressed to itself and with RBSN = 0, and did not receive an RLC/MAC control block with the same RTI value and RBSN = 1. This value is sent irrespective of the value of the FS bit." VAL 3 "the MS received two RLC/MAC blocks with the same RTI value, one with RBSN = 0 and the other with RBSN = 1." VALTAB VAL_alpha VAL 0b0000 "Alpha = 0.0" VAL 0b0001 "Alpha = 0.1" VAL 0b0010 "Alpha = 0.2" VAL 0b0011 "Alpha = 0.3" VAL 0b0100 "Alpha = 0.4" VAL 0b0101 "Alpha = 0.5" VAL 0b0110 "Alpha = 0.6" VAL 0b0111 "Alpha = 0.7" VAL 0b1000 "Alpha = 0.8" VAL 0b1001 "Alpha = 0.9" VAL 0b1010 "Alpha = 1.0" VALTAB VAL_radio_prio VAL 0 "Radio Priority 1 (Highest priority)" VAL 1 "Radio Priority 2" VAL 2 "Radio Priority 3" VAL 3 "Radio Priority 4 (Lower priority)" VALTAB VAL_llc_pdu_type VAL 0 "LLC PDU is SACK or ACK" VAL 1 "LLC PDU is not SACK or ACK" VALTAB VAL_bl_o_bl_per VAL 0 BLOCKS "ALLOCATION_BITMAP is to be interpreted as blocks" VAL 1 BLOCK_PERIODS "ALLOCATION_BITMAP is to be interpreted as block periods" VALTAB VAL_rbb VAL 0 INVALID "Negative Ack of the RLC data block with BSN=(SSN-bit_nr)mod128" VAL 1 RECEIVED "Positive Ack of the RLC data block with BSN=(SSN-bit_nr)mod128" VALTAB VAL_f_ack_ind VAL 0 "retransmission are requested and the TBF is incomplete" VAL 1 "no retransmissions are requested and this message indicates acknowledgement of all RLC data in the TBF" VAR final_alloc "FINAL_ALLOCATION" 1 VAL @m_grlc - VAL_final_alloc@ VAR flag "Flag" 1 VAL @m_grlc - VAL_final_alloc@ VAR flag2 "Flag2" 1 VAL @m_grlc - VAL_final_alloc@ VAR msg_type "Message Type" 6 VAL @m_grlc - VAL_msg_type@ VAR msg_type2 "Message Type" 6 VAL @m_grlc - VAL_msg_type@ VAR page_mode "Page Mode" 2 VAL @m_grlc - VAL_page_mode@ VAR access_type "Access Type" 2 VAL @m_grlc - VAL_access_type@ VAR tlli_value "TLLI" 32 VAR cr_tlli "CONTENTION_RESOLUTION_TLLI" 32 VAR ma_ch_mark "MA_CHANGE_MARK" 2 VAR c_value "C_VALUE" 6 VAR rxqual "RXQUAL" 3 VAR signvar "SIGN_VAR" 6 VAR ilev0 "I_LEVEL_TNO" 4 VAR ilev1 "I_LEVEL_TN1" 4 VAR ilev2 "I_LEVEL_TN2" 4 VAR ilev3 "I_LEVEL_TN3" 4 VAR ilev4 "I_LEVEL_TN4" 4 VAR ilev5 "I_LEVEL_TN5" 4 VAR ilev6 "I_LEVEL_TN6" 4 VAR ilev7 "I_LEVEL_TN7" 4 VAR chan_coding_cmd "CHANNEL_CODING_COMMAND" 2 VAL @m_grlc - VAL_chan_coding_cmd@ VAR rlc_mode "RLC_MODE" 1 VAL @m_grlc - VAL_rlc_mode@ VAR pctrl_ack "P_CONTROL_ACK" 2 VAL @m_grlc - VAL_pctrl_ack@ VAR dl_tfi_assign "DOWNLINK_TFI_ASSIGNMENT" 5 VAR ul_tfi_assign "UPLINK_TFI_ASSIGNMENT" 5 VAR ul_tfi "Uplink TFI" 5 VAR dl_tfi "Downlink TFI" 5 VAR alpha "Alpha" 4 VAL @m_grlc - VAL_alpha@ VAR gamma "GAMMA_TN" 5 VAR ta_value "TIMING_ADVANCE_VALUE" 6 VAR ta_index "TA_INDEX" 4 VAR ta_tn "TIMING_ADVANCE_TIMESLOT_NUMBER" 3 VAR ext_len "Extension Length" 6 VAR spare_ext "Extension Spare Bits" 1 VAR peak_thr_class "PEAK_THROUGHPUT_CLASS" 4 VAR radio_prio "RADIO_PRIORITY" 2 VAL @m_grlc - VAL_radio_prio@ VAR llc_pdu_type "LLC_PDU_TYPE" 1 VAL @m_grlc - VAL_llc_pdu_type@ VAR rlc_octet_cnt "RLC_OCTET_COUNT" 16 VAR ts_alloc "TIMESLOT_ALLOCATION" 8 VAR alloc_map "ALLOCATION_BITMAP" 1 VAR a_map_len "ALLOCATION_BITMAP_LENGTH" 7 VAR bl_o_bl_per "BLOCKS_OR_BLOCK_PERIODS" 1 VAL @m_grlc - VAL_bl_o_bl_per@ VAR ts_overr "TS_OVERRIDE" 8 VAR rel "TBF Starting Time Relative" 13 VAR rbb "RECEIVE_BLOCK_BITMAP" 1 VAL @m_grlc - VAL_rbb@ VAR f_ack_ind "FINAL_ACK_INDICATION" 1 VAL @m_grlc - VAL_f_ack_ind@ VAR ssn "STARTING_SEQUENCE_NUMBER" 7 VAR t1 "T1'" 5 VAR t2 "T2" 5 VAR t3 "T3" 6 COMP glob_tfi "Global TFI" { flag ; Flag < (flag=0) ul_tfi > ; Uplink TFI < (flag=1) dl_tfi > ; Downlink TFI } COMP chan_req_des "Channel Request Description" { peak_thr_class ; PEAK_THROUGHPUT_CLASS radio_prio ; RADIO_PRIORITY rlc_mode ; RLC_MODE llc_pdu_type ; LLC_ PDU_TYPE rlc_octet_cnt ; RLC_OCTET_COUNT } COMP block_struct "Blocks Structure" { bl_o_bl_per ; BLOCKS_OR_BLOCK_PERIODS a_map_len ; ALLOCATION_BITMAP_LENGTH alloc_map [a_map_len..127] ; ALLOCATION_BITMAP } COMP ext_bits "Extensions Bits IE" { ext_len ; extension length spare_ext [ext_len+1..64] ; spare bit extensions IE } COMP ilev "I_LEVEL Structure" { CSN1_S1 ilev0 ; I_LEVEL_TN0 CSN1_S1 ilev1 ; I_LEVEL_TN1 CSN1_S1 ilev2 ; I_LEVEL_TN2 CSN1_S1 ilev3 ; I_LEVEL_TN3 CSN1_S1 ilev4 ; I_LEVEL_TN4 CSN1_S1 ilev5 ; I_LEVEL_TN5 CSN1_S1 ilev6 ; I_LEVEL_TN6 CSN1_S1 ilev7 ; I_LEVEL_TN7 } COMP chan_qual_rep "Channel Quality Report" { c_value ; C_VALUE rxqual ; RXQUAL signvar ; SIGN_VAR ilev ; I_LEVEL Structure } COMP ack_nack_des "Ack/Nack Description" { f_ack_ind ; FINAL_ACK_INDICATION ssn ; STARTING_SEQUENCE_NUMBER rbb [64] ; RECEIVED_BLOCK_BITMAP } COMP abs "TBF Starting Time Absolute" { t1 ; T1' t3 ; T3 t2 ; T2 } COMP tbf_s_time "TBF Starting Time" { flag ; Flag < (flag=1) rel > ; TBF Starting Time Relative < (flag=0) abs > ; TBF Starting Time Absolute } COMP fa_s2 "FA Sub2" { tbf_s_time ; TBF_STARTING_TIME CSN1_S1 ts_alloc ; TIMESLOT_ALLOCATION .0 ; spare flag ; Flag < (flag=0) block_struct > ; Block Structure < (flag=1) alloc_map [0..127] > ; ALLOCATION_BITMAP } COMP f_alloc_ack "Fixed Allocation Uplink Ack/Nack" { final_alloc ; FINAL_ALLOCATION flag ; Flag < (flag=0) ts_overr > ; TS_OVERRIDE < (flag=1) fa_s2 > ; FA Sub2 } COMP gamma_tn "Gamma Array" { CSN1_S1 gamma ; GAMMA_TN } COMP pwr_par "Power Control Parameters" { alpha ; Alpha gamma_tn [8] ; GAMMA Array } COMP ta_index_tn "TA index and timeslot structure" { ta_index ; TA_INDEX ta_tn ; TA_TIMESLOT } COMP pta "Packet Timing Advance" { CSN1_S1 ta_value ; TIMING_ADVANCE_VALUE CSN1_S1 ta_index_tn ; TA index and timeslot structure } MSG u_grlc_resource_req uplink 0b000101 ; Packet Resource Request { msg_type ; Message Type CSN1_S1 access_type ; Access Type flag ; Flag < (flag=0) glob_tfi > ; Global TFI < (flag=1) tlli_value > ; TLLI CSN1_S1 EXTERN @m_rr_com - ra_cap@ ra_cap ; MS Radio Access Capability chan_req_des ; Channel Request Description CSN1_S1 ma_ch_mark ; MA_CHANGE_MARK c_value ; C_VALUE CSN1_S1 signvar ; SIGN_VAR ilev ; I_LEVEL Structure S_PADDING_0 .00101011 (22) ; Spare Padding } MSG u_grlc_dl_ack uplink 0b000010 ; Packet Downlink Ack/Nack { msg_type ; Message Type dl_tfi ; DOWNLINK_TFI ack_nack_des ; Ack/Nack Description CSN1_S1 chan_req_des ; Channel Request Description chan_qual_rep ; Channel Quality Report S_PADDING_0 .00101011 (22) ; Spare Padding } MSG d_grlc_ul_ack downlink 0b001001 ; Packet Uplink Ack/Nack { msg_type ; Message Type page_mode ; PAGE_MODE .00 ; spare ul_tfi ; UPLINK_TFI .0 ; spare chan_coding_cmd ; CHANNEL_CODING_COMMAND ack_nack_des ; Ack/Nack Description CSN1_S1 cr_tlli ; CONTENTION_RESOLUTION_TLLI : CSN1_S1 pta ; Packet Timing Advance CSN1_S1 pwr_par ; Power Control Parameters CSN1_S1 ext_bits ; Extension Structure CSN1_S1 f_alloc_ack ; Fixed Allocation Uplink Ack/Nack S_PADDING_0 .00101011 (22) ; Spare Padding } MSG u_grlc_ctrl_ack uplink 0b000001 ; Packet Control Acknowledgement { msg_type ; Message Type tlli_value ; TLLI pctrl_ack ; P_CTRL_ACK S_PADDING_0 .00101011 (22) ; Spare Padding } MSG u_grlc_ul_dummy uplink 0b000011 ; Packet Uplink Dummy Control Block { msg_type ; Message Type tlli_value ; TLLI S_PADDING_0 .00101011 (22) ; Spare Padding }