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gsmcomp.c: bumping trace partition size to 220 like in gprscomp.c This change is safe in terms of RAM usage because all of these partition pools have already been moved from XRAM to IRAM earlier, and our IRAM usage in VO configs is currently quite low - the one near the limit is XRAM on C11x.
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 29 Jan 2019 03:52:49 +0000
parents 56abf6cf8a0b
children
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/*
+--------------------------------------------------------------------------+
| PROJECT : PROTOCOL STACK                                                 |
| FILE    : pdeps.cdg                                                      |
| SOURCE  : "__out__\g23m_dfile\prim\aci.pdf"                              |
| LastModified : "2004-06-01"                                              |
| IdAndVersion : "8411.105.00.205"                                         |
| SrcFileTime  : "Mon Jun 7 15:08:48 2004"                                 |
| Generated by CCDGEN_2.5.5 on Fri Jun 08 13:59:14 2007                    |
|           !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!!                |
+--------------------------------------------------------------------------+
*/

#__out__\g23m_dfile\prim\dl.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_8010_147_l1_include.pdf
#__out__\g23m_dfile\prim\dl.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_8010_152_ps_include.pdf
#__out__\g23m_dfile\prim\dl.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_8010_153_cause_include.pdf
__out__\g23m_dfile\prim\dl.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_mphc.pdf
__out__\g23m_dfile\prim\l1test.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_mphc.pdf
__out__\g23m_dfile\prim\l1test.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_mac.pdf
__out__\g23m_dfile\prim\mnsms.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\m_sms.mdf
__out__\g23m_dfile\prim\ph.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_mphc.pdf