view blobs/patches/main-fchw.patch @ 91:a1ed3269da48

gsm_ds_pirelli_ram.template: reserve the first 0x100 bytes of IRAM
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 02 Oct 2016 16:55:59 +0000
parents acb07ce22054
children
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# This patch applies to the Init_Target() function in the init.obj module in
# main.lib; it is an example of how this code will need to be patched for
# running on our own future FreeCalypso hardware if we choose to use the same
# Spansion S71PL129NC0 flash+pSRAM MCP as used in the Pirelli DP-L10 and use
# the same memory timings as set by Pirelli's firmware.

[init.obj]

# value goes into nCS0, nCS1 and nCS3 config registers
.text 66 A4
# value goes into nCS2 config reg
.text 6C A4

# nop out the write into 0x02700000

.text 128 C0
.text 129 46