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view cdg3/cdginc-locosto/uicc.intf @ 604:a7ed7d4483b0

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main assembly boot path code: MEMIF change for 26 MHz targets as explained in the MEMIF-wait-states document
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 17 Jun 2019 02:11:17 +0000
parents c15047b3d00d
children
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/*
+--------------------------------------------------------------------------+
| PROJECT : PROTOCOL STACK                                                 |
| FILE    : uicc.intf                                                      |
| SOURCE  : "sap\8010_136_SIMDRV_SAP.pdf"                                  |
| LastModified : "2004-06-10"                                              |
| IdAndVersion : "8010.136.03.009"                                         |
| SrcFileTime  : "Thu Nov 29 09:27:56 2007"                                |
| Generated by CCDGEN_2.5.5A on Thu Sep 25 09:18:53 2014                   |
|           !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!!                |
+--------------------------------------------------------------------------+
*/

Interface =
{
  structHdrFile = "uicc.h";
  inputs =
  {
    SIMDRV_DUMMY =
    {
      primNum = 0x80FF009A;
      primStruct = Uicc_Dummy;
      comment = "";
    };
  };
  outputs = {
  };
};