niq32.c DTR handling restored for targets that have it TI's original TCS211 fw treated GPIO 3 as the DTR input (wired so on C-Sample and D-Sample boards, also compatible with Leonardo and FCDEV3B which have a fixed pull-down resistor on this GPIO line), and the code in niq32.c called UAF_DTRInterruptHandler() (implemented in uartfax.c) from the IQ_KeypadGPIOHandler() function. But on Openmoko's GTA02 with their official fw this GPIO is a floating input, all of the DTR handling code in uartfax.c including the interrupt logic is still there, but the hobbled TCS211-20070608 semi-src delivery which OM got from TI contained a change in niq32.c (which had been kept in FC until now) that removed the call to UAF_DTRInterruptHandler() as part of those not-quite-understood "CC test" hacks. The present change fixes this bug at a long last: if we are building fw for a target that has TI's "classic" DTR & DCD GPIO arrangement (dsample, fcmodem and gtm900), we bring back all of TI's original code in both uartfax.c and niq32.c, whereas if we are building fw for a target that does not use this classic GPIO arrangement, the code in niq32.c goes back to what we got from OM and all DTR & DCD code in uartfax.c is conditioned out. This change also removes the very last remaining bit of "CC test" bogosity from our FreeCalypso code base.

/*
+--------------------------------------------------------------------------+
| PROJECT : PROTOCOL STACK                                                 |
| FILE    : mdeps.cdg                                                      |
| SOURCE  : "__out__\g23m_dfile\msg\rr_com.mdf"                            |
| LastModified : "2002-11-18"                                              |
| IdAndVersion : "8443.250.02.008"                                         |
| SrcFileTime  : "Mon Nov 24 15:49:38 2003"                                |
| Generated by CCDGEN_2.5.5 on Fri Jun 08 13:59:14 2007                    |
|           !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!!                |
+--------------------------------------------------------------------------+
*/

__out__\g23m_dfile\msg\rr.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\m_rr_com.mdf
__out__\g23m_dfile\msg\mm.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\m_rr_com.mdf
__out__\g23m_dfile\msg\gmm.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\m_rr_com.mdf
__out__\g23m_dfile\msg\grlc.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\m_rr_com.mdf
__out__\g23m_dfile\msg\grr.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\m_rr_com.mdf